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IEEE TRANSACTIONS ON COMPUTERS 1986年第5期35卷 476-478页

作者： ROTH, JP IBM Thomas J. Watson Research Center Abstract Authors References Cited By Keywords Metrics Similar Download Citation Email Print Request Permissions

Programmed logic arrays [1], [2] are common in computer design. A form of this method of design has been used since the beginnings of computers, in telephone relay networks [3]. Optimization of such realizations of functions were begun by Karnaugh [4], Quine [5], McCluskey [6], and Roth [7]. Substantial use was mnade of such programs by Preiss [8] and Perlman [9]. despite the existence of exact procedures, "fast," "approximate" procedures have been widely used. A new approximate procedure, using the d algorithm [1], [10], [11] is introduced here. It gets around a large computation, in complementation, using prior methods. Running programs "verify" this expectation.

关键词： d algorithm PLA logic minimization

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discussion about Circuit Board Fault diagnosis Based on d algorithm

Discussion about Circuit Board Fault Diagnosis Based on D al...

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2nd International Conference on Materials and Products Manufacturing Technology (ICMPMT 2012)

作者： Xing, Xiuqin Yao, Zhuting North Univ China Taiyuan 030051 Shanxi Peoples R China

ISBN: (纸本)9783037855447

The paper proposes fault diagnosis system that simplify circuit before using d algorithm, aiming at creating detection vector inefficient. Through simplifying circuit, the hour of creating detection vector is cut and establishment of fault diagnosis databases is easy. This method is applied to diagnose fault of output circuit board on tank. In conclusion, this method of the fault diagnosis to circuit board orientates the fault accurately and quickly.

关键词： fault diagnosis d algorithm simplify circuit create detection vector

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An Improved MOEA/d algorithm for the Solution of the Multi-Objective Optimal Power Flow Problem

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PROCESSES 2023年第2期11卷 337页

作者： Wu, Zhitao Liu, Hao Zhao, Jian Li, Zhiwu Univ Sci & Technol Liaoning Sch Elect & Informat Engn Anshan 114051 Peoples R China Univ Sci & Technol Liaoning Sch Sci Anshan 114051 Peoples R China Macau Univ Sci & Technol Inst Syst Engn Taipa 999087 Macau Peoples R China

The optimal power flow (OPF) is an important tool for the secure and economic operation of the power system. It attracts many researchers to pay close attention. Many algorithms are used to solve the OPF problem. The decomposition-based multi-objective algorithm (MOEA/d) is one of them. However, the effectiveness of the algorithm decreases as the size of the power system increases. Therefore, an improved MOEA/d (IMOEA/d) is proposed in this paper to solve the OPF problem. The main goal of IMOEA/d is to speed up the convergence of the algorithm and increase species diversity. To achieve this goal, three improvement strategies are introduced. Firstly, the competition strategy between the barnacle optimization algorithm and differential evolution algorithm is adopted to overcome the reduced species diversity. Secondly, an adaptive mutation strategy is employed to enhance species diversity at the latter stage of iteration. Finally, the selective candidate with similarity selection is used to balance the exploration and exploitation capabilities of the proposed algorithm. Simulation experiments are performed on IEEE 30-bus and IEEE 57-bus test systems. The obtained results show that the above three measures can effectively improve the diversity of the population, and also demonstrate the competitiveness and effectiveness of the proposed algorithm for the OPF problem.

关键词： multi-objective optimal power flow MOEA d algorithm competition strategy adaptive mutation strategy selective candidate with similarity selection

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Power droop testing

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IEEE dESIGN & TEST OF COMPUTERS 2007年第3期24卷 276-284页

作者： Polian, Ilia Czutro, Alejandro Kundu, Sandip Becker, Bernd Univ Freiburg Fac Sci Appl D-79110 Freiburg Germany Univ Massachusetts Amherst MA 01003 USA

Circuit activity is a function of input patterns. When circuit activity changes abruptly, it can cause a sudden drop or rise in power supply voltage. This change is known as power droop and is an instance of power supply noise. Although power droop can cause an IC to fail, such failures cannot currently be screened during testing because they are not covered by conventional fault models. This article presents a technique for screening such failures. The authors propose a heuristic method to generate test sequences that create worst-case power drop by accumulating the high- and low-frequency effects. The authors employ a dynamically constrained version of the classical d-algorithm, which generates new constraints on the fly, for test generation. The obtained patterns can be used for manufacturing testing as well as for early silicon validation. The authors have implemented a prototype ATPG to demonstrate the feasibility of this approach, and they generate test sequences for ISCAS circuits.

关键词： Power droop Signal Integrity Errors ATPG d algorithm Heuristic Method High Frequency Effects Low Frequency Effects

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Adaptively weighted decomposition based multi-objective evolutionary algorithm

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APPLIEd INTELLIGENCE 2021年第6期51卷 3801-3823页

作者： Meghwani, Suraj S. Thakur, Manoj Vellore Inst Technol Sch Comp Sci & Engn SCOPE Vellore Tamil Nadu India Indian Inst Technol Sch Basic Sci Mandi Himachal Prades India

Multi-objective evolutionary algorithm based on decomposition (MOEA/d) decomposes a multi-objective problem into a number of scalar optimization problems using uniformly distributed weight vectors. However, uniformly distributed weight vectors do not guarantee uniformity of solutions on approximated Pareto-Front. This study proposes an adaptive strategy to modify these scalarizing weights after regular intervals by assessing the crowdedness of solutions using crowding distance operator. Experiments carried out over several benchmark problems with complex Pareto-Fronts show that such a strategy helps in improving the convergence and diversity of solutions on approximated Pareto-Front. Proposed algorithm also shows better performance when compared with other state-of-the-art multi-objective algorithms over most of the benchmark problems.

关键词： Multi-objective evolutionary algorithms MOEA d algorithm Inverted generational distance Crowding distance

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FUNCTIONAL TEST-GENERATION FOR dIGITAL CIRCUITS dESCRIBEd USING BINARY dECISION dIAGRAMS

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IEEE TRANSACTIONS ON COMPUTERS 1986年第4期35卷 375-379页

作者： ABAdIR, MS REGHBATI, HK SIMON FRASER UNIV DEPT COMP SCIBURNABY V5A 1S6BCCANADA

This correspondence presents a test generation methodology for VLSI circuits described at the functional level. A VLSI circuit is modeled as a network of functional modules such as registers, adders, RAM"s, and MUX"s. The functions of the individual modules are described using binary decision diagrams. A functional fault model is developed independent of the implementation details of the circuit. A generalized d algorithm is proposed for generating tests to detect functional as well as gate-level faults. algorithms which perform fault excitation, implication, d propagation, and line justification on the functional modules are also described.

关键词： Binary decision diagrams d algorithm fault detection fault model functional faults functional test generation

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9-VALUEd CIRCUIT MOdEL FOR TEST GENERATION

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IEEE TRANSACTIONS ON COMPUTERS 1976年第6期25卷 630-636页

作者： MUTH, P UNIV KARLSRUHE INST INFORMATION PROCESSINGKARLSRUHEFED REP GER

A nine-valued circuit model for test generation is introduced which takes care of multiple and repeated effects of a fault in sequential circuits. Using this model test sequences can be determined which allow multiple and repeated effects of faults on the internal state of a sequential circuit. Thus valid test sequences are derived where other known procedures, like the d-algorithm, do not find any test although one exists.

关键词： Circuit Testing d algorithm diagnosis Many Valued Model Sequential Circuit Single And Multiple Faults Test Generation

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The ATPG for auto diagnosis of digital circuit

The ATPG for auto diagnosis of digital circuit

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2nd International Symposium on Instrumentation Science and Technology (ISIST 2002)

作者： Zhang, QR deng, K Beijing Univ Aeronaut & Astronaut Dept Test & Control Beijing Peoples R China

ISBN: (纸本)7560317685

This file introduces and compares some ATPG algorithms. Some method is presented to make these algorithm can be easily processed by computer, these method includes: In Boolean difference, the approach to get the logic expression between output and input in circuit automatically, the approach to get test patterns from logic expression automatically, the approach to get pc(particle cube) from logic expression in d algorithm automatically.

关键词： d algorithm fault diagnosis ATPG

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Real Time Evaluation of Grid Based Path Planning algorithms: A comparative study

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IFAC Proceedings Volumes 2014年第1期47卷 766-772页

作者： C. Saranya K. Koteswara Rao Manju Unnikrishnan dr. V. Brinda V.R. Lalithambika M.V. dhekane Scientist/Engineer Control Design Division Vikram Sarabhai Space Centre India Section Head Control Design Division Vikram Sarabhai Space Centre India Division Head Control Design Division Vikram Sarabhai Space Centre India Group Director Control and Guidance Design Group Vikram Sarabhai Space Centre India Deputy Director Control Guidance and Simulation Entity Vikram Sarabhai Space Centre India

Path Planning algorithms are indispensable in Autonomous Navigators. Though rover may not have prior information about the environment, path planning algorithms must be robust enough to navigate it to the target. A and d are grid based Path Planning algorithms which enable to reach the target in shortest path. Cost computations are fixed in A algorithm while re- computations are done in d algorithm, whenever new obstacles are identified. A modified version of d algorithm is presented in this paper where cost re-computation is done based on certain criterion. By reducing the number of times cost re-computation occurs, Modified d aims to produce shortest path similar to d algorithm with less memory requirements and execution time. This paper also brings out the implementation of A, d and Modified d algorithms with NXT LEGO Mindstorms kit and their evaluation in real time scenario. Comparison of the above algorithms is elicited.

关键词： Path Planning Autonomous navigators A algorithm d algorithm

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