The hardware implementation of a 130 Mbit/s (H4 rate) HDTV CODEC based on the dct (discrete cosine transform) algorithm is studied for transmission in broadband ISDN (BISDN). The intrafield two-dimensional dct, nonlin...
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The hardware implementation of a 130 Mbit/s (H4 rate) HDTV CODEC based on the dct (discrete cosine transform) algorithm is studied for transmission in broadband ISDN (BISDN). The intrafield two-dimensional dct, nonlinear fixed bit quantisation of eight classes with switchable operation between Y and Pr/Pb, and the four parallel signal processing possible by dct are also implemented in the CODEC. Performance evaluation confirms that the developed CODEC has sufficient picture quality and is practical for HDTV distribution use.
Neural recording is one of the most noteworthy technologies in today's world, where large amount of recorded neural signal over prolonged duration consumes hefty time and energy for data transmission. During the p...
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ISBN:
(纸本)9781467390194
Neural recording is one of the most noteworthy technologies in today's world, where large amount of recorded neural signal over prolonged duration consumes hefty time and energy for data transmission. During the past decade, the discrete cosine transform (dct) has been used for data compression in bio-medical application due to its high energy efficiency. In this paper, a multiplication-free integer dct processor based on a parallel-pipelined architecture is proposed. The novel integer dct processor utilizes a parallel structure to reduce the latency to 6 clock cycles as compared to the conventional hardware design. Ultra-low-voltage operation is adopted to improve the energy efficiency together with parallel processing. The new integer dct processor is implemented on 0.18-mu m CMOS process with 0.6-V supply voltage and it can achieve a dct transform in 240 ns with power consumption of only 83.5 mu W at 25 MHz, making it suitable for multi-channel wireless neural signal processing application.
Time-domain lapped transform (TDLT) is a family of lapped transforms (LTs) which reduce blocking artifacts occurred by the dct algorithm. Also, we can directly apply it to the existing JPEG framework because it is con...
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ISBN:
(纸本)9786163618238
Time-domain lapped transform (TDLT) is a family of lapped transforms (LTs) which reduce blocking artifacts occurred by the dct algorithm. Also, we can directly apply it to the existing JPEG framework because it is constructed by the dct with time-domain pre- and post-filters. It obviously has higher complexity than an ordinary dct. We present an integer approximated TDLT (IntTDLT) which can be easily implemented with only adders/shifters, i.e., no floating-point multipliers, and fewer step processing, while preserving the characteristics such as allowing the use of symmetric extension and structural one degree of regularity (1-regularity). As a result, it performs good coding, especially at a low bitrate, in spite of the low-complexity.
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