The Jiangmen Underground Neutrino Observatory (JUNO) is the state of the art, large liquid scintillator neutrino experiment under construction with a broad physics program in southern China. The primary physics goal o...
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The Jiangmen Underground Neutrino Observatory (JUNO) is the state of the art, large liquid scintillator neutrino experiment under construction with a broad physics program in southern China. The primary physics goal of JUNO is to measure the neutrino mass ordering. The front-end electronics (FEEs) of JUNO will generate more than 40 GB/s of raw data, including data in various formats from multiple detectors. A large distributed data acquisition (DAQ) system was designed and developed. The system is mainly divided into data flow software and online software. The data flow software is responsible for the readout, processing, and storage of raw data, while the online software provides services such as software configuration and operational control. This article will introduce the architecture design and the recent development progress of the data flow software.
We propose an efficient performance-driven two-way partitioning algorithm to take into account clock period and latency with retiming. We model the problem with a Quadratic Programming formulation to minimize the cros...
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We propose an efficient performance-driven two-way partitioning algorithm to take into account clock period and latency with retiming. We model the problem with a Quadratic Programming formulation to minimize the crossing edge count with nonlinear timing constraints, By using a Lagrangian Approach on Modular Partitioning (LAMP), we merge nonlinear constraints into the objective function. We then decompose the problem into primal and dual subprograms. The primal program is solved by a heuristic Quadratic Boolean Programming approach and the dual program is solved by a subgradient method using a cycle mean method. Experimental results on seven industrial circuits have demonstrated our algorithm is able to achieve an average of Z3.25% clock period and latency reductions compared to the best results produced by 20 runs on each test case using a Fiduccia-Mattheyses algorithm. In terms of the average number of crossing edges, our results are only 1.85% more than those of the Fiduccia-Mattheyses algorithm without timing constraints. Compared with previous network flow based approach, our algorithm reduces the average crossing edge count by 14.59%. Furthermore, an average of 7.70% clock period and latency reductions are achieved.
data flow computing is one of the most radical approaches for multiprocessing. A computation is represented by its data flow graph and scheduling of each operator is done at run-time when all of its operands" val...
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data flow computing is one of the most radical approaches for multiprocessing. A computation is represented by its data flow graph and scheduling of each operator is done at run-time when all of its operands" values are available. This paper addresses the problem of language design for a data flow environment. It briefly surveys several alternatives for a data flow language and then focuses on one specific effort: the Massachusetts Institute of Technology"s VAL. This language stresses implicit concurrency. Both programmer and translator can easily identify and exploit concurrency because VAL disallows all forms of side-effects and aliasing. The paper concludes with an analysis of the language and areas of continued research. While substantial progress has been made, much remains to be done in the areas of language design, translation, and use.
An algebraic representation is proposed for regular iterative algorithms that can be described as bundles of data flows with different wavefronts. Modeling data flows with a generating function of power series, this f...
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An algebraic representation is proposed for regular iterative algorithms that can be described as bundles of data flows with different wavefronts. Modeling data flows with a generating function of power series, this form corresponds to the geometric representation such as a dependence graph. The main attributes of systolic algorithms and arrays are revealed by a unique data flow representation. This provides the ability to pipeline two or more systolic arrays solving different subproblems without intermediate buffering. We use an example to show the case with which our technique can be used.
Computer interlocking (CI) is serving as a core part of operation and control system (OCS) in rail transit, with no exception in medium-low speed maglev transportation system which has almost the same strategy as urba...
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ISBN:
(纸本)9781538604977
Computer interlocking (CI) is serving as a core part of operation and control system (OCS) in rail transit, with no exception in medium-low speed maglev transportation system which has almost the same strategy as urban rail transit in train control. Important as it is, the data structure and data flow in CI have to be analyzed in detail just in the system design stage, so as to ensure that it can not only meet the safety-critical technical requirements, but be easier for system upgrade and function expansion as well. Till now, most related research on CI are not based on the medium-low speed maglev application background, moreover, discussion on data flow as well as data structure in CI can also be hardly found. In this paper, data flow and data structure in CI has been analyzed exhaustively according to the specific static and dynamic data transmission and exchanging requirements in medium-low speed maglev, the data structure in signal has also been set as a case with its design in detail also be discussed.
For optical processor applications outside of laboratory experiments, it is desirable to streamline the data flow in order to obtain the highest possible throughput from the system. This paper presents the data flow a...
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ISBN:
(纸本)0819428353
For optical processor applications outside of laboratory experiments, it is desirable to streamline the data flow in order to obtain the highest possible throughput from the system. This paper presents the data flow architectures for two optical processors designed and built by Boulder Nonlinear Systems, as well as the processor designs and some experimental data.
We consider the problem of data flow fuzzy control of discrete queuing systems with three different service-rate servers. The objective is to dynamically assign customers to idle severs based on the state of the syste...
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We consider the problem of data flow fuzzy control of discrete queuing systems with three different service-rate servers. The objective is to dynamically assign customers to idle severs based on the state of the system so as to minimize the mean sojourn time of customers. Simulation shows the validity of the fuzzy controller.
The Belle II experiment is a new generation B-factory experiment with a new accelerator SuperKEKB. The luminosity of the accelerator is expected to be more more than 40 times higher than that of previous KEKB, the ave...
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ISBN:
(纸本)9781467310826;9781467310833
The Belle II experiment is a new generation B-factory experiment with a new accelerator SuperKEKB. The luminosity of the accelerator is expected to be more more than 40 times higher than that of previous KEKB, the average Level 1 trigger rate is estimated to become up to 30 kHz with a total raw data size of similar to 1.1M bytes, resulting in a data rate of >= 30 Gbytes/sec. To manage this huge data flow, the Belle II DAQ system is designed to perform a multi-step data reduction using a large number of CPUs implemented in various DAQ components from the detector readout modules to the high level trigger farm. The design of the data flow in the Belle II DAQ system is reported in this contribution.
Serverless functions are a popular trend on the cloud computing market offered by many cloud platform providers. The statelessness of serverless functions enables the dynamic scalability by providing additional instan...
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ISBN:
(纸本)9789897585104
Serverless functions are a popular trend on the cloud computing market offered by many cloud platform providers. The statelessness of serverless functions enables the dynamic scalability by providing additional instances running these functions. However, statelessness doesn't guarantee the persistence of the state of a container running a serverless function for the next call. Therefore, serverless functions must interact with other services to save their state. This results in systems whose interaction with other services is complex and hard to test. Considering the data flow resulting from the integration of different components is an adequate approach in an integration testing process. Therefore, we investigated the external factors influencing the execution of serverless functions to use this insight for the creation of a testing framework. The framework helps measure important data flow coverage aspects supporting developers in their evaluation of test cases for the integration process of a serverless application. We showed that data flow criteria between serverless functions can be measured with a small overhead of run time making it attractive for developers to use.
The data flow is a crucial part of software execution in recent applications. It depends on the concrete implementation of the realized algorithm and it influences the correctness of a result in case of hardware fault...
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ISBN:
(纸本)9780769550749
The data flow is a crucial part of software execution in recent applications. It depends on the concrete implementation of the realized algorithm and it influences the correctness of a result in case of hardware faults during the calculation. In logical circuits, like arithmetic operations in a processor system, arbitrary faults become a more tremendous aspect in future. With modern manufacturing processes, the probability of such faults will increase and the result of a software's data flow will be more vulnerable. This paper shows a principle evaluation method for the reliability of a software's data flow with arbitrary soft errors also with the concept of fault compensation. This evaluation is discussed by means of a simple example based on an addition.
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