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8th IEEE International Conference on Cloud Engineering (IC2E)

作者： Zimmermann, Michael Breitenbuecher, Uwe Kepes, Kalman Leymann, Frank Weder, Benjamin Univ Stuttgart Inst Architecture Applicat Syst Stuttgart Germany

ISBN: (纸本)9781728110998

With the ongoing advances in the area of cloud computing, Internet of Things, Industry 4.0, and the increasing prevalence of cyber-physical systems and devices equipped with sensors, the amount of data generated every second is rising steadily. Thereby, the gathering of data and the creation of added value from this data is getting easier and easier. However, the increasing volume of data stored in the cloud leads to new challenges. Analytics software and scalable platforms are required to evaluate the data distributed all over the internet. But with distributed applications and large data sets to be handled, the network becomes a bottleneck. Therefore, in this work, we present an approach to automatically improve the deployment of such applications regarding the placement of data processing components dependent on the data flow of the application. To show the practical feasibility of our approach, we implemented a prototype based on the open-source ecosystem OpenTOSCA. Moreover, we evaluated our prototype using various scenarios.

关键词： Application Deployment Deployment Automation data Locality data flow TOSCA

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data flow in a Sensor System: Current State and Challenges 4

Data Flow in a Sensor System: Current State and Challenges

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4th Mediterranean Conference on Embedded Computing (MECO

作者： Kandalis, Stamatis Kaskalis, Theodore H. Univ Macedonia Dept Appl Informat Thessaloniki Greece

ISBN: (纸本)9781479989997

This paper presents the basic data flow in a wireless sensor network based on the current literature of the area. The first step is to study exactly how information and different data move in a system like this. Various frameworks have been proposed to represent data move from one layer to another, in order to reach the end-user. After introducing the basic parts of a sensor network in section 1, we proceed to analyze two basic frameworks that present the data flow in such systems in the following two sections. These are distinguished in two types of layers: lower and upper. Section 4 discusses the middleware of a sensor network system, where SensorML and the appropriate ontologies play an important role in data exchange between the parts of the system. The conclusions drawn from this discussion lead to important open issues for further research, paving the way for appropriate study.

关键词： sensor network SensorML ontology data flow middleware sensor frameworks

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data flow in Low-Power Wide-Area IoT Applications 26

Data Flow in Low-Power Wide-Area IoT Applications

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26th Telecommunications Forum (TELFOR)

作者： Lukic, Milan Mihajlovic, Zivorad Mezei, Ivan Univ Novi Sad FTN Trg Dositeja Obradovica 6 Novi Sad 21000 Serbia

ISBN: (纸本)9781538671719

Emerging new technologies have brought a paradigm shift to the world of wireless sensor networks. Whereas in the previous decade the majority of research effort was focused on "traditional" multi-hop ad-hoc networking due to the underlying low-power (and consequently short-range) communication, the emergence of long-range low-power wireless technologies such as LoRaWAN and NB-IoT changed the way we think about the massive scale M2M networking. Consequently, a change to the rules and the philosophy introduced a new scope of problems and challenges, when it comes to the adoption of new technologies, as well as their integration into a broader IoT ecosystem. In this paper, we give an overview of the various ways to establish reliable and secure data path between wireless sensor nodes on one side, and web- or cloud-based IoT applications on the other side.

关键词： wireless sensor networks M2M communications low-power long-range data flow LoRaWAN NB-IoT

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Control method with dynamic adjustment of switching unit resources for transmission of data flow packets

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JOURNAL OF COMMUNICATIONS TECHNOLOGY AND ELECTRONICS 2002年第3期47卷 300-306页

作者： Adzhalov, VI Kurapov, AS

A method for the control of data packet transmission that involves dynamic adjustment of resources allocated to the data flows is developed. This technique is a modified procedure for monitoring the quality parameters of data transmission based on the "weighted fair queuing" method. The transmission of video data flow packets via a network port with specified characteristics is simulated. The comparative analysis of the data transmission quality parameters depending on the efficiency of the resources is performed for the method proposed and its analogs under various network conditions.

关键词： Packet data transmission Packet transmission data flow Control Methods

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Template-based automatic data flow code generation for mediaprocessors

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MICROPROCESSORS AND MICROSYSTEMS 2004年第2期28卷 77-84页

作者： Grow, MS Kim, D Kim, Y Univ Washington Image Computing Syst Lab Dept Elect Engn Seattle WA 98195 USA Univ Washington Image Computing Syst Lab Dept Bioengn Seattle WA 98195 USA

Modem mediaprocessors, with their flexibility and fast time-to-market, have become an alternative to ASICs as solutions for the high computing needs in digital imaging and video applications. A key element in obtaining high performance from mediaprocessors is an efficient data transfer mechanism to move the data between on-chip and off-chip memories. A direct memory access (DMA) controller can reduce the data movement overhead by operating independently from the main computing engine. However, to use the DMA to its full extent requires extensive experience and/or significant programming/debugging efforts. In this paper, we present a template-based automatic DMA code creation tool, which can reduce the DMA programming effort substantially. We developed the data flow code generator (DFCG) for two mediaprocessors, i.e. Hitachi/Equator Technologies MAP and Texas Instruments TMS320C64x. We have used the DFCG in 84 imaging functions and obtained almost identical performance to those functions whose DMA code had been manually developed, while substantially reducing DMA programming efforts. (C) 2004 Elsevier B.V. All rights reserved.

关键词： direct memory access automatic code generation data flow MAP TMS320C64x

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data flow and human tasks in business process models

Data flow and human tasks in business process models

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Conference on ENTERprise Information Systems (CENTERIS) / International Conference on Project MANagement (ProjMAN) / International Conference on Health and Social Care Information Systems and Technologies (HCist)

作者： Bruno, Giorgio Politecn Torino Turin Italy

In contrast with the traditional view that represents business processes as flow charts of tasks, the artifact-centric one stresses the importance of the data flow, as the main responsible for the activation of the tasks. This viewpoint leads to reconsider the interactions between the process and its tasks as well as the execution mode of the tasks. The greatest benefits concern human tasks;they should no longer be considered only as services implemented by people but they may enable their performers to make choices. Two kinds of human choices are considered in this paper: the choice of the inputs to be acted on, and the choice of the course of action to be taken. The execution mode of human tasks is also examined and three categories are illustrated: performer-driven tasks, process-driven tasks and macro tasks. These categories come with a number of patterns, which are exemplified in this paper. (C) 2015 The Authors. Published by Elsevier B.V.

关键词： business processes artifacts human tasks data flow

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Declarative data flow in a Graph-Based Distributed Memory Runtime System

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INTERNATIONAL JOURNAL OF PARALLEL PROGRAMMING 2023年第2-3期51卷 150-171页

作者： Knorr, Fabian Thoman, Peter Fahringer, Thomas Univ Innsbruck Innsbruck Austria

Runtime systems can significantly reduce the cognitive complexity of scientific applications, narrowing the gap between systems engineering and domain science in HPC. One of the most important angles in this is automating data migration in a cluster. Traditional approaches require the application developer to model communication explicitly, for example through MPI primitives. Celerity, a runtime system for accelerator clusters heavily inspired by the SYCL programming model, instead provides a purely declarative approach focused around access patterns. In addition to eliminating the need for explicit data transfer operations, it provides a basis for efficient and dynamic scheduling at runtime. However, it is currently only suitable for accessing array-like data from runtime-controlled tasks, while real programs often need to interact with opaque data local to each host, such as handles or database connections, and also need a defined way of transporting data into and out of the virtualised buffers of the runtime. In this paper, we introduce a graph-based approach and declarative API for expressing side-effect dependencies between tasks and moving data from the runtime context to the application space.

关键词： Runtime system DAG Accelerator data flow API

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HYBRID STRUCTURE - data STRUCTURING FOR data flow

MICROPROCESSING AND MICROPROGRAMMING

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MICROPROCESSING AND MICROPROGRAMMING 1989年第4期26卷 253-270页

作者： LEE, B HURSON, AR PENN STATE UNIV DEPT ELECT ENGNCOMP ENGN PROGRAMUNIVERSITY PKPA 16802

The asynchronous nature of the data flow model of computations allows exploitation of maximum inherent parallelism in many application programs. However, before the data flow model of computations can become a viable alternative to the control flow model of computations, one has to find practical solutions to some major problems such as efficient handling of data structures. This article introduces a new model for handling data structures in a data flow environment. The proposed model combines constant time access capabilities of vectors as well as the flexibility inherent in the concept of pointers. This allows a careful balance between copying and sharing to optimize the storage and the processing overhead incurred during the operations on data structures. Using simulation, we present a comparative analysis of our model against other data structure models proposed in literature.

关键词： data flow data structures Parallelism Concurrency side-effect free operations Time and space analysis Simulation

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IMGA: Efficient In-Memory Graph Convolution Network Aggregation With data flow Optimizations

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IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS 2023年第12期42卷 4695-4705页

作者： Wei, Yuntao Wang, Xueyan Zhang, Shangtong Yang, Jianlei Jia, Xiaotao Wang, Zhaohao Qu, Gang Zhao, Weisheng Beihang Univ Sch Integrated Circuit Sci & Engn MIIT Key Lab Spintron Beijing 100191 Peoples R China Beihang Univ Sch Comp Sci & Engn State Key Lab Software Dev Environm BDBC Beijing 100191 Peoples R China Univ Maryland Dept Elect & Comp Engn College Pk MD 20742 USA Univ Maryland Inst Syst Res College Pk MD 20742 USA

Aggregating features from neighbor vertices is a fundamental operation in graph convolution network (GCN). However, the sparsity in graph data creates poor spatial and temporal locality, causing dynamic and irregular memory access patterns and limiting the performance of aggregation on the Von Neumann architecture. The emerging processing-in-memory (PIM) architecture is based on emerging nonvolatile memory (NVM), like spin-orbit torque magnetic RAM (SOT-MRAM), and demonstrates promising prospects in alleviating the Von Neumann bottleneck. However, the limited memory capacity of PIM medium still incurs non-negligible data movements between PIM architecture and external memory. To solve this challenge, we propose an SOT-MRAM-based in-memory computing architecture, called IMGA, for efficient in-situ graph aggregation. Specifically, we design adaptive data flow management strategies that reuse vertex data in MRAM when processing graphs of different scales and adopt edge data as the control signal source to utilize the graph's structural information. A reordering optimization strategy leveraging hardware-software co-design principle is proposed to further reduce the costly data movement. Experimental results demonstrate that IMGA achieves an average 2523x and 21x speedup, and 1.03E+6 and 1.04E+3 energy efficiency compared with CPU and GPU, respectively.

关键词： data flow graph aggregation processing in memory (PIM) spin-orbit torque magnetic RAM (SOT-MRAM)

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COMPILE-TIME SCHEDULING AND ASSIGNMENT OF data-flow PROGRAM GRAPHS WITH data-DEPENDENT ITERATION

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IEEE TRANSACTIONS ON COMPUTERS 1991年第11期40卷 1225-1238页

作者： HA, SH LEE, EA Dept. of Electr. Eng. & Comput. Sci. California Univ. Berkeley CA USA

Scheduling of data-flow graphs onto parallel processors consists in assigning actors to processors, ordering the execution of actors within each processor, and firing the actors at particular times. Many scheduling strategies do at least one of these operations at compile time to reduce run-time cost. In this paper, we classify four scheduling strategies: 1) fully dynamic, 2) static-assignment, 3) self-timed, and 4) fully static. These are ordered in decreasing run-time cost. Optimal or near-optimal compile-time decisions require deterministic, data-independent program behavior known to the compiler. Thus, moving from strategy 1) toward 4) either sacrifices optimality, decreases generality by excluding certain program constructs, or both. This paper proposes scheduling techniques valid for strategies 2), 3), and 4). In particular, we focus on data-flow graphs representing data-dependent iteration;for such graphs, although it is impossible to deterministically optimize the schedule at compile time, reasonable decisions can be made. For many applications, good compile-time decisions remove the need for dynamic scheduling or load balancing. We assume a known probability mass function for the number of cycles in the data-dependent iteration and show how a compile-time decision about assignment and/or ordering as well as timing can be made. The criterion we use is to minimize the expected total idle time caused by the iteration;in certain cases, this will also minimize the expected makespan of the schedule. We will also show how to determine the number of processors that should be assigned to the data-dependent iteration. The method is illustrated with a practical programming example, yielding preliminary results that are very promising.

关键词： data flow data-DEPENDENT ITERATION PARALLEL PROCESSORS PARALLELIZING COMPILERS QUASI-STATIC SCHEDULING SCHEDULING

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