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检索条件"主题词=Data Flow Computing"

共 826 条记录，以下是301-310 订阅

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Formal verification of condition data flow diagrams for assurance of correct network protocols

Formal verification of condition data flow diagrams for assu...

引用

International Conference on Advanced Information Networking and Applications (AINA)

作者： Shaoying Liu Department of Computer Science Faculty of Computer and Information Sciences Hosei University Tokyo Japan

ISBN: (纸本)0769519067

Condition data flow diagrams (CDFDs) are a formalized notation resulting from the integration of Yourdon data flow Diagrams, Petri Nets, and pre-post notation. They are used in the SOFL (Structured Object-Oriented Formal Language) specification language to describe the architecture of formal specifications for network protocols and general dependable systems by defining data flow communications among processes. A large-scale specification is usually modeled as a hierarchy of CDFDs resulting from decomposing processes at various levels into CDFDs. To ensure that a decomposed CDFD is correct with respect to its high level process, verification is essential. However, how to verify rigorously the correctness of CDFDs is still an open problem. We address this problem by establishing a logical system consisting of inference rules for reasoning about CDFDs, and putting forward both formal proof and specification simulation as potential methods for correctness verification. We also give algorithms for deriving pre and postconditions of CDFDs and examples of verifying their correctness.

关键词： Formal verification Protocols Computer networks Formal languages Computer science data flow computing Uniform resource locators Petri nets Formal specifications Large-scale systems

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An O(N) supply voltage assignment algorithm for low-energy serially connected CMOS modules and a heuristic extension to acyclic data flow graphs

An O(N) supply voltage assignment algorithm for low-energy s...

引用

IEEE Computer Society Annual Symposium on VLSI

作者： A.U. Diril Y.S. Dhillon Kyu-won Choi A. Chatterjee School of Electrical and Computer Engineering Georgia Institute of Technology Atlanta GA USA

In this paper, a novel algorithm is proposed for assigning supply voltages to serially executing functional units (FUs) in a digital system such that the overall dynamic energy consumption is minimized for a given timing constraint. Novel closed form expressions for optimum supply voltage values are presented. The computation time of the algorithm is O(N) for N FUs in series. An extension of the O(N) algorithm is proposed for optimizing the acyclic data flow graph associated with any given task. Given the number of FUs available for the task, the operations required for the task are scheduled on the FUs. Voltages are then assigned to the FUs on each path of the flow graph using the O(N) algorithm. Energy savings of 10-60% are achieved on DSP filter designs using the proposed high-level optimization methodology over single supply voltage designs.

关键词： flow graphs Energy consumption Delay Dynamic voltage scaling Digital systems Timing data flow computing Scheduling algorithm Frequency Iterative algorithms

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Implementation of channel demodulator for DAB system

Implementation of channel demodulator for DAB system

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IEEE International Symposium on Circuits and Systems (ISCAS)

作者： Chien-Ming Wu Ming-Der Shieh Hsin-Fu Lo Min-Hsiung Hu Graduate School of Engineering Science & Technology National Yunlin University of Science and Technology Taiwan Department of Electronic Engineering National Yunlin University of Science and Technology Taiwan Division of Design Service National Science Council Taiwan

ISBN: (纸本)0780377613

This paper describes the VLSI implementation of Fast Fourier Transform (FFT) for the Eureka-147 Digital Audio Broadcasting (DAB) system. We emphasize how to minimize the hardware requirement and efficiently manage the memory to meet the DAB requirement. Implementation results demonstrate the applicability of our work with the characteristics of modular design, consuming less silicon area, and facilitating the extension for high transmission rate applications. The core size of the resulting chip implementation is 2086/spl times/1806 /spl mu/m/sup 2/ based on the TSMC 0.35 /spl mu/m 1P4M CMOS process. Performance evaluation reveals that our design for the targeted channel demodulator outperform previous solutions.

关键词： Demodulation Hardware Design engineering Fast Fourier transforms Digital audio broadcasting OFDM modulation Throughput Discrete Fourier transforms data flow computing Councils

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36th International Symposium on Microarchitecture

36th International Symposium on Microarchitecture

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IEEE/ACM International Symposium on Microarchitecture (MICRO)

The following topics are dealt with: voltage scaling; transient faults; cache design; power efficient architectures; energy efficient architectures; application specific optimization; dynamic optimization systems; dynamic program analysis; dynamic program optimization; branch optimization; value optimization; scheduling optimizations; dataflow architectures; data parallel architectures; clustered architectures; network processors; and scaling design.

关键词： Microprocessors Computer instructions Voltage control Transient analysis Cache memories Optimization methods data flow graphs data flow computing Processor scheduling Parallel architectures

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Proceedings 16th IEEE Computer Security Foundations Workshop

Proceedings 16th IEEE Computer Security Foundations Workshop

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Computer Security Foundations Workshop

The following topics are discussed: information flow; protocols; logics for anonymity and distributed system security; access control; authorization and security policies; and computational analysis of security protoc... 详细信息

关键词： data flow computing data security Distributed memory systems System analysis and design

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Area and time efficient modular multiplication of large integers

Area and time efficient modular multiplication of large inte...

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International Conference on Application Specific Systems (ASAP), Architectures and Processors

作者： V. Bunimov M. Schimmler Institute of Computer and Communication Network Engineering Technical University of Braunschweig Germany

A new modular multiplication algorithm and its corresponding architecture is presented. It is optimised with respect to hardware complexity and latency. Based on the dataflow of the well known interleaved modular multiplication the product of two n-bit-integers X and Y modulo M is computed by n iterations of a simple loop. The loop consists of one single carry save addition, a comparison of constant complexity, and a table lookup, where the table contains 6 precomputed values and two constants. By this construction the arithmetical complexity of the modular multiplication is reduced to n additions without carry propagation in total which leads to a speedup of at least two in comparison to all methods previously known. It consists of a first algorithm A2 implementing the new idea of combining carry save addition and constant time comparison. A2 is not optimal with respect to area and time. Its correctness is proven. By use of a small amount of precomputing the loop of A2 can be modified such that the effort within the loop is minimised. This leads to the algorithm A3 and it is verified.

关键词： Computer networks Communication networks Electronic mail Hardware Arithmetic Educational institutions Computer architecture Delay data flow computing Table lookup

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The theory of designing specialized computer systems on the basis of analogy objects of power system

The theory of designing specialized computer systems on the ...

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International Conference on CAD Systems in Microelectronics (CADSM)

作者： Y. Nykolaychuk A. Segin N. Krutskevych N. Vozna Institute of Computer Information Technologies Ternopil Academy of National Economy Ternopil Ukraine

In this paper, a line of analogies between power and information networks is given and the paper offers the use of the mathematical device of power networks to account for information networks and their elements.

关键词： Power systems Computer networks data processing Distributed computing data flow computing Computer network management Driver circuits Design optimization Productivity Process design

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A multilingual TTS system with less than 1 Mbyte footprint for embedded applications

A multilingual TTS system with less than 1 Mbyte footprint f...

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International Conference on Acoustics, Speech, and Signal Processing (ICASSP)

作者： R. Hoffmann O. Jokisch D. Hirschfeld G. Strecha H. Kruschke U. Kordon U. Koloska Dresden University of Technology Germany voice INTER connect GmbH Germany

Text-to-speech (TTS) systems have improved their quality to a large extent lately. This development has resulted in memory requirements of several megabytes that cannot be accepted in many applications, especially in embedded systems. Such applications are usually limited to a footprint of as much as 1 megabyte and require the processing power to be as low as possible. These requirements may be met if the text processing is changed from the usual data-driven algorithms to rule-based processing. Furthermore, the inventory (diphone inventory) should be as small as possible and should be stored in a compressed manner. This is demonstrated by a modified version of the Dresden speech synthesis system, DRESS, which is called microDRESS. Compared to the baseline system, microDRESS does not show essential quality losses apart from the influences of the telephone bandwidth which is appropriate for many embedded applications.

关键词： Speech synthesis Natural languages databases Embedded system Text processing Telephony Bandwidth data flow computing Design optimization Speech coding

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Multi-objective optimization based flow control in multipoint-to-point communication

Multi-objective optimization based flow control in multipoin...

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IEEE International Conference on Performance, computing and Communications (IPCCC)

作者： H.S. Hassanein Xinhua Weng H. Aboelfotoh School of Computing Queen's University Kingston ONT Canada Department of Mathematics and Computer Science Kuwait University Kuwait

Multipoint-to-point communication allows a group of sources to transfer data to one destination. A major requirement of flow control for such connections is to ensure a fair allocation of resources while maintaining a high level of resource utilization. This work treats multipoint-to-point flow control as a multiple-objective optimization problem and presents a theoretical centralized model to compute rate allocations based on this global optimization. Three control objectives have been identified as critical to the flow control of multipoint-to-point connections: overall network throughput; fairness amongst sources; fairness amongst groups. The theoretical model is a linearly constrained quadratic programming model with an objective of minimizing the weighted sums of individual objective functions. The weighting factors become tuning factors with which decision makers can set their decision preferences. It is shown that the three objectives may indeed conflict with each other, and, by varying the values of tuning factors, an optimum rate allocation can be achieved to realize many flavors of objective mix.

关键词： Communication system control Resource management Throughput Mathematics data flow computing Centralized control Quadratic programming Channel allocation Mathematical programming Unicast

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Approaching the maximum energy saving on embedded systems with multiple voltages 03

Approaching the maximum energy saving on embedded systems wi...

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IEEE International Conference on Computer-Aided Design

作者： Shaoxiong Hua Gang Qu Electrical and Computer Engineering Department and Institute for Advanced Computer Studies University of Maryland College Park MD USA

ISBN: (纸本)1581137621

Dynamic voltage scaling (DVS) is arguably the most effective energy reduction technique. The multiple-voltage DVS systems, which can operate only at pre-determined discrete voltages, are practical and have been well studied. However, one important unsolved problem is how many levels and at which values should voltages be implemented on a multiple-voltage DVS system to achieve the maximum energy saving. We refer this as the voltage set-up problem. In this paper, (1) we derive analytical solutions for dual-voltage system. (2) For the general case that does not have analytic solutions, we develop efficient numerical methods. (3) We demonstrate how to apply the proposed algorithms on system design. (4) Interestingly, the experimental results suggest that the multiple-voltage DVS system, when the voltages are set up properly, can reach DVS technique's full potential in energy saving. Specifically, on the design of an ad hoc application-specific system and the design of the MPEG video encoder, we find that the best single-voltage systems consume 150% and 20% more energy than the tight theoretical lower bounds, respectively. However, our approach gives dual-, 3-, and 4-voltage DVS system settings that are only 17.6%, 4.9%, and 2.6% for the ad hoc system, and 4.0%, 1.1%, and 0.2% for the MPEG video encoder, over the same lower bounds.

关键词： Embedded system Voltage control Dynamic voltage scaling Energy consumption Algorithm design and analysis data flow computing Power engineering and energy Educational institutions Potential energy Digital signal processing

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