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检索条件"主题词=Data Flow Computing"
877 条 记 录,以下是401-410 订阅
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A 80 MFLOPS 64-bit microprocessor for parallel computer
A 80 MFLOPS 64-bit microprocessor for parallel computer
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Custom Integrated Circuits Conference (CICC)
作者: H. Nakano M. Nakajima Y. Nakakura T. Yoshida Y. Goi Y. Nakai R. Segawa T. Kishida H. Kadota Semiconductor Research Center Matsushita Elecrric Indusrrial Company Limited Moriguchi Osaka Japan
A 80-MFLOPS 64-bit microprocessor is described that employs superscalar architecture to execute two instructions, including the combination of 64-bit floating-point add and multiply instructions, in one 25-ns cycle si... 详细信息
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An efficient extraction of character string positions using morphological operator
An efficient extraction of character string positions using ...
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IEEE International Conference on Systems, Man and Cybernetics
作者: Chang-Joon Park Kyung-Ae Moon Weon-Geun Oh Heung-Moon Choi Kyungpook National University Taegu South Korea Electronics and Telecommunications Research Institute Daejeon South Korea
An efficient extraction of character string positions in a document is proposed by using a morphological operator. In regions of character strings, axial edge pixels and diagonal edge pixels are mingled together, but ... 详细信息
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Design Models of Pipelined Units for Digital Signal Processing
Design Models of Pipelined Units for Digital Signal Processi...
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International Conference on CAD Systems in Microelectronics (CADSM)
作者: Iryna Hahanova Yaroslav Miroshnychenko Irina Pobegenko Oleksandr Savvutin DAD Department Kharkiv National University of Radioelectronics Kharkiv Ukraine DAD Department KNURE Ukraine DAD Department KNURE KNURE Russia
In this paper the architectural models of pipelined computing units with system-level description, those essentially decrease the design cycle for digital signal processing products, are offered. Practical realization... 详细信息
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A Parallel Image Processing And Display System (PIPADS): hardware architecture and control software
A Parallel Image Processing And Display System (PIPADS): har...
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Annual Hawaii International Conference on System Sciences (HICSS)
作者: T. Hobbs B. Boesen I. Kim C. Vance D. Fraser Department of Electrical Engineering Australian Defence Force Academy University of New South Wales Canberra ACT Australia
The hardware infrastructure, display system, digital signal processor, array and host-computer control software components developed in a joint project are described. A 64-bit wide implementation of Futurebus+ provide... 详细信息
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One-chip system integration for GSM and the DSP KISS-16V2
One-chip system integration for GSM and the DSP KISS-16V2
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IEEE International Conference on Computer Design: VLSI in Computers and Processors, (ICCD)
作者: G. Mahlich G.-H. Huaman-Bollo J. Preissner J. Schuck H. Sahm P. Weingart D. Weinsziehr J. Yeandel IC Design Group Philips Kommunikations Industrie AG Nuremberg Germany
The design of the KISS-16V2, an ASIC DSP core incorporating an extremely flexible architecture, is described. It is a low-power, 1- mu m CMOS DSP with highly parallel architectural functions, and a sophisticated instr... 详细信息
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Integrate multimedia in manufacturing networks using ATM
Integrate multimedia in manufacturing networks using ATM
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Conference on Local Computer Networks (LCN)
作者: M.R. Pokam J.-F. Guillaud G. Michel LGI-GRAM IMAG Grenoble France
computing and networking technologies allow the integration of continuous media data flows to almost every computer system. We particularly focus on the case of the factory and process control plants where audio, anim... 详细信息
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Proceedings 16th IEEE Computer Security Foundations Workshop
Proceedings 16th IEEE Computer Security Foundations Workshop
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Computer Security Foundations Workshop
The following topics are discussed: information flow; protocols; logics for anonymity and distributed system security; access control; authorization and security policies; and computational analysis of security protoc... 详细信息
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RENO: a rename-based instruction optimizer
RENO: a rename-based instruction optimizer
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Annual International Symposium on Computer Architecture, ISCA
作者: V. Petric T. Sha A. Roth Department of Computer and Information Science University of Pennsylvania USA
RENO is a modified MIPS R10000 register renamer that uses map-table "short-circuiting" to implement dynamic versions of several well-known static optimizations: move elimination, common subexpression elimina... 详细信息
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Real-Time Mentat programming language and architecture
Real-Time Mentat programming language and architecture
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1989 IEEE Global Telecommunications Conference and Exhibition 'Communications Technology for the 1990s and Beyond'
作者: A.S. Grimshaw A. Silberman J.W.S. Liu Department of Computer Science University of Virginia Charlottesville VA USA Department of Computer Science University of Illinois Urbana IL USA
Real-time Mentat, a programming environment designed to simplify the task of programming real-time applications in distributed and parallel environments, is described. It is based on the same data-driven computation m... 详细信息
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Searching For Conceptual Connectivity Among A S37 Of Concepts
Searching For Conceptual Connectivity Among A S37 Of Concept...
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IEEE International Conference on Systems, Man and Cybernetics
作者: S. Bandyopadhyay S. Arunkumar Department of Computer Science & Engineering Indian Institute of Technology Mumbai India
It has been argued that adequate theories of memory and the structure of knowledge largely eliminates the need for a theory of inference. In this formulation what gets inferred is a function of what gets accessed in m... 详细信息
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