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Asia-Pacific Conference on Environmental Electromagnetics (CEEM)

作者： Qui Chuan Rui Li Shui Guang Lightning and Electrification Interfence Protection Division Signal & Communication Research Institute Chinese Academy of Railway Sciences People's Bank of China China

Financial systems are nowadays dependent on electronic data processing technology. One of the most frequent causes of failure in this highly sensitive system are overvoltages mostly caused by lightning. This paper describes how lightning electromagnetic pulse intrudes into computer information systems and causes system damage. Damage prevention is also discussed.

关键词： Voltage control Lightning protection Information systems data flow computing Electromagnetic radiation Electromagnetic compatibility Conductors EMP radiation effects Surge protection data processing

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New thermodynamic function, fugergy

New thermodynamic function, fugergy

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Intersociety Conference on Energy Conversion Engineering (IECEC)

作者： A. Naimpally California State University Long Beach CA USA

A new thermodynamic function, fugergy, g, has been defined to facilitate computation of the flow availability function, B. The definition of fugergy is dBT=RTo dln g where R is the gas constant and To is the external temperature. A formula for the computation of fugergy is also presented; tabulated values of the fugergy are obtained and presented as a function of: the reduced pressure, the reduced temperature and the reduced external temperature. Formulas for fugergy for the special case of a gas obeying the virial equation as well as Van der Waal's equation are presented in the paper. Finally, the method to compute the changes in the flow availability using the fugergy tables is shown. This is illustrated by means of a numerical example.

关键词： Thermodynamics Availability Chemical analysis Performance analysis Entropy Virtual colonoscopy data flow computing Temperature dependence Maxwell equations Boundary conditions

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A unified systolic array design for wavelet-based video codec

A unified systolic array design for wavelet-based video code...

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IEEE International Conference on Electronics, Circuits and Systems (ICECS)

作者： Poi Lin Tai Chii Tung Liu Jia Shung Wang Department of Computer Science National Tsing Hua University Hsinchu Taiwan

ISBN: (纸本)0780365429

In wavelet-based video compression, some kernel functions such as block matching, discrete wavelet transform, are essential but with large complexity in computation. If we dissect two functions into the basic matrix-vector product forms, a unified design for them becomes feasible. In this paper, with carefully extraction the common computation component, a unified one-dimensional systolic array that can perform block matching and wavelet transform is presented. In this design, the input data is serial-in to save the amount of required pins, the data flow are carefully arranged to simplify the interconnection between computation components. Unlike the other full-search block matching hardware, it does not require either data broadcasting or the parallel adder. When executing a wavelet transform, the data flow is scheduled simply and effectively. It does not require any interconnecting network or off-chip memory to store intermediate results.

关键词： Systolic arrays Video codecs Discrete wavelet transforms Wavelet transforms Video compression Kernel data mining Pins data flow computing Hardware

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User interface specification and modeling in an object oriented environment for automatic software development

User interface specification and modeling in an object orien...

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Technology of Object-Oriented Languages and Systems (TOOLS)

作者： M.D. Lozano P. Gonzalez I. Ramos Computer Science Department University of Castilla La Mancha Albacete Spain Department of Information Systems and Computation Polytechnic University Valencia Spain

Nowadays, most of the research developed by industry and academia has led to several object-oriented methods that are highly adequate for the development of systems, but most of these methods do not include mechanisms (models) for identifying and specifying user needs and requirements, as well as testing and validating requirements with end users before, during and after development. These considerations are especially important in interactive systems, where the user interaction is very high and the user interface is a significant part of the system. As a result of this weakness, interactive systems developed using such methods can meet all technical requirements, be very robust, and yet be unusable by the end user. This problem explains a large part of the frequently-observed phenomenon whereby large numbers of change requests to modify the services of an application are made after its deployment. As a solution to this problem, we propose a method for integrating a user interface model into the software life-cycle, taking into account user needs and requirements. Also, this approach to the development process ensures the quality of the delivered applications from the end user's point of view.

关键词： User interfaces Object oriented modeling Application software Computer interfaces Interactive systems data flow computing Project management Technology management Programming Computer science

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A microprocessor with a 128-bit CPU, ten floating-point MAC's, four floating-point dividers, and an MPEG-2 decoder

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IEEE JOURNAL OF SOLID-STATE CIRCUITS 1999年第11期34卷 1608-1618页

作者： Suzuoki, M Kutaragi, K Hiroi, T Magoshi, K Okamoto, S Oka, M Ohba, A Yanamoto, Y Furuhashi, M Tanaka, M Yutaka, T Okada, T Nagamatsu, M Urakawa, Y Funyu, M Kunimatsu, A Goto, H Hashimoto, K Ide, N Murakami, H Ohtaguro, Y Aono, A Sony Comp Entertainment Inc Tokyo 1070052 Japan Toshiba Corp Semicond Co Kawasaki Kanagawa 210 Japan Toshiba Microelect Corp Kawasaki Kanagawa Japan

A 250-MHz microprocessor intended for home computer entertainment consists of a CPU core with 128-b multimedia extensions, two single-instruction, multiple-data (SIMD) very long instruction word (VLIW) vector processors containing ten floating-point multiplier accelerators and four floating-point dividers, an MPEG-2 decoder, a ten-channel direct memory access (DMA) controller, and other peripherals with 128-b internal buses on one die. The core is a two-way superscalar MIPS-compatible microprocessor with 16-kB scratch-pad RAM. Each vector processor is a five-way SIMD-VLIW architecture, which is tightly dedicated for specific applications about three-dimensional geometry calculation and physical simulation. A DMA controller connects between main memory and each professor's local memory to conceal memory access penalty. It contains 10.5 M transistors in 17 x 14.1 mm and dissipates 15 W at 1.8 V.

关键词： computer graphics data flow computing digital signal processing discrete cosine transform distributed memory system home computing image processing integrated circuit design multimedia systems multiprocessor interconnection real time systems

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System demonstration of a superconducting communication system

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IEEE TRANSACTIONS ON APPLIED SUPERCONDUCTIVITY 1999年第2期9卷 2975-2980页

作者： Yorozu, S Hashimoto, Y Numata, H Nagasawa, S Tahara, S NEC Corp Ltd Fundamental Res Labs Ibaraki Osaka Japan

We report on the first complete system-level demonstration of a superconducting digital communication system. In today's digital computer and communication systems, managing data flow is a major challenge as the systems have to deal with a huge amount of information. A superconductor device may solve this problem, There have been several attempts to make superconducting switching core circuits, but there have been no complete system-level demonstrations. We have built such a system to demonstrate the efficiency of superconducting devices used in a communication system. Our system is focused on parallel processor communication, and consists of PCs as the processor elements at the three nodes, three interface boxes, and a superconductive chip immersed in a 4.2-K cryostat, The interconnection chip operation is essentially packet switching that was designed with a pipeline ring architecture. The interface box consists of parallel-serial converters, serial-parallel converters, a FIFO output buffer, and a level conversion circuit. The network system operates successfully at approximately 100 MHz, and the clock frequency is restricted by the speed of the interface ICs, not by that of the superconductive chip. We also confirmed the 2-GHz operation of the switching chip, and estimate that the total throughput of the system can be increased to more than 10 Gbps.

关键词： Superconducting devices Superconductivity Digital communication data flow computing Switching circuits Communication switching Personal communication networks Integrated circuit interconnections Packet switching Pipelines

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Cosmology and computation

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computing IN SCIENCE & ENGINEERING 1999年第2期1卷 17-20页

作者： Tohline, JE Bryan, GL Louisiana State Univ Dept Phys & Astron Baton Rouge LA 70803 USA MIT Cambridge MA 02139 USA

Presents the guest editorial for this issue of the publication.

关键词： Astronomy data analysis Physics computing Educational institutions Engineering management Advertising Instruments Telescopes data flow computing

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Scheduling of DSP data flow graphs onto multiprocessors for maximum throughput

Scheduling of DSP data flow graphs onto multiprocessors for ...

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IEEE International Symposium on Circuits and Systems (ISCAS)

作者： A. Shatnawi M.O. Ahmad M.N.S. Swamy Department of Computer Engineering Jordan University of Science and Technology Irbid Jordan Center for Signal Processing and Communications Department of Electrical and Computer Engineering Concordia University Montreal QUE Canada

A novel technique to obtain a rate- and processor-optimal schedule for a fully-static data flow graph (DFG) onto a multiprocessor system is presented. In this technique, Floyd-Warshall's shortest path algorithm is used to evaluate the relative firing times of the nodes of the given DFG. Despite its implementation simplicity, the proposed technique has a lower time complexity than all the previously proposed techniques. The technique is tested on various benchmark problems to demonstrate its optimal performance.

关键词： Digital signal processing flow graphs Throughput Processor scheduling Signal processing algorithms Circuits data flow computing Scheduling algorithm Polynomials Delay effects

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Dynamic resource assignment using network flows in wireless data networks

Dynamic resource assignment using network flows in wireless ...

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IEEE Conference on Vehicular Technology (VTC)

作者： O. Koyuncu S.K. Das H. Ernam Center for Research in Wireless Computing (CReW) Department of Computer Science University of North Texas Denton TX USA Wireless System Engineering Nortel Richardson TX USA

The radio frequency spectrum, a scarce resource in mobile communications, has to be efficiently utilized with the objective of increasing the network capacity and minimizing the interference. A variety of channel assignment strategies have been developed to achieve these objectives. Not only the mobility of the wireless user but also different types of wireless multimedia services create uncertainty in demand and non-optimum use of radio resources. As the cell sizes get smaller, there is a greater need for efficient channel assignment algorithms which are desired to dynamically balance the load of the system by performing reassignments when needed. Static schemes are no longer desirable for small cell systems under heavy and non-uniform multi-rate traffic. We propose a dynamic multi-channel assignment algorithm where the assignment decision is assisted by the mobiles. Our algorithm is based on the concept of network flows, which provide us with the framework to uniformly handle all the events occurring in the system including possible degradation and improvement of the existing assignments. This model enables fast local computations and avoids global reconfiguration which prevent other algorithms being practical.

关键词： Intelligent networks Interference Computer networks Radio frequency Mobile communication Heuristic algorithms Degradation Costs data flow computing Computer science

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An incremental flow- and context-sensitive pointer aliasing analysis

An incremental flow- and context-sensitive pointer aliasing ...

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International Conference on Software Engineering (ICSE)

作者： J.-S. Yur B.G. Ryder W.A. Landi Department of Computer Science Rutgers University Piscataway NJ USA Siemens Corporate Research Inc. Princeton NJ USA

Pointer aliasing analysis is used to determine if two object names containing dereferences and/or field selectors (e.g., *P,9->t) may refer to the same location during execution. Such information is necessary for applications such as data-flow-based testers, program understanding tools, and debuggers, but is expensive to calculate with acceptable precision. Incremental algorithms update data flow information after a program change rather than recomputing it from scratch, under the assumption that the change impact will be limited. Two versions of a practical incremental pointer aliasing algorithm have been developed, based on Landi-Ryder flow- and context-sensitive alias analysis. Empirical results attest to the time savings over exhaustive analysis (a six-fold speedup on average), and the precision of the approximate solution obtained (on average same solution as exhaustive algorithm for 75% of the tests.).

关键词： Testing Algorithm design and analysis Costs Computer science Program processors Information analysis Permission Petroleum Educational institutions data flow computing

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