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检索条件"主题词=Data Flow Computing"

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A systematic approach to the design of modular systolic arrays

A systematic approach to the design of modular systolic arra...

引用

Proceedings of the International Conference on Systolic Arrays

作者： P. Bertolazzi C. Guerra S. Salza IASI-CNR Rome Italy Department of Computer Sciences Purdue University West Lafayette IN USA

The data dependence method is extended to the design of systolic arrays that are not regular but can be thought of as a combination of basic regular systolic modules. For problems that have an intrinsic modular structure, a strategy based on decomposition into subproblems for which a systolic design can be easily derived is suggested. Thus the major problem of the synthesis procedure becomes that of interconnecting the basic modules according to the timing and data-flow constraints that arise from the decomposition of the original problem. The synthesis procedure consists of two steps. The local time and space function is derived for the basic module using standard methodologies, and the global time function is then obtained by imposing additional constraints on the flow of the variables and used to derive the interconnections between the modules. The approach is illustrated on two different problems: 2-D convolution and the shortest path on a layered graph.< >

关键词： Systolic arrays Design methodology Shortest path problem Very large scale integration Vectors data flow computing Physics computing Timing Input variables Delay effects

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Low-Overhead Architecture for Security Tag

Low-Overhead Architecture for Security Tag

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Pacific Rim International Symposium on Dependable computing

作者： Ryota Shioya Daewung Kim Kazuo Horio Masahiro Goshima Shuichi Sakai Graduate School of Information Science and Technology University of Tokyo Japan

A security-tagged architecture is one that applies tags on data to detect attack or information leakage, tracking data *** previous studies using security-tagged architecture mostly focused on how to utilize tags, not how the tags are implemented. A naive implementation of tags simply adds a tag field to every byte of the cache and the memory. Such technique, however, results in a huge hardware *** paper proposes a low-overhead tagged architecture. We achieve our goal by exploiting some properties of tag, the non-uniformity and the locality of reference. Our design includes a use of uniquely designed multi-level table and various cache-like structures, all contributing to exploit these properties. Under simulation, our method was able to limit the memory overhead to 1.8%, where a naive implementation suffered 12.5% overhead.

关键词： data security Information security Delay Computer architecture Leak detection Protection data flow computing Information science Fellows Societies

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An alternative polychronous model and synthesis methodology for model-driven embedded software 10

An alternative polychronous model and synthesis methodology ...

引用

Asia and South Pacific Design Automation Conference

作者： Bijoy A. Jose Sandeep K. Shukla FERMAT Laboratory Bradley Department of Electrical and Computer Engineering Virginia Polytechnic Institute Blacksburg VA USA

ISBN: (纸本)9781605588377

Multi-clocked synchronous (a.k.a. Polychronous) specification languages do not assume that execution proceeds by sampling inputs at predetermined global synchronization points. The software synthesized from such specifications are paced by arrival of certain inputs, or evaluation of certain internal variables. Here, we present an alternate polychronous model of computation termed Multi-rate Instantaneous Channel connected data flow (MRICDF) actor network model. Sequential embedded software from MRICDF specifications can be synthesized using epoch analysis, a technique proposed to form a unique order of events without a reference time line. We show how to decide on the implementability of MRICDF specification and how additional epoch information can help in synthesizing deterministic sequential software. The semantics of an MRICDF is akin to that of SIGNAL, but is visual and easier to specify. Also, our prime implicate based epoch analysis technique avoids the complex clock-tree based analysis required in SIGNAL. We experimented with the usability of MRICDF formalism by creating EmCodeSyn, our visual specification and synthesis tool. Our attempt is to make polychronous specification based software synthesis more accessible to engineers, by proposing this alternative model with different semantic exposition and simpler analysis techniques.

关键词： Embedded software Network synthesis Signal synthesis Signal analysis Specification languages Sampling methods Synchronization Computational modeling Computer networks data flow computing

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Adaptive distributed transforms for irregularly sampled Wireless Sensor Networks

Adaptive distributed transforms for irregularly sampled Wire...

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International Conference on Acoustics, Speech, and Signal Processing (ICASSP)

作者： Godwin Shen Sunil Kumar Narang Antonio Ortega Signal and Image Processing Institute University of Southern California USA

We develop energy-efficient, adaptive distributed transforms for data gathering in wireless sensor networks. In particular, we consider a class of unidirectional transforms that are computed as data is forwarded to the sink along a given routing tree and develop a tree-based Karhunen-Loeve Transform (KLT) that is optimal in that it achieves maximum data de-correlation among this class of transforms. As an alternative to this KLT (which incurs communication overhead in order to learn second order data statistics), we propose a backward adaptive filter optimization algorithm for distributed wavelet transforms that i) achieves near optimal performance and ii) has no communication overhead in learning statistics.

关键词： Wireless sensor networks Routing Costs Karhunen-Loeve transforms Statistical distributions Wavelet transforms Adaptive filters Base stations data flow computing Signal processing

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Operation scheduling for FPGA-based reconfigurable computers

Operation scheduling for FPGA-based reconfigurable computers

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International Conference on Field Programmable Logic and Applications

作者： Colin Yu Lin Ngai Wong Hayden Kwok-Hay So Department of Electrical and Electronic Engineering University of Hong Kong Hong Kong China

Many high-performance applications involve large data sets that are impossible to fit entirely within on-chip memories of even the largest FPGAs. As a result, they must be stored in off-chip SDRAMs and loaded onto the FPGAs as computations progress. Because of the high latency and energy consumption associated with off-chip memory accesses, it is important to develop efficient operation schedules that not only minimize latency of computations, but also the amount of data I/Os. We formulate this problem as a modified resource-constrained job scheduling problem. The problem is then solved using a list scheduling algorithm that takes advantage of the fast burst-mode access of SDRAMs. Results have shown that for large problem sizes, the performance of our algorithm is within 1% of a hand-optimized matrix-matrix multiplication implementation, with no memory overhead, and is within 0.03% of the theoretical minimum latency of an 8-by-8 cofactor matrix computation.

关键词： Processor scheduling Delay Field programmable gate arrays Scheduling algorithm Energy consumption Application software data flow computing Read-write memory Optimal scheduling data engineering

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Region-based optical flow estimation

Region-based optical flow estimation

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Conference on Computer Vision and Pattern Recognition (CVPR)

作者： C.-S. Fuh P. Maragos Division of Applied Sciences Harvard University Cambridge MA USA

A correspondence method is developed for determining optical flow where the primitive motion tokens to be matched between consecutive time frames are regions. The computation of optical flow consists of three stages: region extraction, region matching, and optical flow smoothing. The computation is completed by smoothing the initial optical flow, where the sparse velocity data are either smoothed with a vector median filter or interpolated to obtain dense velocity estimates by using a motion-coherence regularization. The proposed region-based method for optical flow is simple, computationally efficient, and more robust than iterative gradient methods, especially for medium-range motion.< >

关键词： Image motion analysis Optical filters Optical computing Smoothing methods data mining data flow computing Motion estimation Robustness Iterative methods Gradient methods

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FunState-an internal design representation for codesign 99

FunState-an internal design representation for codesign

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IEEE International Conference on Computer-Aided Design

作者： L. Thiele K. Strehl D. Ziegengein R. Ernst J. Teich Computer Engineering and Networks Laboratory (TIK) Swiss Federal Institute of Technology Zurich Switzerland Institute of Computer Engineering (IDA) Technical University of Braunschweig Brunswick Germany Computer Engineering Laboratory (DATE) University of Paderborn Paderborn Germany

ISBN: (纸本)9780780358324

In this paper, an internal design model called FunState (functions driven by state machines) is presented that enables the representation of different types of system components and scheduling mechanisms using a mixture of functional programming and state machines. It is shown how properties relevant for scheduling and verification of specification models like boolean dataflow, cyclostatic dataflow, synchronous dataflow, marked graphs, and communicating state machines as well as Petri nets may be represented in the FunState model. Examples of methods suited for FunState are described, such as scheduling and verification. They are based on the representation of the model's state transitions in form of a periodic graph.

关键词： Processor scheduling Computer networks Design engineering Embedded system Computational modeling data flow computing Functional programming Petri nets Timing Embedded computing

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36th International Symposium on Microarchitecture

36th International Symposium on Microarchitecture

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IEEE/ACM International Symposium on Microarchitecture (MICRO)

The following topics are dealt with: voltage scaling; transient faults; cache design; power efficient architectures; energy efficient architectures; application specific optimization; dynamic optimization systems; dynamic program analysis; dynamic program optimization; branch optimization; value optimization; scheduling optimizations; dataflow architectures; data parallel architectures; clustered architectures; network processors; and scaling design.

关键词： Microprocessors Computer instructions Voltage control Transient analysis Cache memories Optimization methods data flow graphs data flow computing Processor scheduling Parallel architectures

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Evaluation of integrated system-level checks for on-line error detection

Evaluation of integrated system-level checks for on-line err...

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International Computer Performance and Dependability Symposium

作者： G.A. Kanawati V.S.S. Nair N. Krishnamurthy J.A. Abraham Computer Engineering Research Center University of Texas Austin Austin TX USA Computer Science and Engineering Department SMU Dallas TX USA

This paper evaluates the capabilities of an integrated system level error detection technique using fault and error injection. This technique is comprised of two software level mechanisms for concurrent error detection, control flow checking using assertions (CCA) and data error checking using application specific data checks. Over 300,000 faults and errors were injected and the analysis of the results reveals that the CCA detects 95% of all the errors while the data checks are able to detect subtle errors that go undetected by the CCA technique. Latency measurements also shelved that the CCA technique is faster than the data checks in detecting the error. When both techniques were incorporated, the system was able to detect over 98% of all injected errors.

关键词： Fault detection Computer errors Error correction Hardware Delay Control systems Application software Computer science Computer applications data flow computing

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A Pairwise Reduced Kernel-based Multi-classification Tikhonov Regularization Machine

A Pairwise Reduced Kernel-based Multi-classification Tikhono...

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International Joint Conference on Neural Networks (IJCNN)

作者： O.O. Oladunni T.B. Trafalis School of Industrial Engineering University of Oklahama Norman OK USA

This paper presents a reduced kernel-based classification model for multi-category discrimination of sets or objects. The proposed model is based on the Tikhonov regularization scheme. This approach extends Mangasarian reduced support vector machine (RSVM) model in a least square framework for the case of multi-categorical discrimination. The dimension reduction of the kernel matrix is achieved by selecting random subsets of the training set. Advantages of this formulation include explicit expressions for the classification weights of the classifier(s), its ability to incorporate several classes in a single optimization problem, and computational tractability in providing the optimal classification weights for multi-categorical separation. Computational results are also provided for two-phase flow data.

关键词： Support vector machines Support vector machine classification Linear systems Least squares methods Equations Kernel Quadratic programming Industrial engineering data flow computing Classification algorithms

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