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检索条件"主题词=Data Flow Computing"

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A Pairwise Reduced Kernel-based Multi-classification Tikhonov Regularization Machine

A Pairwise Reduced Kernel-based Multi-classification Tikhono...

引用

International Joint Conference on Neural Networks (IJCNN)

作者： O.O. Oladunni T.B. Trafalis School of Industrial Engineering University of Oklahama Norman OK USA

This paper presents a reduced kernel-based classification model for multi-category discrimination of sets or objects. The proposed model is based on the Tikhonov regularization scheme. This approach extends Mangasarian reduced support vector machine (RSVM) model in a least square framework for the case of multi-categorical discrimination. The dimension reduction of the kernel matrix is achieved by selecting random subsets of the training set. Advantages of this formulation include explicit expressions for the classification weights of the classifier(s), its ability to incorporate several classes in a single optimization problem, and computational tractability in providing the optimal classification weights for multi-categorical separation. Computational results are also provided for two-phase flow data.

关键词： Support vector machines Support vector machine classification Linear systems Least squares methods Equations Kernel Quadratic programming Industrial engineering data flow computing Classification algorithms

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A parallel computer model supporting procedure-based communication

A parallel computer model supporting procedure-based communi...

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Supercomputing Conference

作者： J.X. Zhou Allied-Signal Aerospace Technology Center Columbia MD USA

Procedure-based communication can convert variant communication patterns of parallel computation to a simple data sending and receiving process. The author describes a general-purpose, MIMD parallel architecture that effectively supports the procedure-based communication. The system uses a two-dimensional memory array and a multiple-bus system as data transfer media. The system eliminates bus contention and reduces memory access conflicts. In spite of its partially shared memory, the architecture guarantees direct data access for all processors if a procedure-based communication is used.< >

关键词： Concurrent computing Communication system control Parallel programming Parallel processing data flow computing Parallel architectures Logic programming data communication Communication networks Writing

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A vectorized systolic array for block constrained RLS

A vectorized systolic array for block constrained RLS

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International Conference on Acoustics, Speech, and Signal Processing (ICASSP)

作者： H. Sakai M. Kuroda Faculty of Engineering Kyoto University Kyoto Japan

A new vectorized systolic array for computing the weights of the block recursive least squares (RLS) with p linear constraints is proposed. Using the idea of M-invariant matrices, an upper triangular array for updating R/sub n/ of the modified QR decomposition of the data matrix is first derived where the first p rows corresponding to the constraints are in a frozen mode. Next, a lower triangular array for updating R/sub n//sup -T/ is derived where the first p rows are in no operation mode. Connecting these two arrays, the overall near rhombic array is obtained for computing the weights. Also, the numerical stability of the algorithm is examined by simulations.< >

关键词： Systolic arrays Resonance light scattering Least squares methods Joining processes Throughput Matrix decomposition Numerical stability Computational modeling Array signal processing data flow computing

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Image Pre-processing for Micro Nucleuses Detection in Lymphocyte

Image Pre-processing for Micro Nucleuses Detection in Lympho...

引用

IEEE International Workshop on Intelligent data Acquisition and Advanced computing Systems: Technology and Applications

作者： Domenico Luca Carni Domenico Grimaldi Francesco Lamonaca Department of Electronics Computer and System Sciences University of Calabria Rende Cosenza Italy

The paper presents a method pointed out to detect and to correct the alterations of(i) under-exposure, (ii) over-exposure, (iii) out of focus, (iv) Gaussian noise, affecting the images acquired into the flow cytometer. These alterations reduce the image quality and interfere with the correct micro nucleus detection in lymphocyte. The objective of the proposed correction is to make the image able to be correctly processed by the pattern matching algorithm (i) to detect the micronucleus into human lymphocytes, (ii) to minimize the doubtful detections, and (iii) to enhance the confidence that in the rejected images are not including the micro nucleuses. The results of numerical tests confirm the validity of the proposed correction method.

关键词： Pattern matching Pixel Gaussian noise Image quality data flow computing Humans Testing Conferences data acquisition Paper technology

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Area and time efficient modular multiplication of large integers

Area and time efficient modular multiplication of large inte...

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International Conference on Application Specific Systems (ASAP), Architectures and Processors

作者： V. Bunimov M. Schimmler Institute of Computer and Communication Network Engineering Technical University of Braunschweig Germany

A new modular multiplication algorithm and its corresponding architecture is presented. It is optimised with respect to hardware complexity and latency. Based on the dataflow of the well known interleaved modular multiplication the product of two n-bit-integers X and Y modulo M is computed by n iterations of a simple loop. The loop consists of one single carry save addition, a comparison of constant complexity, and a table lookup, where the table contains 6 precomputed values and two constants. By this construction the arithmetical complexity of the modular multiplication is reduced to n additions without carry propagation in total which leads to a speedup of at least two in comparison to all methods previously known. It consists of a first algorithm A2 implementing the new idea of combining carry save addition and constant time comparison. A2 is not optimal with respect to area and time. Its correctness is proven. By use of a small amount of precomputing the loop of A2 can be modified such that the effort within the loop is minimised. This leads to the algorithm A3 and it is verified.

关键词： Computer networks Communication networks Electronic mail Hardware Arithmetic Educational institutions Computer architecture Delay data flow computing Table lookup

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Activity Counter: New Optimization for the dynamic scheduling of SIMD Control flow

Activity Counter: New Optimization for the dynamic schedulin...

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International Conference on Parallel Processing (ICPP)

作者： Ronun Keryell Nicolas Paris Ecole des Mines de Paris Centre de Recherche en Informatique Fontainebleau France Hyperparallel Technologies Ecole Poly technique X POLE Palaiseau France

SIMD or vector computers and collection-oriented languages, like C*, are designed to perform the same computation on each data item or on just a subset of the data. Subsets of processors or data items implemented via an activiry bit and a stack of activity bits when subsets of subsets are supported. This method is also used in VLIW processors through if-conversion to implement paralalle1 control flow as in SIMD computers. Wt present a new method of dynamic scheduling of several SIMD control flow constructions which can be nested.

关键词： Counting circuits Dynamic scheduling Parallel processing Turning Hardware Application software Parallel machines data flow computing Differential equations Boundary conditions

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Estimating uncaught exceptions in Standard ML programs from type-based equations

Estimating uncaught exceptions in Standard ML programs from ...

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IEEE Annual International Computer Software and Applications Conference (COMPSAC)

作者： Kwangkeun Yi Sukyoung Ryu Ki-Hyun Pyun Department of Computer Science Korea Advanced Institute of Science and Technology Daejeon South Korea

ISBN: (纸本)0818675799

We present a static analysis that detects potential runtime exceptions that are raised and never handled inside Standard ML (SML) programs. Contrary to our earlier method (Yi, 1994) based on abstract interpretation, where the input program's control flow is simultaneously computed while our exception analysis progresses, we separate the two phases in a manner similar to conventional data flow analysis. Before the exception analysis begins, we first estimate the input program's control flow from the type information from SML/NJ compiler. Based on this call-graph structure, exception flow is specified as a set of equations, whose solution is computed using an iterative least fixpoint method. A prototype of this analysis is applied to two realistic SML programs (ML-LEX and OR-SML core) and is 3 or 40 times faster than the earlier method and saves memory by 35 or 65 percent.

关键词： Maximum likelihood estimation Equations Safety Computer science Runtime data analysis Programming profession data flow computing Information analysis Program processors

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Motion from images: image matching, parameter estimation and intrinsic stability

Motion from images: image matching, parameter estimation and...

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Workshop on Visual Motion

作者： J. Weng T.S. Huang N. Ahuja Coordinated Science Laboratory University of Illinois Urbana IL USA Coordinated Sci. Lab. Illinois Univ. Urbana IL USA

Presents an image-matching algorithm that uses multiple attributes associated with a pixel to yield a generally overdetermined system of constraints. taking into account possible structural discontinuities and occlusions. Both top-down and bottom-up data flows are used in a multiresolution computational structure. The matching algorithm computes dense displacement fields and the associated occlusion maps. The motion and structure parameters are estimated through optimal estimation (e.g. maximal likelihood) using the solution of a linear algorithm as an initial guess. To investigate the intrinsic stability of the problem in the presence of noise, a theoretical lower bound on error variance of the estimates, the Cramer-Rao bound, is determined for motion parameters.< >

关键词： Image matching Parameter estimation Stability Motion estimation Layout Image motion analysis Image sequences Pixel data flow computing Computer vision

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Introspection: a low overhead binding technique during self-diagnosing microarchitecture synthesis

Introspection: a low overhead binding technique during self-...

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Design Automation Conference

作者： B. Iyer R. Karri Department of Electrical & Computer Engineering University of Massachusetts Amherst Amherst MA USA

Introspection, a zero-overhead binding technique during self-diagnosing microarchitecture synthesis is presented. Given a scheduled control data flow graph (CDFG) introspective binding exploits the spare computation and data transfer capacity in a synergistic fashion to achieve low latency fault diagnostics with near zero area overheads without compromising the performance. The resulting on-chip fault latencies are one ten-thousandth (10/sup -4/) of previously reported system level diagnostic techniques. A novel feature of the proposed technique is the use of spare data transfer capacity in the interconnect network for diagnostics.

关键词： Microarchitecture Fault detection Delay Hardware Permission Fault diagnosis Processor scheduling data flow computing Very large scale integration High level synthesis

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Algorithm level re-computing-a register transfer level concurrent error detection technique 01

Algorithm level re-computing-a register transfer level concu...

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IEEE International Conference on Computer-Aided Design

作者： K. Wu R. Karri Department of Electrical and Computer Engineering Polytechnic University Brooklyn NY USA

ISBN: (纸本)9780780372498

In this paper we propose two algorithm-level time redundancy based Concurrent Error Detection (CED) schemes that exploit diversity in a Register Transfer (RT) level implementation. RT level diversity can be achieved either by changing the operation-to-operator allocation (allocation diversity) or by shifting the operands before re-computation (data diversity). By enabling a fault to affect the normal result and the re-computed result in two different ways, RT level diversity yields good CED capability with low area overhead. We used Synopsys Behavior Compiler (BC) to implement the technique.

关键词： Redundancy Circuit faults Hardware Registers Computer errors Error correction Fault detection Logic Combinational circuits data flow computing

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