This paper describes a new Central Traffic Control System (CTCS), implemented in several sites in Europe, and also in Haifa, Israel. The CTCS implemented in Haifa contains enhanced capabilities. While it incorporates ...
详细信息
This paper describes a new Central Traffic Control System (CTCS), implemented in several sites in Europe, and also in Haifa, Israel. The CTCS implemented in Haifa contains enhanced capabilities. While it incorporates the general philosophy of on- and off-line traffic signalization control, the CTCS also coordinates its control strategies with supporting units, namely, electronic signs for drivers, closed-circuit TV system, priority for transit vehicles, and for emergency vehicles. In addition, this CTCS allows for coordination with advanced optimization software aimed at optimal online traffic signalization control, for both congested and uncongested traffic flow situations.< >
The high sample-rates involved in many DSP-applications, require the use of static schedulers wherever possible. The construction of static schedules however is classically limited to applications that fit in the sync...
详细信息
The high sample-rates involved in many DSP-applications, require the use of static schedulers wherever possible. The construction of static schedules however is classically limited to applications that fit in the synchronous dataflow model. In this paper we present cyclo-static dataflow as a model to describe applications with a cyclically changing behaviour and build a static schedule for them as well. We also propose a new scheduling method for both multi-rate and cyclo-static applications. Characteristic for this method is that the graph does not need to be transformed into a single-rate equivalent. The new scheduling technique has been implemented in GRAPE-II (Graphical RApid Prototyping Environment).
A new method was developed by Palo Verde Nuclear Generating Station (PVNGS) electrical design engineering personnel to update the plant auxiliary power system loading, voltage regulation, and short circuit calculation...
详细信息
A new method was developed by Palo Verde Nuclear Generating Station (PVNGS) electrical design engineering personnel to update the plant auxiliary power system loading, voltage regulation, and short circuit calculations. Innovative techniques were used to model all significant circuit elements and switching arrangements of the AC distribution system from the switchyard to the terminals of all three-phase load equipment. A computer program was developed in-house to interpret the network model, retrieve component data from existing databases, and generate comprehensive load flow, voltage, and short circuit results. The program provides a means to quickly and easily run "what if" scenarios to analyze any credible plant event. This method has provided plant engineers with a flexible and readily-available tool which has resulted in a better understanding of the distribution system performance and a fully auditable, easy to maintain calculation.< >
In this paper we address the behavioral modeling of cell processing hardware (e.g., packet/ATM switching systems). We propose a modeling methodology, Action Diagrams, in which the timing and protocol aspects are speci...
详细信息
In this paper we address the behavioral modeling of cell processing hardware (e.g., packet/ATM switching systems). We propose a modeling methodology, Action Diagrams, in which the timing and protocol aspects are specified in a nearly "orthogonal" way to the data manipulation aspects, while maintaining the links between the two. We show the novel aspects of this specification paradigm and we illustrate its use on cell processing applications.< >
This paper presents a static dataflow graph model, where only data tokens are allowed to flow. The proposed model is formally described, and the dataflow graph is obtained by employing only actors with homogeneous I/O...
详细信息
This paper presents a static dataflow graph model, where only data tokens are allowed to flow. The proposed model is formally described, and the dataflow graph is obtained by employing only actors with homogeneous I/O conditions. Each actor, which executes an elemental operation, is characterized by having one output and two input arcs. Even though no control tokens are allowed, so that no T-gate, merge, and switch actors are present in this model, it is always possible to represent conditional and iterative structures whose behavior is well-behaved. As homogeneous I/O conditions are a severe restriction to represent the flow of a computation and the token flow in such dataflow graphs is completely asynchronous, proof is given to guarantee their determinacy.< >
There have been many algorithms to speed up the learning time of backpropagation. However, most of them do not take into consideration the amount of hardware required to implement the algorithm. Without suitable hardw...
详细信息
There have been many algorithms to speed up the learning time of backpropagation. However, most of them do not take into consideration the amount of hardware required to implement the algorithm. Without suitable hardware implementation, the real promise of neural network applications will be difficult to achieve. Since multiply dominates computation and is expensive in hardware, this paper proposes a method to reduce the number of multiplies in the backward path of backpropagation algorithm by setting some neuron errors to zero. It proves the convergence theorem by the general Robbins-Monro process, a stochastic approximation process.< >
We introduce the HyperC language, a data parallel extension of C intended for portability over a wide range of architectures. We present the main topics of the language: the explicit parallelism through the data, the ...
详细信息
We introduce the HyperC language, a data parallel extension of C intended for portability over a wide range of architectures. We present the main topics of the language: the explicit parallelism through the data, the synchronous semantics and the parallel flow control that allows asynchronous execution, new function qualifiers to emphasize locality properties code and, finally, new communication techniques to allow overlap of communications and computations even for irregular computations. All these features are discussed with respect to portability and code reusability issues.< >
Presents a new algorithm for computing lower bounds on the number of functional units (FUs) required to schedule a dataflow graph in a specified number of control steps. We use a formal approach to compute the bounds...
详细信息
Presents a new algorithm for computing lower bounds on the number of functional units (FUs) required to schedule a dataflow graph in a specified number of control steps. We use a formal approach to compute the bounds that can be proven to be tighter than those produced by existing methods, and that considers the interdependencies of the bounds on the different FU-types. This quick, yet accurate estimation of the number of FUs is used to generate resource constraints for a design, and thus reduce the design space.< >
A cooperative integration of stereopsis and optic flow computation is presented. Central to our approach is the modelling of the visual processes as a sequence of coupled Markov random fields by defining suitable inte...
详细信息
A cooperative integration of stereopsis and optic flow computation is presented. Central to our approach is the modelling of the visual processes as a sequence of coupled Markov random fields by defining suitable interprocess interactions based on some natural constraints. The integration makes each of the individual processes better constrained and more reliable. Further, as a result of the integration, it becomes possible to accurately preserve the discontinuities in both the flow and the disparity fields along with the regions of stereo occlusion. Some results, both on noisy synthetic image data and real images are presented.
In this paper we describe a new parallel computer architecture called Tr-machine. Tr-machine instruction set architecture combines reduction with traditional approaches. The architecture uses two types of processing u...
详细信息
In this paper we describe a new parallel computer architecture called Tr-machine. Tr-machine instruction set architecture combines reduction with traditional approaches. The architecture uses two types of processing units and a tree structured organized as a balanced tree. The leaf nodes are called C-nodes and they perform the computation. The internal nodes are called S-nodes. The S-nodes facilitate communication and keep track of different parallel computations.< >
暂无评论