In distributed computer environments and parallel applications many factors determine system performance. The main problem in increasing the performance of such systems is the impact of synchronization on the processo...
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In distributed computer environments and parallel applications many factors determine system performance. The main problem in increasing the performance of such systems is the impact of synchronization on the processor utilization. Synchronization overhead is caused mainly by intrinsic properties of the application (inherent parallelism, data and control dependencies, etc.) and by architectural and organizational features of the system. Experiments are discussed which concern the profiling of a distributed system, based on the client model. The basic goals are to compare the simulation results, such as parallelism profile, synchronization profile and speed-up profile, produced by a profiler tool and the similar results produced by the execution of the prototype implementation. Both kinds of results are presented, and the limitations and advantages of the simulation approach are discussed.< >
Modern applications are often defined as sets of several computational tasks. This paper presents a synthesis algorithm for ASIC implementations which realize multiple computational tasks under hard real-time deadline...
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Modern applications are often defined as sets of several computational tasks. This paper presents a synthesis algorithm for ASIC implementations which realize multiple computational tasks under hard real-time deadlines. The algorithm analyzes constraints imposed by task sharing as well as the traditional datapath synthesis criteria. In particular we demonstrated an efficient technique to combine rate-monotonic scheduling, a widely used hard real-time systems scheduling discipline, with estimations and scheduling and allocation algorithms. Matching the number of bits in tasks assigned to the same processor was the most important factor in obtaining good designs. We have demonstrated the effectiveness of our algorithms on several multiple-task examples.
Describes work in progress towards development of integrated pen-based software systems for processing visual languages (VL). The primary assumption is that graphical input, editing and VL parsing facilities can be tr...
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Describes work in progress towards development of integrated pen-based software systems for processing visual languages (VL). The primary assumption is that graphical input, editing and VL parsing facilities can be treated as system resources to be shared among many applications. Prototypes of a pen-stroke editor, VL parser, and VL-based application are described.< >
Our research addresses "information appliances' used in modern large-scale distributed systems to: (1) virtualize their dataflows by applying actions such as filtering, format translation, etc., and (2) sepa...
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Our research addresses "information appliances' used in modern large-scale distributed systems to: (1) virtualize their dataflows by applying actions such as filtering, format translation, etc., and (2) separate such actions from enterprise applications' business logic, to make it easier for future service-oriented codes to inter-operate in diverse and dynamic environments. Our specific contribution is the enrichment of runtimes of these appliances with methods for QoS-awareness, thereby giving them the ability to deliver desired levels of QoS even under sudden requirement changes - IQ-appliances. For experimental evaluation, we prototype an IQ-appliance. Measurements demonstrate the feasibility and utility of the approach.
We present an innovative methodology aimed at rapidly designing image processing systems. Within this environment the first step consists in emulating an IP algorithm on a massively parallel dedicated computer. A comp...
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We present an innovative methodology aimed at rapidly designing image processing systems. Within this environment the first step consists in emulating an IP algorithm on a massively parallel dedicated computer. A compact and functionally equivalent VLSI circuit is then derived by using a high level synthesis system called ALPHA. The whole methodology is presented and illustrated with an IP algorithm effectively designed.
Network accountability and forensic analysis have become increasingly important, as a means of performing network diagnostics, identifying malicious nodes, enforcing trust management policies, and imposing diverse bil...
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Network accountability and forensic analysis have become increasingly important, as a means of performing network diagnostics, identifying malicious nodes, enforcing trust management policies, and imposing diverse billing over the Internet. This has led to a series of work to provide better network support for accountability, and efficient mechanisms to trace packets and information flows through the Internet. In this paper, we make the following contributions. First, we show that network accountability and forensic analysis can be posed generally as data provenance computations and queries over distributed streams. In particular, one can utilize declarative networks with appropriate security and provenance extensions to provide a unified declarative framework for specifying, analyzing and auditing networks. Second, we propose a taxonomy of data provenance along multiple axes, and show that they map naturally to different use cases in networks. Third, we suggest techniques to efficiently compute and store network provenance, and provide an initial performance evaluation on the P2 declarative networking system with modifications to support authenticated communication and provenance.
This paper presents an overview of VisiTile-a toolkit for developing domain-oriented visual languages. The class of visual languages that can be constructed with VisiTile is briefly described, followed by examples of ...
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This paper presents an overview of VisiTile-a toolkit for developing domain-oriented visual languages. The class of visual languages that can be constructed with VisiTile is briefly described, followed by examples of such languages. An overview of the VisiTile architecture is presented, including discussion of the major components and features of the toolkit. The VisiTile toolkit facilitates the specification and implementation of a hybrid class of visual languages that combine data-flow with grammar-based layout. A two-dimensional layout grammar is used to specify legal constructions of data-flow processors. The language specification is used as the basis for syntax-directed editing and interpretation of visual programs.
Dynamic-level scheduling is an effective compile-time scheduling technique which accounts for interprocessor communication overhead when mapping precedence-constrained, communicating tasks onto arbitrarily interconnec...
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Dynamic-level scheduling is an effective compile-time scheduling technique which accounts for interprocessor communication overhead when mapping precedence-constrained, communicating tasks onto arbitrarily interconnected processor networks. Scheduling and routing are performed simultaneously to account for limited interconnections between processors, and communications are scheduled along with computations to eliminate shared-resource contention. The paper extends the dynamic-level scheduling methodology to encompass heterogeneous processing environments, and presents two techniques designed to enhance scheduling performance: forward/backward scheduling, and precedence constraint appendage.< >
The study is concerned with the development of real time distributed applications and more precisely with the verification of temporal properties in a distributed context (taking into account the characteristics of th...
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The study is concerned with the development of real time distributed applications and more precisely with the verification of temporal properties in a distributed context (taking into account the characteristics of the real architecture). We show how to use a time Petri net based model of the application in order to prove that a communication system (networks, protocols) and a mapping of tasks meet specified temporal properties.
We discuss the scalability challenges facing the optical networks. Using the architecture based on spectrum-sliced elastic optical path network (SLICE), we demonstrate how the networking functionality can be effective...
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We discuss the scalability challenges facing the optical networks. Using the architecture based on spectrum-sliced elastic optical path network (SLICE), we demonstrate how the networking functionality can be effectively shifted to the optical domain.
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