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Thwarting Adversarial Network Reconnaissance Through Vulnerability Scan Denial and Deception with data plane programming and P4

Thwarting Adversarial Network Reconnaissance Through Vulnera...

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41st IEEE Military Communications Conference (IEEE MILCOM) - Communications Supporting Military Operations in a Contested Environment

作者： Ha, Sean Smith, Gavin Starr, Robert Mitre Corp Mclean VA 22102 USA

ISBN: (纸本)9798350321814

This paper presents a novel application of data-plane programming technology for denial, deception, and engagement with cyber adversaries that are performing active network reconnaissance: specifically, a network-based vulnerability assessment. data-plane programming enables "programmable" network switches and routers to manipulate and modify the overall structure of network traffic packets, with the goal of zeroing out (nulling) metadata signatures that serve as indicators of vulnerability, which an adversary may use as intel to inform and guide their attacks. This proposed approach targets manipulation of network scan packets to present a distorted, deceptive state of the network's attack surface and vulnerability landscape.

关键词： P4 data plane programming Deception Denial Adversary Engagement Vulnerability Scanning NESSUS Nmap Software Defined Networking

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Experimental comparison of software switches for data plane programming language P4-BMv2 and T4P4S- 12

Experimental comparison of software switches for data plane ...

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12th International Conference on Networks, Communication and Computing (ICNCC)

作者： Kumazoe, Kazumi Shibata, Masahirto Tsuru, Masato Kyushu Inst Technol Kitakyushu Fukuoka Japan

ISBN: (纸本)9798400709265

The data-plane programming language P4 has been supported in various environments, such as software switches, smart NICs, and hardware switches. BMv2, a basic software P4 switch, can run in the mininet (an emulation environment) as well as in actual devices, facilitating verification of functions realized by P4 programming. However, BMv2 suffers from poor performance depending on the functions to implement. Therefore, this report provides an experimental comparison of the operational and performance characteristics of typical baseline functions between BMv2 and a DPDK-based software P4 switch built by the T4P4S P4 compiler. The results show that the T4P4S-based software switch can outperform BMv2 in several scenarios. On the other hand, since some baseline functions provided by the standard BMv2 are not implemented in the T4P4S compiler, those functions were implemented in C language for our experiments.

关键词： data plane programming P4 BMv2 DPDK T4P4S

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Experimental comparison of software switches for data plane programming language P4-BMv2 and T4P4S- 23

Experimental comparison of software switches for data plane ...

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Proceedings of the 2023 12th International Conference on Networks, Communication and Computing

作者： Kazumi Kumazoe Masahirto Shibata Masato Tsuru Kyushu Institute of Technology Japan

ISBN: (纸本)9798400709265

关键词： BMv2 DPDK P4 T4P4S data plane programming

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Deep data plane programming and AI for zero-trust self-driven networking in beyond 5G

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COMPUTER NETWORKS 2022年第0期203卷 108668-108668页

作者： Hireche, Othmane Benzaid, Chafika Taleb, Tarik Aalto Univ Espoo Finland Univ Oulu Oulu Finland Sejong Univ Seoul South Korea

Along with the high demand for network connectivity from both end-users and service providers, networks have become highly complex;and so has become their lifecycle management. Recent advances in automation, data analysis, artificial intelligence, distributed ledger technologies (e.g., Blockchain), and data plane programming techniques have sparked the hope of the researchers' community in exploring and leveraging these techniques towards realizing the much-needed vision of trustworthy self-driving networks (SelfDNs). In this vein, this article proposes a novel framework to empower fully distributed trustworthy SelfDNs across multiple domains. The framework vision is achieved by exploiting (i) the capabilities of programmable data planes to enable real-time in-network telemetry collection;(ii) the potential of P4 - as an important example of data plane programming languages - and AI to (re)write the source code of network components in a fashion that the network becomes capable of automatically translating a policy intent into executable actions that can be enforced on the network components;and (iii) the potential of blockchain and federated learning to enable decentralized, secure and trustable knowledge sharing between domains. A relevant use case is introduced and discussed to demonstrate the feasibility of the intended vision. Encouraging results are obtained and discussed.

关键词： AI Federated learning Blockchain Zero trust P4 data plane programming Self driving network 5G and beyond networks

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NetCRC-NR: In-Network 5G NR CRC Accelerator

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IEEE TRANSACTIONS ON COMPUTERS 2025年第4期74卷 1418-1430页

作者： Naji, Abdulbary Wang, Xingfu Liu, Ping Hawbani, Ammar Zhao, Liang Xu, Xiaohua Miao, Fuyou Univ Sci & Technol China Sch Comp Sci & Technol Hefei 230027 Peoples R China Shenyang Aerosp Univ Sch Comp Sci Shenyang 110136 Peoples R China

In 5G Radio Access Networks (RAN), Cyclic Redundancy Check (CRC) algorithms play a vital role in detecting accidental changes to digital data during transmission. However, due to the massive bandwidth demands in 5G networks, CRC computation is a resource-intensive process. To address this challenge, we propose performing CRC computation and verification directly in the network path. Specifically, we introduce NetCRC-NR, a 5G New Radio (NR) standard-compliant in-network CRC accelerator. NetCRC-NR implements the 5G NR CRC algorithms specified in 3GPP TS 38.212, including CRC24A, CRC24B, CRC24C, CRC16, CRC11, and CRC6. It leverages programmable switches to perform in-network CRC generation and validation for the Transport Blocks (TBs) and Code Blocks (CBs), aiming at providing high CRC computation throughput and alleviating the computational burden on General-Purpose Processors (GPPs). We design and implement NetCRC-NR on Intel Tofino programmable switch and commodity servers running the data plane Development Kit (DPDK). Extensive experiments demonstrate that NetCRC-NR performs CRC generation and verification at the switch line rate of up to 4+Tbps CRC throughput, showcasing its efficiency and potential in accelerating the 5G RAN error detection process.

关键词： 5G mobile communication Protocols Computer architecture Pipelines Baseband Throughput Computers Program processors Hardware acceleration Costs Hardware accelerators CRC accelerators RAN in-network computing DPDK data plane programming P4 5G NR

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NetMod: Toward Accelerating Cloud RAN Distributed Unit Modulation Within Programmable Switches

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IEEE TRANSACTIONS ON COMPUTERS 2025年第2期74卷 665-677页

作者： Naji, Abdulbary Wang, Xingfu Hawbani, Ammar Ghannami, Aiman Zhao, Liang Xu, Xiaohua Zhao, Wei Univ Sci & Technol China Sch Comp Sci & Technol Hefei 230027 Peoples R China Shenyang Aerosp Univ Sch Comp Sci Shenyang 110136 Peoples R China Eindhoven Univ Technol Dept Math & Comp Sci NL-5600 MB Eindhoven Netherlands Anhui Univ Technol Sch Comp Sci & Technol Maanshan 243032 Peoples R China

Radio Access Networks (RAN) are anticipated to gradually transition towards Cloud RAN (C-RAN), leveraging the full advantages of the cloud-native computing model. While this paradigm shift offers a promising architectural evolution to improve scalability, efficiency, and performance, significant challenges remain in managing the massive computing requirements of physical layer (PHY) processing. To address these challenges and meet the stringent Service Level Objectives (SLOs) in 5G networks, hardware acceleration technologies are essential. In this paper, we aim to mitigate this challenge by offloading 5G modulation mapping, a critical yet demanding function to encode bits into IQ symbols, directly onto the switch ASICs. Specifically, we introduce NetMod, a 5G New Radio (NR) standard-compliant in-network modulation mapper accelerator. NetMod leverages the capabilities of new-generation programmable switches within the C-RAN infrastructure to offload and accelerate PHY modulation functions. We implemented a NetMod prototype on a real-world platform using the Intel Tofino programmable switch and commodity servers running the data plane Development Kit (DPDK). Through extensive experiments, we demonstrate that NetMod achieves modulation mapping at switch line rate using minimal switch resources, thereby preserving ample space for traditional switching tasks. Furthermore, comparisons with a GPU-based 5G modulation mapper show that NetMod is 2.2x to 3.3x faster using only a single switch port. These results highlight the potential of in-network acceleration to enhance 5G network performance and efficiency.

关键词： Modulation Symbols 5G mobile communication Servers Protocols Payloads Hardware acceleration Throughput Open RAN Computers Hardware accelerators cloud RAN in-network computing DPDK data plane programming P4 5G NR O-RAN modulation

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P4-PSFP: P4-Based Per-Stream Filtering and Policing for Time-Sensitive Networking

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IEEE TRANSACTIONS ON NETWORK AND SERVICE MANAGEMENT 2024年第5期21卷 5273-5290页

作者： Ihle, Fabian Lindner, Steffen Menth, Michael Univ Tubingen Chair Commun Networks D-72076 Tubingen Germany

Time-Sensitive Networking (TSN) extends Ethernet to enable real-time communication. In TSN, bounded latency and zero congestion-based packet loss are achieved through mechanisms such as the Credit-Based Shaper (CBS) for bandwidth shaping and the Time-Aware Shaper (TAS) for traffic scheduling. Generally, TSN requires streams to be explicitly admitted before being transmitted. To ensure that admitted traffic conforms with the traffic descriptors indicated for admission control, Per-Stream Filtering and Policing (PSFP) has been defined. For credit-based metering, well-known token bucket policers are applied. However, time-based metering requires time-dependent switch behavior and time synchronization with sub-microsecond precision. While TSN-capable switches support various TSN traffic shaping mechanisms, a full implementation of PSFP is still not available. To bridge this gap, we present a P4-based implementation of PSFP on a 100 Gb/s per port hardware switch. We explain the most interesting aspects of the PSFP implementation whose code is available on GitHub. We demonstrate credit-based and time-based policing and synchronization capabilities to validate the functionality and effectiveness of P4-PSFP. The implementation scales up to 35840 streams depending on the stream identification method. P4-PSFP can be used in practice as long as appropriate TSN switches lack this function. Moreover, its implementation may be helpful for other P4-based hardware implementations that require time synchronization.

关键词： Streams Logic gates IEEE Standards Switches Bridges Synchronization Hardware Software-defined networking time-sensitive networking P4 per-stream filtering and policing data plane programming resilience

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MPLS Network Actions: Technological Overview and P4-Based Implementation on a High-Speed Switching ASIC

IEEE OPEN JOURNAL OF THE COMMUNICATIONS SOCIETY

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IEEE OPEN JOURNAL OF THE COMMUNICATIONS SOCIETY 2025年 6卷 3480-3501页

作者： Ihle, Fabian Menth, Michael Univ Tubingen Chair Commun Networks D-72076 Tubingen Germany

In MPLS, packets are encapsulated with labels that add domain-specific forwarding information. Special purpose labels were introduced to trigger special behavior in MPLS nodes but their number is limited. Therefore, the IETF proposed the MPLS Network Actions (MNA) framework. It extends MPLS with new features, some of which have already been defined to support relevant use cases. This paper provides a comprehensive technological overview of MNA concepts and use cases. It compares MNA to IPv6 extension headers (EHs) that serve a similar purpose, and argues that MNA can be better deployed than EHs. It then presents P4-MNA, a first hardware implementation running at 400 Gb/s per port. Scalability and performance of P4-MNA are evaluated, showing negligible impact on processing delay caused by network actions. Moreover, the applicability of MNA is demonstrated by implementing the use cases of link-specific packet loss measurement using the alternate-marking-method (AMM) and bandwidth reservation using network slicing. We identify header stacking constraints resulting from hardware resources and from the number of network actions that must be supported according to the MNA encoding. They make an implementation for hardware that can only parse a few MPLS headers infeasible. We propose to make the number of supported network actions a node parameter and signal this in the network. Then, an upgrade to MNA is also feasible for hardware with fewer available resources. We explain that for MNA with in-stack data (ISD), some header bits must remain unchanged during forwarding, and give an outlook on post-stack data (PSD).

关键词： Multiprotocol label switching Switches Hardware Encoding Protocols Stacking Network slicing Standardization Security Scalability Alternate-marking method data plane programming IETF MPLS network actions multiprotocol label switching network slicing P4 wired communications

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P4sec: Automated Deployment of 802.1X, IPsec, and MACsec Network Protection in P4-Based SDN

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IEEE ACCESS 2023年 11卷 56300-56309页

作者： Hauser, Frederik Haeberle, Marco Menth, Michael Univ Tubingen Chair Commun Networks D-72076 Tubingen Germany

802.1X, MACsec, and IPsec are widespread network security mechanisms that control network access and add encryption and authentication to L2 and L3 networking. They are standardized by IEEE and IETF, and are part of most open-source and commercial network hardware and software appliances. However, lots of manual configuration is needed for their application in traditional networks. In this work, we present P4sec, a three-tier control architecture for automated configuration of these security protocols in networks with multiple sites. P4sec leverages P4-programmable switches and operates them through distributed controllers. We briefly introduce data plane programming with P4 and give an overview of 802.1X, MACsec, and IPsec. We explain the three-tier control architecture P4sec and validate it by a prototype which is published under the Apache v2 license on GitHub. Finally, we discuss opportunities and challenges.

关键词： P4 data plane programming software-defined networking network security

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Flow Processing Optimization with Accelerated Flow Actions on High Speed Programmable data plane

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IEICE TRANSACTIONS ON COMMUNICATIONS 2023年第2期E106B卷 133-144页

作者： Ling, Zhiyuan Chen, Xiao Song, Lei Chinese Acad Sci Inst Acoust Natl Network New Media Engn Res Ctr Beijing 100190 Peoples R China Univ Chinese Acad Sci Beijing Peoples R China

With the development of network technology, next -generation networks must satisfy many new requirements for network func-tions and performance. The processing of overlong packet fields is one of the requirements and is also the basis for ID-based routing and con-tent lookup, and packet field addition/deletion mechanisms. The current SDN switches do not provide good support for the processing of overlong fields. In this paper, we propose a series of optimization mechanisms for protocol-oblivious instructions, in which we address the problem of insuf-ficient support for overlong data in existing SDN switches by extending the bit width of instructions and accelerating them using SIMD instruction sets. We also provide an intermediate representation of the protocol-oblivious instruction set to improve the efficiency of storing and reading instruction blocks, and further reduce the execution time of instruction blocks by pre-processing them. The experiments show that our approach improves the performance of overlong data processing by 56%. For instructions involving packet field addition and deletion, the improvement in performance reaches 455%. In normal forwarding scenarios, our solution reduces the packet forwarding latency by around 30%.

关键词： SDN switch data plane programming acceleration instruction set flow processing

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