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Integrating Transactions into the data-Driven Multi-threading model Using the TFlux Platform

INTERNATIONAL JOURNAL OF PARALLEL PROGRAMMING 2016年第2期44卷 257-277页

作者： Diavastos, Andreas Trancoso, Pedro Lujan, Mikel Watson, Ian Univ Cyprus Dept Comp Sci POB 20537 CY-1678 Nicosia Cyprus Univ Manchester Sch Comp Sci Oxford Rd Manchester M13 9PL Lancs England

The introduction of multi-core processors has renewed the interest in programming models which can efficiently exploit general purpose parallelism. data-flow is one such model which has demonstrated significant potential in the past. However, it is generally associated with functional styles of programming which do not deal well with shared mutable state. There have been a number of attempts to introduce state into data-flow models and functional languages but none have proved able to maintain the simplicity and efficiency of pure data-flow parallelism. Transactional memory is a concurrency control mechanism that simplifies sharing data when developing parallel applications while at the same time promises to deliver affordable performance. In this paper we report our experience of integrating Transactional Memory and data-flow within the TFlux Platform. The ability of the data-flow model to expose large amounts of parallelism is maintained while Transactional Memory provides simplified sharing of mutable data in those circumstances where it is important to the expression of the program. The isolation property of transactions ensures that the exploitation of data-flow parallelism is not compromised. In this study we extend the TFlux platform, a data-Driven Multi-threading implementation, to support transactions. We achieve this by proposing new pragmas that allow the programmer to specify transactions. In addition we extend the runtime functionality by integrating a software transactional memory library with TFlux. To test the proposed system, we ported two applications that require transactional memory: Random Counter and Labyrinth an implementation of Lee's parallel routing algorithm. Our results show good opportunities for scaling when using the integration of the two models.

关键词： Programming models Future multi-cores Transactional Memory data-flow model data-Driven Multi-threading

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Fast Scheduling in Distributed Transactional Memory

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THEORY OF COMPUTING SYSTEMS 2021年第2期65卷 296-322页

作者： Busch, Costas Herlihy, Maurice Popovic, Miroslav Sharma, Gokarna Augusta Univ Augusta GA 30912 USA Brown Univ Providence RI 02912 USA Univ Novi Sad Novi Sad Serbia Kent State Univ Kent OH 44242 USA

We investigate scheduling algorithms for distributed transactional memory systems where transactions residing at nodes of a communication graph operate on shared, mobile objects. A transaction requests the objects it needs, executes once those objects have been assembled, and then possibly forwards those objects to other waiting transactions. Minimizing execution time in this model is known to be NP-hard for arbitrary communication graphs, and also hard to approximate within any factor smaller than the size of the graph. Nevertheless, networks on chips, multi-core systems, and clusters are not arbitrary. Here, we explore efficient execution schedules in specialized graphs likely to arise in practice: Clique, Line, Grid, Cluster, Hypercube, Butterfly, and Star. In most cases, when individual transactions request k objects, we obtain solutions close to a factor O(k) from optimal, yielding near-optimal solutions for constant k. These execution times approximate the TSP tour lengths of the objects in the graph. We show that for general networks, even for two objects (k = 2), it is impossible to obtain execution time close to the objects' optimal TSP tour lengths, which is why it is useful to consider more realistic network models. To our knowledge, this is the first attempt to obtain provably fast schedules for distributed transactional memory.

关键词： Transactional memory Distributed systems Execution time Approximation data-flow model Scheduling Contention

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PSEUDO-ASSOCIATIVE STORE WITH HARDWARE HASHING

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IEE PROCEEDINGS-E COMPUTERS AND DIGITAL TECHNIQUES 1983年第1期130卷 19-24页

作者： DASILVA, JGD WATSON, I Department of Computer Science University of Manchester Manchester UK

In the data-flow model of computation instruction, execution is determined by the availability of data rather than by an explicit or implicit sequential flow of control. One of the major problems in the architectural design of a data-flow computer is the detection of the availability of data. This problem is compounded if the data carry context information as well as pointers to the instructions that will use them; an instruction is then executable when all data directed to it within the same context are present. The solution adopted in the Manchester design is to limit the maximum number of operands of an instruction to two, and to use associative storage techniques to detect the presence of data. The use of true content addressable memory is precluded by its small density and high cost, and therefore a pseudo-associative store using hardware hashing techniques and implemented with conventional random-access memory is employed. The concept of sequence in the data-flow model of computation is unimportant; as a result search operations do not have to be resolved in the same sequence that the store is interrogated. This suggests a design which uses a main parallel hash table and a separate overflow mechanism operating in parallel. In this manner, an overflow search need not halt the progress of further main hash table searches. A pseudo-associative store results whose average access time is very close to the cycle time of the original randon-access memory.

关键词： content-addressable memory Computer architecture data-flow model hardware hashing techniques content-addressable storage computer architecture pseudo-associative store parallel hash table Storage system design overflow mechanism

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Dynamic scheduling in distributed transactional memory

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DISTRIBUTED COMPUTING 2022年第1期35卷 19-36页

We investigate scheduling algorithms for distributed transactional memory systems where transactions residing at nodes of a communication graph operate on shared, mobile objects. A transaction requests the objects it needs, executes once those objects have been assembled, and then sends the objects to other waiting transactions. We study scheduling algorithms with provable performance guarantees. Previously, only the offline batch scheduling setting was considered in the literature where transactions are known a priori. Minimizing execution time, even for the offline batch scheduling, is known to be NP-hard for arbitrary communication graphs. In this paper, we analyze for the very first time scheduling algorithms in the online dynamic scheduling setting where transactions are not known a priori and the transactions may arrive online over time. We provide efficient and near-optimal execution time schedules for dynamic scheduling in many specialized network architectures. The core of our technique is a method to convert offline schedules to online. We first describe a centralized scheduler which we then adapt to a purely distributed scheduler. To our knowledge, these are the first attempts to obtain provably efficient online execution schedules for distributed transactional memory.

关键词： Transactional memory Distributed systems Execution time data-flow model Dynamic scheduling

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PACKING SEQUENTIAL STRETCHES IN THE MDFM

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IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS 1995年第4期E78D卷 345-354页

作者： LORENZO, P GOTO, M CATTO, AJ Gifu Univ Gifu-shi Japan

The Manchester dataflow Machine (MDFM) works with tasks of size equal to one single instruction. This fine granularity aims at exploring all parallelism at the instruction level. However, this project decision increases the instruction communication cost, which ends up to jam the interconnection network and reduces the system performance. One way to skirt this problem is to adopt variable size tasks instead of working with such small task size. In this paper, in order to study whether or not the usage of such variable size tasks in the MDFM architecture contributes to the improvement of the performance, some simulations by toy programs take place. In the simulation, variable size tasks are realized by packing the sequential instruction stretches into one task. To manage this packing, the Sequential Block (SE) technique is developed. The simulation of those packed and unpacked programs give an outline of advantages and disadvantages of working with variable size tasks, and how the SE technique should be implemented in the system.

关键词： data-flow model MANCHESTER data-flow MACHINE PARALLEL ARCHITECTURE PARTITIONING OF PARALLEL PROGRAMS TASK PACKING

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Intellectual Property (IP) Integration Approach for data-flow Parallel Embedded Systems 4th

Intellectual Property (IP) Integration Approach for Data-Flo...

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4th International ICST Conference on E-Infrastructure and E-Services for Developing Countries (AFRICOMM)

作者： Chana, Anne Marie Quinton, Patrice Univ Yaounde I Natl High Sch Polytech Yaounde Cameroon Univ Europeenne Bretagne ENS Cachan Bretagne F-35170 Bruz France

ISBN: (纸本)9783642411786;9783642411779

The growing complexity of new chips and the time to market constraints require fundamental changes in the systems design approach. Systems on chip (SoC) based on reused components called intellectual property (IP) has become an absolute necessity to the embedded systems companies in order to remain competitive. This paper focuses on the IP reuse to design parallel and multi-frequency applications. The flexible parallel components described by the Alpha functional language are modelled and assembled using a scheduling method which combines the synchronous data-flow principle of balance equations and, the polyhedral scheduling technique. Our approach allows a flexible component to be modelled and, a full system to be assembled and synthesized by combining the component hardware descriptions with automatically generated wrappers. We discuss the relationship of this approach with stream languages, latency-insensitive design, and multidimensional data-flow systems.

关键词： IP reused flexible component SoC Polyhedral model data-flow model parallelism multi-frequency system

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Fast Scheduling in Distributed Transactional Memory 17

Fast Scheduling in Distributed Transactional Memory

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29th ACM Symposium on Parallelism in Algorithms and Architectures (SPAA)

作者： Busch, Costas Herlihy, Maurice Popovic, Miroslav Sharma, Gokarna Louisiana State Univ Baton Rouge LA 70803 USA Brown Univ Providence RI 02912 USA Univ Novi Sad Novi Sad Serbia Kent State Univ Kent OH 44242 USA

ISBN: (纸本)9781450345934

关键词： Transactional memory distributed systems execution time approximation data-flow model scheduling contention

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Dynamic Scheduling in Distributed Transactional Memory 34

Dynamic Scheduling in Distributed Transactional Memory

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34th IEEE International Parallel and Distributed Processing Symposium (IPDPS)

ISBN: (纸本)9781728168760

We investigate scheduling algorithms for distributed transactional memory systems where transactions residing at nodes of a communication graph operate on shared, mobile objects. A transaction requests the objects it needs, executes once those objects have been assembled, and then sends the objects to other waiting transactions. We study scheduling algorithms with provable performance guarantees. Previously, only the offline batch scheduling setting was considered in the literature where transactions and the objects they access are known a priori. Minimizing execution time, even for the offline batch scheduling, is known to be NP-hard for arbitrary communication graphs. In this paper, we analyze for the very first time scheduling algorithms in the online dynamic scheduling setting where transactions and the objects they access are not known a priori and the transactions may arrive online over time. We provide efficient and near-optimal execution time schedules for dynamic scheduling in many specialized network architectures. The core of our technique is a method to convert offline schedules to online. We first describe a centralized scheduler which we then adapt it to a purely distributed scheduler. To our knowledge, these are the first attempts to obtain provably efficient online execution schedules for distributed transactional memory.

关键词： Transactional memory distributed systems execution time data-flow model dynamic scheduling

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Interprocessor communication system architecture in a distributed control system environment

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IFAC Proceedings Volumes 1985年第1期18卷 107-113页

作者： G. Bhattacharyya T. Ghoshal K. Datta Electrical Engineering Department Jadavpur University Calcutta 700 032 India

In a distributed digital control system, operational relationship between 5 major functions form the logical architecture. Logical modelling using a 6 layer decision making structure, and function/layer abstract machine concept has been presented. Implementation model considers 3 level control and separate communication architecture. Formulation of communication requirements dictate 2 orders of multiple local area networks, with provisions for inter-networking. Global addressing mode is used in the network model, and frame structure derived. Modifications of CSMA/CD access method has been made for contingent use.

关键词： Broadcast systems communication CSMA/CD data-flow model hierarchical control inter-networking local area network logical architecture process control realtime systems

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