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检索条件"主题词=Dataflow Graphs"
39 条 记 录,以下是1-10 订阅
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Efficient Computation of the Max-Plus Semantics of Synchronous dataflow graphs
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IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS 2023年 第10期42卷 3412-3425页
作者: Elahi, Hossein Geilen, Marc Basten, Twan Eindhoven Univ Technol Dept Elect Engn NL-5612 AZ Eindhoven Netherlands TNO ESI NL-5656 AE Eindhoven Netherlands
Streaming systems are naturally modeled with synchronous dataflow graphs (SDFGs). The max-plus semantics of an SDFG is a compact matrix representation of its timing behavior. The max-plus semantics enables us to analy... 详细信息
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Automatic Task Parallelization of dataflow graphs in ML/DL Models  38
Automatic Task Parallelization of Dataflow Graphs in ML/DL M...
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International Parallel and Distributed Processing Symposium (IPDPS)
作者: Das, Srinjoy Rauchwerger, Lawrence Univ Illinois Urbana IL 61801 USA
Several methods exist today to accelerate Machine Learning(ML) or Deep-Learning(DL) model performance for training and inference. However, modern techniques that rely on various graph and operator parallelism methodol... 详细信息
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Allocation and Scheduling of dataflow graphs on Hybrid dataflow/von Neumann Architectures  23
Allocation and Scheduling of Dataflow Graphs on Hybrid Dataf...
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21st ACM/IEEE International Symposium on Formal Methods and Models for System Design (MEMOCODE)
作者: Bhagyanath, Anoop Kercher, Nadine Schneider, Klaus RPTU Kaiserslautern Landau Dept Comp Sci Kaiserslautern Germany
Hybrid dataflow/von Neumann processors expose their processing units and datapaths to the compiler to exploit the instruction-level parallelism of sequential programs. Generating code from dataflow graphs for such pro... 详细信息
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Consistency Constraints for Mapping dataflow graphs to Hybrid dataflow/von Neumann Architectures
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ACM TRANSACTIONS ON EMBEDDED COMPUTING SYSTEMS 2023年 第5期22卷 81-81页
作者: Schneider, Klaus Bhagyanath, Anoop RPTU Kaiserslautern Landau Dept Comp Sci Gottlieb Daimler Str D-67663 Kaiserslautern Germany
dataflow process networks (DPNs) provide a convenient model of computation that is often used to model system behavior in model-based designs. With fixed sets of nodes, they are also used as dataflow graphs as an inte... 详细信息
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Code Generation Criteria for Buffered Exposed Datapath Architectures from dataflow graphs  2022
Code Generation Criteria for Buffered Exposed Datapath Archi...
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23rd International Conference on Languages, Compilers, and Tools for Embedded System (LCTES)
作者: Schneider, Klaus Bhagyanath, Anoop Roob, Julius Univ Kaiserslautern Dept Comp Sci Kaiserslautern Germany
Many novel processor architectures expose their processing units (PUs) and internal datapaths to the compiler. To avoid an unnecessary synchronization of PUs, the datapaths are often buffered which results in buffered... 详细信息
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Incremental Analysis of Cyclo-Static Synchronous dataflow graphs
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ACM TRANSACTIONS ON EMBEDDED COMPUTING SYSTEMS 2015年 第4期14卷 68-68页
作者: De Groote, Robert Holzenspies, Philip K. E. Kuper, Jan Smit, Gerard J. M. Univ Twente Fac EEMCS NL-7500 AE Enschede Netherlands Facebook Menlo Pk CA 94025 USA
In this article, we present a mathematical characterisation of admissible schedules of cyclo-static dataflow (CSDF) graphs. We demonstrate how algebra ic manipulation of this characterization is related to unfolding C... 详细信息
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PARTIAL EXPANSION OF dataflow graphs FOR RESOURCE-AWARE SCHEDULING OF MULTICORE SIGNAL PROCESSING SYSTEMS  48
PARTIAL EXPANSION OF DATAFLOW GRAPHS FOR RESOURCE-AWARE SCHE...
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48h Asilomar Conference on Signals, Systems and Computers
作者: Zaki, George Plishker, William Bhattacharyya, Shuvra S. Fruth, Frank Univ Maryland ECE Dept College Pk MD 20742 USA Univ Maryland UMIACS College Pk MD 20742 USA Texas Instruments Inc Multicore & Commun Infrastruct Business Unit Germantown MD USA
The complex design spaces associated with state-of-the-art, multicore signal processing systems pose significant challenges in realizing designs with high productivity and quality. The Partial Expansion Graph (PEG) im... 详细信息
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A Binary Translation Framework for Automated Hardware Generation
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IEEE MICRO 2021年 第4期41卷 15-22页
作者: Paulino, Nuno Bispo, Joao Ferreira, Joao C. Cardoso, Joao M. P. Inst Engn Sistemas & Computadores Tecnol & Cienci P-4200465 Porto Portugal Univ Porto Fac Engn P-4200465 Porto Portugal
As applications move to the edge, efficiency in computing power and power/energy consumption is required. Heterogeneous computing promises to meet these requirements through application-specific hardware accelerators.... 详细信息
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Buffer Minimization in Earliest-Deadline First Scheduling of dataflow graphs
Buffer Minimization in Earliest-Deadline First Scheduling of...
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14th ACM SIGPLAN/SIGBED Conference on Languages, Compilers and Tools for Embedded Systems
作者: Bouakaz, Adnan Talpin, Jean-Pierre Univ Rennes 1 IRISA F-35014 Rennes France
Symbolic schedulability analysis of dataflow graphs is the process of synthesizing the timing parameters (i.e. periods, phases, and deadlines) of actors so that the task system is schedulable and achieves a high throu... 详细信息
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Buffer minimization in earliest-deadline first scheduling of dataflow graphs  13
Buffer minimization in earliest-deadline first scheduling of...
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Proceedings of the 14th ACM SIGPLAN/SIGBED conference on Languages, compilers and tools for embedded systems
作者: Adnan Bouakaz Jean-Pierre Talpin University of Rennes 1/IRISA Rennes France INRIA / IRISA Rennes France
Symbolic schedulability analysis of dataflow graphs is the process of synthesizing the timing parameters (i.e. periods, phases, and deadlines) of actors so that the task system is schedulable and achieves a high throu... 详细信息
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