Brain-machine interface (BMI) can convert electroencephalography signals (EEGs) into the control instructions of external devices, and the key of control performance is the accuracy and efficiency of decoder. However,...
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Brain-machine interface (BMI) can convert electroencephalography signals (EEGs) into the control instructions of external devices, and the key of control performance is the accuracy and efficiency of decoder. However, the performance of different decoders obtaining control instructions from complex and variable EEG signals is very different and irregular in the different neural information transfer model. Aiming at this problem, the off-line and on-line performance of eight decoders based on the improved single-joint information transmission (SJIT) model is compared and analyzed in this paper, which can provide a theoretical guidance for decoder design. Firstly, in order to avoid the different types of neural activities in the decoding process on the decoder performance, eight decoders based on the improved SJIT model are designed. And then the off-line decoding performance of these decoders is tested and compared. Secondly, a closed-loop BMI system which combining by the designed decoder and the random forest encoder based on the improved SJIT model is constructed. Finally, based on the constructed closed-loop BMI system, the on-line decoding performance of decoders is compared and analyzed. The results show that the LSTM-based decoder has better on-line decoding performance than others in the improved SJIT model.
AVS(audio video coding standard)Group formulates stereo-packing scheme aimed at 3D *** this paper,based on stereo-packing algorithm,using FPGA hardware accelerate module to parse the stereo-packing ES stream syntax el...
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AVS(audio video coding standard)Group formulates stereo-packing scheme aimed at 3D *** this paper,based on stereo-packing algorithm,using FPGA hardware accelerate module to parse the stereo-packing ES stream syntax element and cooperating with the Xilinx ZYNQ 7020 SoC development board,we complete the AVS 3D decoder on FPGA/SoC *** HDMI port to export the decoded data to the 3D display device,we get the 3D video with depth information and verify the validity of AVS 3D real-time decoder.
As the pioneering work in Transformer-based object detection, DETR has attracted widespread attention and sparked a research trend since its inception. DETR's global attention mechanism is novel in its architectur...
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As the pioneering work in Transformer-based object detection, DETR has attracted widespread attention and sparked a research trend since its inception. DETR's global attention mechanism is novel in its architecture, but it takes a very long time to optimize and reach good performance. To address this issue, we introduce DO-DETR in this paper. Specifically, except for the Hungarian loss, we build a denoising module where noisy GT bounding boxes are inputted into the decoder, which trains the model to reconstruct the original boxes. This process significantly simplifies the complexity of bipartite graph matching, resulting in accelerated convergence. In the decoder part, we designed a multi-layer recurrent processing structure based on RoI, which helps the attention of DETR gradually and more accurately focus on foreground objects. Visual features are taken as glimpse features from the larger bounding box regions of RoIs in each processing stage based on the detection outcomes of the preceding stage. These glimpse features are then modeled together with the attention outputs from the previous stage, thereby alleviating the difficulty of global attention modeling. Under the ResNet-50 backbone, DO-DETR achieved the same AP (43.6) on the MSCOCO dataset in just 16 epochs, which vanilla DETR requires 500 epochs to achieve. Meanwhile, Deformable DETR took 50 epochs to achieve a similar performance. Our DO-DETR thus improved the convergence efficiency of Deformable DETR by 68%.
作者：
Ma, YanHenan Open Univ
Dept Humanities & Design 124 Huanghe Rd Zhengzhou 450046 Henan Peoples R China
Despite the widespread application of the Internet and the in-depth development of globalization, English machine translation still has problems such as poor translation accuracy, long translation time, and poor ROUGE...
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Despite the widespread application of the Internet and the in-depth development of globalization, English machine translation still has problems such as poor translation accuracy, long translation time, and poor ROUGE (Recall-Oriented Understudy for Gisting Evaluation) and METEOR (Metric for Evaluation of Translation with Explicit ORdering) value results. In order to better promote the improvement of English machine translation effectiveness, this article introduced the Transformer model to deeply explore the effectiveness of English machine translation. Firstly, the Transformer model structure was adjusted by integrating absolute and relative positions for position encoding. Subsequently, the encoder and decoder were designed using a multi-head attention mechanism and a feedforward neural network (FNN). The dependency weight design was achieved through the attention mechanism, and the model was pre-trained. Finally, this article also evaluated the actual performance of the adjusted Transformer model in English machine translation. The research results show that in the 5th test, the average score of the adjusted Transformer model BLEU (Bilingual Evaluation Study) reached 0.6110, the translation time was 24.90 minutes, and the average values of ROUGE and METEOR were 0.6809 and 0.6098, respectively. The research results indicate that applying the adjusted Transformer model to English machine translation is completely feasible. It can improve translation accuracy, shorten translation time, and be applied to machine translation tasks to better improve translation quality and efficiency, which is of great significance for promoting cross-cultural communication.
The design of high speed decoders with traditional partly parallel architecture for non-quasi-cycle (NQC) LDPC codes is a challenging problem due to its high memory-block consumption and the low hardware utilization e...
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ISBN:
(纸本)9781479934942
The design of high speed decoders with traditional partly parallel architecture for non-quasi-cycle (NQC) LDPC codes is a challenging problem due to its high memory-block consumption and the low hardware utilization efficiency. In this paper, a general overlapped message passing (GOMP) decoding algorithm is proposed to improve the hardware utilization efficiency (HUE), which overcomes the limitation of overlapped message passing (OMP) decoders proposed before. On the basis of the given codes, this algorithm nearly doubles the throughput without sacrificing double memory or causing loss in performance compared to BP algorithm. Furthermore, we present a technique called cycle bus to reduce the number of block RAMs in the multi-core decoder. Moreover, an example of a rate-2/3, length-15360 irregular LDPC code with 8.43 dB coding gain for BPSK in AWGN channel is given, whose decoders features nearly double throughput, 22.22% increase in memory 8.35% reduction in logic registers cost and more reasonable distribution in block RAMs cost.
The latency and complexity of decoders are critical to performance of devices such as memory and buffers. The number of locations to be accessed in an address could be in billions. We propose a multidimensional parall...
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ISBN:
(纸本)9783031762727;9783031762734
The latency and complexity of decoders are critical to performance of devices such as memory and buffers. The number of locations to be accessed in an address could be in billions. We propose a multidimensional parallel decoder that divides the address space into multiple of smaller dimensions each is decoded separately in parallel. The decoding of a much smaller address is simpler compared to the decoding of the whole address space. A combinational circuit combines the outputs of the smaller numbers of decoded outputs that correspond to the different dimensions to obtain the full decoded address space. We also purpose a time multiplexed decoder that divides the address to multiple dimensions in time and uses the multidimensional parallel decoder to obtain the decoded outputs. The results of the multidimensional parallel decoder show reduction in the cost of implementation and latency by multiple folds compared to the conventional decoder.
Massive Multiple Input Multiple Output (MIMO) technology has a lot of potential for meeting wireless communication systems' growing need for large data rates. This work presents a novel decoder design that takes a...
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Encoder-decoder networks have become the standard solution for a variety of segmentation tasks. Many of these approaches use a symmetrical design where both the encoder as well as the decoder are approximately of the ...
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Encoder-decoder networks have become the standard solution for a variety of segmentation tasks. Many of these approaches use a symmetrical design where both the encoder as well as the decoder are approximately of the same computational complexity. However, symmetrical properties of encoder-decoder networks are not necessarily optimal. This work proposes an elegant and generic method to reduce the decoder complexity in encoder-decoder networks by scaling the number of feature channels in the decoder. The popular network U-Net is used as an example for how to adapt existing models with symmetrical properties. The effect of the decoder size is investigated on three data sets with varying complexity, namely, the ISIC, Cityscapes, and SUN RDB-D data sets. We show that a reduction in decoder channels shows no statistically differing results while at the same time providing a decoder requiring up to 99% fewer FLOPs, (+/- 90% fewer FLOPs is attainable for all investigated problems). In addition, results show that the number of parameters in the decoder of two models which already have smaller decoders can be further optimised depending on the problem. The proposed solution is a simple method and can easily be implemented in other encoder-decoder models. Empirical results also show that a reduction in parameters may even lead to improved performance, which is likely due to fewer parameters, reducing overfitting effects.
A simulation framework based on a physical-layer based abstraction to predict physical layer performances and to compare different forward error correcting (FEC) codes is presented. This framework is used to jointly d...
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ISBN:
(纸本)9781510630772
A simulation framework based on a physical-layer based abstraction to predict physical layer performances and to compare different forward error correcting (FEC) codes is presented. This framework is used to jointly design interleaving and FEC schemes for free space optical link. A sub-class of regular Low-Density Parity-Check codes is shown to be an interesting alternative to current space communication standard for optical links that require low error floor and high decoder throughput. End-to-end simulations show the feasibility of error free link from a LEO satellite to a high complexity ground station at 25Gbits/s and from a LEO satellite to low complexity optical ground station at 10 Gbits/s. The proposed protection scheme is composed of FG LDPC code and a bit interleaver to span the burst of errors.
Brain-machine interface (BMI) can be used to translate the neural activities of the brain into the control signals for the artificial arm, aiming to offer the disabled patients greater interaction with the world. In r...
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ISBN:
(纸本)9789881563958
Brain-machine interface (BMI) can be used to translate the neural activities of the brain into the control signals for the artificial arm, aiming to offer the disabled patients greater interaction with the world. In recent years, some emerging technologies, such as back propagation (BP) neural network and recurrent neural networks (RNN) with long-short term memory (LSTM), have been adopted in many fields. Hence, we firstly design four decoders based on the classical Wiener filter and Kalman filter, and the emerging BP neural network and RNN with LSTM, and compare the performance of these decoders offline. Secondly, considering the advantages of the model predictive control (MPC), we design an auxiliary controller based on MPC algorithm to form a closed-loop BMI system, and compare the performance of four decoders online.
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