Beyond-5G wireless networks are expected to gain a excellent trade-off among computational accuracy, latency, and efficient use of available resources. This poses a significant challenge to the channel decoder. In thi...
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Beyond-5G wireless networks are expected to gain a excellent trade-off among computational accuracy, latency, and efficient use of available resources. This poses a significant challenge to the channel decoder. In this paper, a novel memory efficient algorithm for decoding Low-Density Parity-Check (LDPC) codes is proposed with a view to reduce the implementation complexity and hardware resources. The algorithm, called Check Node Self-Update (CNSU) algorithm, is based on layered normalized min sum (LNMS) decoding algorithm while utilizing iteration parallel techniques to integrate both Variable Nodes (VNs) message and A-Posterior Probability(APP) message into the Check Nodes (CNs) message, which eliminates memories of both the VNs message and the APP message as well as updating module of APP message in CNs unit. Based on the proposed CNSU algorithm, design of partially parallel decoder architecture and serial simulations followed by implementation on the Stratix II EP2S180 FPGA are presented. The results show that the proposed algorithm and implementation bring a significant gain in efficient using of available resources, include reducing hardware memory resources and chip area while keeping the benefit of bit-error-rate (BER) performance and speeding up of convergence with LNMS, which are beneficial to apply in Beyond-5G wireless networks. (C) 2021 Published by Elsevier B.V.
The brain-computer interface(BCI)technology has received lots of attention in the field of scientific research because it can help disabled people improve their quality of ***-state visual evoked potential(SSVEP)is th...
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The brain-computer interface(BCI)technology has received lots of attention in the field of scientific research because it can help disabled people improve their quality of ***-state visual evoked potential(SSVEP)is the most researched BCI experimental paradigm,which offers the advantages of high signal-to-noise ratio and short training-time requirement by *** a complete BCI system,the two most critical components are the experimental paradigm and decoding ***,a systematic combination of the SSVEP experimental paradigm and decoding algorithms is missing in existing *** the present study,the transient visual evoked potential,SSVEP,and various improved SSVEP paradigms are compared and analyzed,and the problems and development bottlenecks in the experimental paradigm are finally pointed ***,the canonical correlation analysis and various improved decoding algorithms are introduced,and the opportunities and challenges of the SSVEP decoding algorithm are discussed.
This paper is concerned with the design and performance of non-binary LDPC-coded differential modulation systems. A low-complexity joint detection/decoding method for non-coherent demodulation is proposed, in which th...
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ISBN:
(纸本)9781479913213
This paper is concerned with the design and performance of non-binary LDPC-coded differential modulation systems. A low-complexity joint detection/decoding method for non-coherent demodulation is proposed, in which the hard-message-passing strategy is used for a joint factor graph. It combines trellis-based differential detection aided with channel prediction and the reliability-based decoding of nonbinary LDPC codes introduced in [1]. The Max-Log-MAP algorithm with soft-in hard-out is used for the differential detection. Simulation results show that the proposed method can offer good performances with a greatly reduced complexity.
LSTM-RNN has been succeeded in applying in offline handwritten recognition. The paper used two-dimensional LSTM-RNN to recognize text-based CAPTCHA. Aiming at the problem that traditional decoding algorithm cannot obt...
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ISBN:
(纸本)9780769551227
LSTM-RNN has been succeeded in applying in offline handwritten recognition. The paper used two-dimensional LSTM-RNN to recognize text-based CAPTCHA. Aiming at the problem that traditional decoding algorithm cannot obtain satisfactory results. The paper proposed a novel decoding algorithm based on the multi-population genetic algorithm. The experimental results showed that the novel decoding algorithm for the LSTM-RNN can improve the recognition rate of merged-type CAPTCHA.
TSIP protocol is another code of GPS data which is different from NMEA0183. TSIP protocol supports 9600 baud rate or higher. TSIP protocol is duplex system, and in this protocol we can quickly obtain GPS information b...
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ISBN:
(纸本)9783037857243
TSIP protocol is another code of GPS data which is different from NMEA0183. TSIP protocol supports 9600 baud rate or higher. TSIP protocol is duplex system, and in this protocol we can quickly obtain GPS information by using the special order instead of passively waiting. In this paper, the algorithm of GPS data based on TSIP protocol is proposed, and the advantages and disadvantages of TSIP is analyzed.
In this paper,the MIMO system and multi-user detection theory are firstly *** to the signal model,the estimation algorithm based on the minimum mean square error criterion and the zero-forcing criterion is *** on this...
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In this paper,the MIMO system and multi-user detection theory are firstly *** to the signal model,the estimation algorithm based on the minimum mean square error criterion and the zero-forcing criterion is *** on this theory,the algorithm is combined with the decision feedback and the optimal ranking *** this paper,an adaptive length spherical iterative decoding algorithm is proposed to improve the BER performance of the system,which can improve the channel capacity and improve the channel reliability and reduce the bit error ***,the performance of various algorithms is compared by *** experimental results show that the spherical decoding algorithm has great advantages for wireless communication.
Polar codes based on 2 x 2 non-binary kernels are discussed in this work. The kernel over GF(q) is selected by maximizing the polarization effect and using Monte-Carlo simulation. Belief propagation (BP) and successiv...
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ISBN:
(纸本)9781538670484
Polar codes based on 2 x 2 non-binary kernels are discussed in this work. The kernel over GF(q) is selected by maximizing the polarization effect and using Monte-Carlo simulation. Belief propagation (BP) and successive cancellation (SC) based decoding algorithms are extended to non-binary codes. Additionally, a successive cancellation list (SCL) decoding with a pruned tree is proposed. Simulation results show that the proposed decoder performs very close to a conventional SCL decoder with significantly lower complexity.
he latest advancements in low-density parity-check (LDPC) codes have been resulted in reducing the decoding complexity. Hence, these codes have excelled over turbo codes, BCH codes, and linear block codes in terms of ...
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ISBN:
(纸本)9789811047626;9789811047619
he latest advancements in low-density parity-check (LDPC) codes have been resulted in reducing the decoding complexity. Hence, these codes have excelled over turbo codes, BCH codes, and linear block codes in terms of evaluating the performance in higher decoding rate;hence, these decodable codes are the trending topic in coding theory of signals. Construction of LDPC codes is being elaborated in this proposed paper which further helps to study decoding and encoding of these binary and non-binary low-density parity-check codes, respectively. In this proposed design architecture, we have considered the SBF and MLDD algorithms employed here utilize reliability estimation to improve error performance and it has advantages over bit flipping (BF) algorithms. This algorithm can be improved with still more security level by having a trade-off between performance and data transmission. It can also be enhanced by implementing it in real-time applications for data decoding and correction, for smaller-size datum.
Reversible logic is an emerging digital design paradigm which promises low energy dissipation;thanks to its information-lossless nature. True potential of this exciting concept can only be assessed by facing the desig...
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Reversible logic is an emerging digital design paradigm which promises low energy dissipation;thanks to its information-lossless nature. True potential of this exciting concept can only be assessed by facing the design of practical complexity applications. Low density parity check (LDPC) decoding is one such application from forward error correction domain. The core of LDPC decoding is the check node (CN) processor, which executes the decoding algorithm and constitutes a major portion of decoder's overall power consumption. This work proposes a low-power LDPC CN architecture using reversible logic gates. Transistor level design and full custom layout of proposed architecture is carried out on UMC 90 nm complementary metal-oxide-semiconductor technology. All reversible blocks of proposed CN are optimised for quantum cost, garbage outputs and transistor count. The CN functionality is validated with post-layout simulations, layout versus schematic checks and design rule checks. The proposed CN occupies a post-layout area of 0.013 mm(2), achieves up to 4.3 GHz frequency and consumes 52 mu W power. The performance of proposed CN is also compared with its implementation using irreversible gates. The proposed CN achieves about 300% reduction in power delay product with affordable complexity as compared to its classical implementation.
Compared to Successive Cancellation (SC) decoding algorithm, Successive Cancellation Flip (SCF) decoding algorithm keep the same average computational complexity at high SNR while improving performance. To correct mor...
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ISBN:
(纸本)9789532900910
Compared to Successive Cancellation (SC) decoding algorithm, Successive Cancellation Flip (SCF) decoding algorithm keep the same average computational complexity at high SNR while improving performance. To correct more errors, Partitioned Successive Cancellation Flip (PSCF) decoding algorithm is subsequently proposed with lower computational complexity than SCF decoding algorithm. In this paper, we propose an improved segmented SC-Flip (SSCF) decoding algorithm, which divide the codeword through Gaussian Approximation (GA) of calculating the error probability of each bit channel. Simulation results show that this segmented approach can achieve 48.66% average complexity reduction at SNR of 0.5 dB for (1024, 512) polar code, and better performance compared to PSCF decoding algorithm.
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