检索结果-内蒙古大学图书馆

JoBiS: Joint capacitance and inductance bit stuffing CAC for interposer based multi-chip deep learning accelerator

INTEGRATION-THE VLSI JOURNAL 2025年 102卷

作者： Shirmohammadi, Zahra Taali, Masoumeh Shahid Rajaei Teacher Training Univ Comp Engn Dept Tehran Iran

Interposer-based multi-chip deep learning accelerator (DLA) profoundly influences the design of artificial intelligence (AI) hardware. However, data transmission over wires in Network-on-Chip (NoC)-based deep learning accelerators (DLAs) encounters crosstalk faults as a major challenge. These faults arise due to mutual capacitance and inductance influences between adjacent wires of the NoCs. To address this issue, this paper introduces JoBiS, a bit-stuffing algorithm that takes into account both capacitance and inductance coupling effects. JoBiS aims to prevent the occurrence of the worst delay transitions in inductance coupling, such as 00000- 11111,11111-00000, and 00-00-11-11, as well as in capacitive coupling, including 11-11-00-00, 01010-10101, and 10101-01010, in a 5-bit wire model. This is achieved through a simple and low-power algorithm. To reduce delay and area overhead in large buses, a bus partitioning-based CAC called JoBiS is proposed. The simulation results indicate that the power consumption and delay are significantly improved compared to other methods. On average, JoBiS reduces power consumption and critical path delay by 83% and 70%, respectively, across various bus widths.

关键词： deep learning accelerator Network-on-Chip Wires Crosstalk faults Inductive coupling Capacitive coupling

来源：评论

学校读者我要写书评

暂无评论

DLA-E: a deep learning accelerator for endoscopic images classification

引用

JOURNAL OF BIG DATA 2023年第1期10卷 76页

作者： Bolhasani, Hamidreza Jassbi, Somayyeh Jafarali Sharifi, Arash Islamic Azad Univ Dept Comp Engn Sci & Res Branch Tehran Iran

The super power of deep learning in image classification problems have become very popular and applicable in many areas like medical sciences. Some of the medical applications are real-time and may be implemented in embedded devices. In these cases, achieving the highest level of accuracy is not the only concern. Computation runtime and power consumption are also considered as the most important performance indicators. These parameters are mainly evaluated in hardware design phase. In this research, an energy efficient deep learning accelerator for endoscopic images classification (DLA-E) is proposed. This accelerator can be implemented in the future endoscopic imaging equipments for helping medical specialists during endoscopy or colonoscopy in order of making faster and more accurate decisions. The proposed DLA-E consists of 256 processing elements with 1000 bps network on chip bandwidth. Based on the simulation results of this research, the best dataflow for this accelerator based on MobileNet v2 is kcp_ws from the weight stationary (WS) family. Total energy consumption and total runtime of this accelerator on the investigated dataset is 4.56 x 10(9) MAC (multiplier-accumulator) energy and 1.73 x 10(7) cycles respectively, which is the best result in comparison to other combinations of CNNs and dataflows.

关键词： deep learning accelerator Dataflow deep neural networks Convolutional neural networks Medical Images Endoscopy

来源：评论

学校读者我要写书评

暂无评论

Stealthy and Robust Glitch Injection Attack on deep learning accelerator for Target With Variational Viewpoint

引用

IEEE TRANSACTIONS ON INFORMATION FORENSICS AND SECURITY 2021年 16卷 1928-1942页

作者： Liu, Wenye Chang, Chip-Hong Zhang, Fan Nanyang Technol Univ Sch Elect & Elect Engn Singapore 639798 Singapore Zhejiang Univ Coll Comp Sci & Technol Hangzhou 310027 Peoples R China Alibaba Zhejiang Univ Joint Res Inst Frontier Technol Hangzhou 310027 Peoples R China

deep neural network (DNN) accelerators overcome the power and memory walls for executing neural-net models locally on edge-computing devices to support sophisticated AI applications. The advocacy of "model once, run optimized anywhere" paradigm introduces potential new security threat to edge intelligence that is methodologically different from the well-known adversarial examples. Existing adversarial examples modify the input samples presented to an AI application either digitally or physically to cause a misclassification. Nevertheless, these input-based perturbations are not robust or surreptitious on multi-view target. To generate a good adversarial example for misclassifying a real-world target of variational viewing angle, lighting and distance, a decent number of target's samples are required to extract the rare anomalies that can cross the decision boundary. The feasible perturbations are substantial and visually perceptible. In this paper, we propose a new glitch injection attack on DNN accelerator that is capable of misclassifying a target under variational viewpoints. The glitches injected into the computation clock signal induce transitory but disruptive errors in the intermediate results of the multiply-and-accumulate (MAC) operations. The attack pattern for each target of interest consists of sparse instantaneous glitches, which can be derived from just one sample of the target. Two modes of attack patterns are derived, and their effectiveness are demonstrated on four representative ImageNet models implemented on the deep-learning Processing Unit (DPU) of FPGA edge and its DNN development toolchain. The attack success rates are evaluated on 118 objects in 61 diverse sensing conditions, including 25 viewing angles (-60 degrees to 60 degrees), 24 illumination directions and 12 color temperatures. In the covert mode, the success rates of our attack exceed existing stealthy adversarial examples by more than 16.3%, with only two glitches injected into ten t

关键词： Artificial intelligence deep learning Perturbation methods Lighting Clocks Arrays Hardware deep learning accelerator fault injection attack adversarial misclassification image recognition

来源：评论

学校读者我要写书评

暂无评论

A Hybrid Optical-Electrical Analog deep learning accelerator Using Incoherent Optical Signals

引用

ACM JOURNAL ON EMERGING TECHNOLOGIES IN COMPUTING SYSTEMS 2023年第2期19卷 1-24页

作者： Yang, Mingdai Lou, Qiuwen Rajaei, Ramin Jokar, Mohammad Reza Qiu, Junyi Liu, Yuming Udupa, Aditi Chong, Frederic T. Dallesasse, John M. Feng, Milton Goddard, Lynford L. Hu, X. Sharon Li, Yanjing Univ Chicago 5730 South Ellis Ave Chicago IL 60637 USA Univ Notre Dame 384 Fitzpatrick Hall Notre Dame IN 46556 USA Univ Illinois 306 North Wright St Urbana IL 61801 USA

Optical deep learning (DL) accelerators have attracted significant interests due to their latency and power advantages. In this article, we focus on incoherent optical designs. A significant challenge is that there is no known solution to perform single-wavelength accumulation (a key operation required for DL workloads) using incoherent optical signals efficiently. Therefore, we devise a hybrid approach, where accumulation is done in the electrical domain, and multiplication is performed in the optical domain. The key technology enabler of our design is the transistor laser, which performs electrical-to-optical and optical-to-electrical conversions efficiently. Through detailed design and evaluation of our design, along with a comprehensive benchmarking study against state-of-the-art RRAM-based designs, we derive the following key results: (1) For a four-layer multilayer perceptron network, our design achieves 115x and 17.11x improvements in latency and energy, respectively, compared to the RRAM-based design. We can take full advantage of the speed and energy benefits of the optical technology because the inference task can be entirely mapped onto our design. (2) For a complex workload (Resnet50), weight reprogramming is needed, and intermediate results need to be stored/re-fetched to/from memories. In this case, for the same area, our design still outperforms the RRAM-based design by 15.92x in inference latency, and 8.99x in energy.

关键词： Optical computing deep learning accelerator

来源：评论

学校读者我要写书评

暂无评论

An 8.9-71.3 TOPS/W deep learning accelerator for Arbitrarily Quantized Neural Networks

引用

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS 2022年第10期69卷 4148-4152页

作者： Moon, Seunghyun Lee, Kyeong-Jun Mun, Han-Gyeol Kim, Byungjun Sim, Jae-Yoon Pohang Univ Sci & Technol Dept Convergence IT Engn Pohang 37673 South Korea Pohang Univ Sci & Technol Dept Elect & Elect Engn Pohang 37673 South Korea

This brief presents the first general-purpose deep learning accelerator for arbitrarily quantized neural networks. A pre-processing and corresponding multiply-and-accumulate operator are proposed to perform the vector products between arbitrarily quantized two vectors. As a result, the accelerator can support precision scalability of quantization up to 4b for one of input activation and weight, and up to 8b for the other, respectively. The proposed approach shows a reduction of 0.57x area and 0.78x power consumption, respectively, compared to those with the conventional 8b linear precision which is required to perform an equal level of task accuracy. The implemented accelerator in 28nm CMOS operates at an operating frequency range of 100-to-250MHz over a supply voltage range of 0.75-to1.2V. Depending on configurations, it shows an energy efficiency of 8.9-to-71.3TOPS/W.

关键词： Arbitrary quantization deep learning accelerator scalable precision

来源：评论

学校读者我要写书评

暂无评论

Design of a Sparsity-Aware Reconfigurable deep learning accelerator Supporting Various Types of Operations

引用

IEEE JOURNAL ON EMERGING AND SELECTED TOPICS IN CIRCUITS AND SYSTEMS 2020年第3期10卷 376-387页

作者： Hsiao, Shen-Fu Chen, Kun-Chih Lin, Chih-Chien Chang, Hsuan-Jui Tsai, Bo-Ching Natl Sun Yat Sen Univ Dept Comp Sci & Engn Kaohsiung 80424 Taiwan

The superiority of various deep Neural Networks (DNN) models, such as Convolutional Neural Networks (CNN), Generative Adversarial Networks (GAN), and Recurrent Neural Networks (RNN), has been proven in various real-world applications and has received much attention. However, different DNN models include various types of operations. For example, CNN models are usually composed of convolutional layers (Conv) and fully-connected layers (FC). Furthermore, some light CNN models such as MobileNet adopt depthwise separable convolution with depthwise convolution (DWC) and pointwise convolution (PWC) to compress the models. In addition to regular convolution, de-convolution (De-Conv) is also widely used in many GAN models. Moreover, many RNN models also employ long-short-term memory (LSTM) to control update of internal states and data. Such a high diversity of various DNN operations poses great design challenges in implementing reconfigurable deep learning (DL) accelerators, which can support various types of DNN operations. Most recent DL accelerators focus only on some DNN operations, which lacks computing flexibility. In this paper, by exploiting the sparsity in current DNN models, we design sparsity-aware DL hardware accelerators that can support efficient computation of various DNN operations, including Conv, DeConv, DWC, PWC, FC, and LSTM. Through reconfiguring dataflow and parallelizing different operations, the proposed designs not only improve system performance but also increase hardware utilization with a significant reduction of power consumption in memory accesses and arithmetic computations.

关键词： Convolution Parallel processing Computational modeling Generative adversarial networks Huffman coding Hardware Gallium nitride Convolutional neural network deep learning accelerator de-convolution transpose convolution depthwise convolution long-short term memory

来源：评论

学校读者我要写书评

暂无评论

N-AquaRAM: A Cost-Efficient deep learning accelerator for Real-Time Aquaponic Monitoring

引用

AGRICULTURAL RESEARCH 2024年 1-14页

作者： Siddique, Ali Iqbal, Muhammad Azhar Sun, Jingqi Zhang, Xu Vai, Mang I. Siddique, Sunbal Univ Macau State Key Lab Analog & Mixed Signal VLSI Taipa 999078 Macao Peoples R China Univ Leeds Fac Engn & Phys Sci Leeds LS2 9JT England Beijing Jiaotong Univ Dept Comp Sci Weihai 264003 Peoples R China Univ Macau Fac Sci & Technol Dept Elect & Comp Engn Taipa 999078 Macao Peoples R China Univ Agr Faisalabad Dept Comp Sci Faisalabad 38000 Pakistan

Aquaponics is an emerging area of agricultural sciences that combines aquaculture and hydroponics in a symbiotic way to increase crop production. Though it offers a lot of advantages over traditional techniques, including chemical-free and soil-less farming, its commercial application suffers from some problems such as the lack of experienced manpower. To operate a stable smart aquaponic system, it is critical to estimate the fish size properly. In this context, the use of dedicated hardware for real-time aquaponic monitoring can greatly resolve the issue of inexperienced handlers. In this article, we present a complete methodology to train a deep neural network to perform fish size estimation in real time. To achieve high accuracy, a novel implementation of swish function is presented. This novel version is far more hardware efficient than the original one, while being extremely accurate. Moreover, we present a deep learning accelerator that can classify 40 million fish samples in a second. The dedicated real-time system is about 1600 times faster than the one based on general-purpose computers. The proposed neuromorphic accelerator consumes about 2600 slice registers on a low-end model of Virtex 6 FPGA series.

关键词： Aquaculture deep learning accelerator Field programmable gate arrays (FPGAs) Fish size estimation Giga operations per second (GOPS) Smart aquaponics

来源：评论

学校读者我要写书评

暂无评论

R-CNN Object Detection Inference With deep learning accelerator

R-CNN Object Detection Inference With Deep Learning Accelera...

引用

IEEE/CIC International Conference on Communications in China (ICCC)

作者： Qian, Yuxin Zheng, Hongli He, Dazhi Zhang, Zhexi Zhang, Zongpu Shanghai Jiao Tong Univ Cooperat Media Network Innovat Ctr Shanghai Peoples R China

ISBN: (纸本)9781538670118

The explosively increasing demands of high-speed data applications have brought massive access requirements to various mobile devices. As integrating with artificial intelligence and neural network, the mobile device industry is often more concerned with faster inference with lower power consumption, bringing deep learning inference acceleration to the spotlight. In this paper, we perform a neural network inference merging R-CNN, an object detection model, into a deep learning accelerator architecture. It is a brand new implementation of neural network on embedded system hardware IP-cores of edge computation. On one hand, based on the embedded system environment, we implement the image pre-processing with region proposal algorithm and image post-processing with NMS method. On the other hand, we perform the feature computation with the deep learning accelerator through optimized software and hardware configurations. Through this method, we solve the problem of time-consuming in the computation of neural network layers and give a precise and real-time prediction of object detection. Our R-CNN inference achieves impressive results with 1.9 to 2.6 times higher performance compared with other inference processors.

关键词： Object detection R-CNN deep learning inference deep learning accelerator

来源：评论

学校读者我要写书评

暂无评论

A Case Study on Formally Verifying an Open-source deep learning accelerator Design 32

A Case Study on Formally Verifying an Open-source Deep Learn...

引用

32nd IEEE Asian Test Symposium (ATS)

作者： Jain, Anshul Kumar, Binod Indian Inst Technol Jodhpur IITJ Jodhpur Rajasthan India

ISBN: (纸本)9798350303100

deep learning accelerators play a crucial role in accelerating the performance of deep neural networks. As these accelerators become more complex, ensuring their correctness and reliability becomes increasingly challenging. Formal verification techniques offer a systematic approach to rigorously validate the design and verify its functional correctness. In this case study, we present a detailed analysis of verifying an open-source deep learning accelerator design (at RTL abstraction), highlighting the methodology, challenges, steps and outcomes of an enhanced formal verification process.

关键词： Model Checking deep learning accelerator Counterexamples Design Bugs Open-source project

来源：评论

学校读者我要写书评

暂无评论

Optimized FPGA-based deep learning accelerator for Sparse CNN using High Bandwidth Memory 29

Optimized FPGA-based Deep Learning Accelerator for Sparse CN...

引用

29th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM)

作者： Jiang, Chao Ojika, David Patel, Bhavesh Lam, Herman Univ Florida SHREC Gainesville FL 32611 USA Dell Technol Dell EMC Austin TX USA

ISBN: (纸本)9781665435550

Large Convolutional Neural Networks (CNNs) are often pruned and compressed to reduce the amount of parameters and memory requirement. However, the resulting irregularity in the sparse data makes it difficult for FPGA accelerators that contains systolic arrays of Multiply-and-Accumulate (MAC) units, such as Intel's FPGA-based deep learning accelerator (DLA), to achieve their maximum potential. Moreover, FPGAs with low-bandwidth off-chip memory could not satisfy the memory bandwidth requirement for sparse matrix computation. In this paper, we present 1) a sparse matrix packing technique that condenses sparse inputs and filters before feeding them into the systolic array of MAC units in the Intel DLA, and 2) a customization of the Intel DLA which allows the FPGA to efficiently utilize a high bandwidth memory (HBM2) integrated in the same package. For end-to-end inference with randomly pruned ResNet-50/MobileNet CNN models, our experiments demonstrate 2.7x/3x performance improvement compared to an FPGA with DDR4, 2.2x/2.1x speedup against a server-class Intel SkyLake CPU, and comparable performance with 1.7x/2x power efficiency gain as compared to an NVidia V100 GPU.

关键词： Sparse CNN FPGA deep learning accelerator High bandwidth memory

来源：评论

学校读者我要写书评

暂无评论

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案：

请选择收藏分类：

通借通还

建议与咨询 留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案： 新增检索档案 确定 取消

请选择收藏分类： 新增自定义分类 确定 取消

通借通还

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

请选择保存的检索档案：

请选择收藏分类：