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Optimization of a low noise amplifier with two technology nodes using an interactive evolutionary approach

analog INTEGRATED CIRCUITS AND SIGNAL PROCESSING 2021年第1期106卷 307-319页

作者： de Lima Moreto, Rodrigo Alves Mariano, Andre Thomaz, Carlos Eduardo Gimenez, Salvador Pinillos FEI Univ Ctr Dept Elect Engn Av Humberto Alencar Castelo Branco 3972 BR-09850901 Sao Bernardo Do Campo SP Brazil Univ Parana Dept Elect Engn Curitiba Parana Brazil

Nowadays, wireless communications at frequencies of gigahertz have an increasing demand due to the ever-increasing number of electronic devices that uses this type of communication. However, the design of Radio Frequency (RF) circuits is difficult, time-consuming and based on designer knowledge and experience. This work proposes an interactive evolutionary approach based on genetic algorithm, implemented in the in-house iMTGSPICE optimization tool, to perform the optimization process of a Low-Power Low Noise Amplifier (LNA) dedicated to Wireless Sensor Networks (WSN), which is robust through the corner and Monte Carlo analyses and implemented in two Bulk cmos technology nodes: 130 nm and 65 nm. Regarding each technology node, we performed two experimental studies to optimize the LNA. The first one used the conventional non-interactive approach of iMTGSPICE, which was not assisted by a designer during the optimization process. The second one used the interactive approach of iMTGSPICE, which was monitored and assisted by a beginner designer during the optimization process. The obtained results demonstrated that the interactive approach of iMTGSPICE performed the optimization process of the robust LNA from 16 to 94% faster than the non-interactive evolutionary approach. The design regarding the technology node of 130 nm took 341 min for the non-interactive and 20 min for the interactive optimization process, whereas the design in the 65 nm took 537 min for the non-interactive and 454 min for the interactive approach.

关键词： Electronic design automation (EDA) Interactive genetic algorithm design of robust analog cmos ics Low noise amplifier (LNA)

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