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Unified time-domain formulation of switching frequency for hysteresis current controlled AC/DC and DC/AC grid connected converters

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IET POWER ELECTRONICS 2013年第4期6卷 683-692页

作者： Gautam, Shweta Gupta, Rajesh Motilal Nehru Natl Inst Technol Dept Elect Engn Allahabad 211004 Uttar Pradesh India

This study presents a unified time-domain formulation of switching frequency for hysteresis current controlled AC/DC and DC/AC grid connected converters. It is shown that the generalised expression of switching frequency obtained can be used for any mode of operation of the converter based on phase relation between the reference AC current and grid voltage. The presented analysis provides information of maximum, minimum and average switching frequencies for all modes of the converter operation. The analytical results derived under different configurations are verified through the experimental results obtained using fpga-based implementation of the controller for the converter. The applications of the results are shown on the three different single-phase systems operating in current control mode: (i) static synchronous compensator, (ii) boost rectifier and (iii) grid interface of wind-turbine system. The results of switching operations in these applications are verified using simulation studies performed in power systems CAD/electromagnetic transients including DC (PSCAD/EMTDC) software.

关键词： AC-DC power convertors DC-AC power convertors electric current control field programmable gate arrays hysteresis time-domain analysis switching frequency unified time-domain formulation hysteresis current controlled AC-DC grid connected converters hysteresis current controlled DC-AC grid connected converters phase relation AC current grid voltage maximum switching frequencies minimum switching frequencies average switching frequencies fpga-based implementation single-phase systems static synchronous compensator boost rectifier grid interface wind-turbine system PSCAD-EMTDC software AC-DC power convertors DC-AC power convertors electric current control field programmable gate arrays hysteresis time-domain analysis switching frequency unified time-domain formulation hysteresis current controlled AC-DC grid connected converters hysteresis current controlled DC-AC grid connected converters phase relation AC current grid voltage maximum switching frequencies minimum switching frequencies average switching frequencies fpga-based implementation single-phase systems static synchronous compensator boost rectifier grid interface wind-turbine system PSCAD-EMTDC software

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An fpga-based integrated signal conditioner for measurement of position, velocity and acceleration of a rotating shaft using an incremental encoder 1

An FPGA-based integrated signal conditioner for measurement ...

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1st IEEE International Conference on Control, Measurement and Instrumentation (CMI)

作者： Banerjee, K. Dam, B. Majumdar, K. Jadavpur Univ Dept Instrumentat & Elect Engn Salt Lake Campus Kolkata 700098 W Bengal India

ISBN: (纸本)9781479917693

Digital motion control applications, where electric motors are utilized as actuators, use incremental encoders as feedback devices to sense the rotating shaft position. However, for the controller to implement an accurate tracking of input position or velocity trajectories, and to make the tracking performance robust with respect to unpredictable disturbances like parameter uncertainties and load fluctuations, measurement of velocity and acceleration data is also required. In majority of the existing digital motion control solutions, direct measurement of velocity and acceleration is rarely done. Instead, they are estimated from the discrete position data obtained from the incremental encoder. Well documented velocity and acceleration estimation algorithms exist, and the literature report both simulation and experimental results on the performance of the said algorithms with typical input position trajectories. However, no integral hardware module that uses an incremental encoder to provide position, velocity and acceleration measurement is reported. This paper presents the design and fpga-based implementation of an integrated signal conditioner that uses the signals coming from an incremental encoder to measure the current position, and then estimate the current velocity and acceleration from it, and its performance on a test-rig. With a fast, industry-standard serial link, the proposed signal conditioner qualifies to be an integrated feedback device in digital motion control applications.

关键词： Digital motion control incremental encoders velocity and acceleration estimation fpga-based implementation signal conditioner

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Novel Algorithm and Architectures for High-Speed Low-Power ConText-based Steganography 19

Novel Algorithm and Architectures for High-Speed Low-Power C...

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19th International Symposium on Computer Architecture and Digital Systems (CADS)

作者： Timarchi, Somayeh Alaei, Masoud Abbasi Koushkbaghi, Hossein Shahid Beheshti Univ Dept Elect Engn Tehran Iran Univ Twente Dept Elect Engn Math & Comp Sci Enschede Netherlands

ISBN: (纸本)9781538643792

Least Significant Bit (LSB) insertion method is a popular type of steganographic algorithms in spatial domain. Nevertheless, in this approach essential measures should be considered to enhance the both visual quality and security properties. ConText is a revised version of LSB method to hide secret information in image carrier with enhanced visual imperceptibility. This paper introduces a novel algorithm based on ConText, called the Modified ConText (MCT). The proposed algorithm is based on using a threshold level to compare pixels in a sub-block which leads to faster and power efficient implementation. We strengthen the ConText algorithm which can embed data in a more noisy-like area to increase security and visual quality. Moreover, a high-speed hardware implementation of the MCT algorithm is also presented by employing faster comparisons. In addition to assigning threshold value that can lead to a more efficient architecture, the pre-computation low power technique is also employed to reduce power consumption. The proposed architecture is synthesized by the ISE tool and implemented on a Spartan-3 fpga device. The results imply that the proposed architecture outperforms the system frequency, the usage of fpga resources, and power consumption by approximately 7%, 30%, and 64%, respectively.

关键词： Steganography LSB insertion fpga-based implementation Pre-computation technique Low-power design

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Using Stochastic Computing to Reduce the Hardware Requirements for a Restricted Boltzmann Machine Classifier 16

Using Stochastic Computing to Reduce the Hardware Requiremen...

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ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (fpga)

作者： Li, Bingzhe Najafi, M. Hassan Lilja, David J. Univ Minnesota Dept Elect & Comp Engn St Paul MN 55414 USA

ISBN: (纸本)9781450338561

Artificial neural networks are powerful computational systems with interconnected neurons. Generally, these networks have a very large number of computation nodes which forces the designer to use software-based implementations. However, the software based implementations are offline and not suitable for portable or real-time applications. Experiments show that compared with the software based implementations, fpga-based systems can greatly speed up the computation time, making them suitable for real-time situations and portable applications. However, the fpga implementation of neural networks with a large number of nodes is still a challenging task. In this paper, we exploit stochastic bit streams in the Restricted Boltzmann Machine (RBM) to implement the classification of the RBM handwritten digit recognition application completely on an fpga. We use finite state machine based (FSM) stochastic circuits to implement the required sigmoid function and use the novel stochastic computing approach to perform all large matrix multiplications. Experimental results show that the proposed stochastic architecture has much more potential for tolerating faults while requiring much less hardware compared to the currently un-implementable deterministic binary approach when the RBM consists of a large number of neurons. Exploiting the features of stochastic circuits, our implementation achieves much better performance than a software-based approach.

关键词： Neural network Restricted Boltzman Machine fpga-based implementation stochastic computing

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A Novel Iterative Threshold for Anti-jamming Algorithm and Its implementation on fpga

A Novel Iterative Threshold for Anti-jamming Algorithm and I...

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16th International Conference on Advanced Communication Technology (ICACT)

作者： Yao, Rugui Li, Geng Wang, Ling Bi, Yanbo Chen, Yun Northwestern Polytech Univ Sch Elect & Informat Xian 710072 Shaan Xi Peoples R China

ISBN: (纸本)9788996865032

Frequency-domain anti-jamming (FDAJ) algorithms achieve prominent performance on interference suppression with simple calculations;and hence they are widely used in many applications. The interference suppression threshold plays a key role in the algorithm and affects system performance greatly. In this paper, the initial interference threshold is derived theoretically and then a novel FDAJ algorithm is proposed based on the iterative calculation of the threshold. With the iterative process, the optimal threshold for the interference suppression can be approached with little loss of valid signals;and the anti-jamming performance can be further improved. The simulation results validate well that our proposed iterative algorithm has superior performance for interference suppression. Finally, two fpga-based implementations are presented: pipeline scheme and iterative scheme. After analysing the different characteristics of each implementation, we discuss the suitable applications for these schemes.

关键词： Frequency-domain anti-jamming iterative threshold simulation fpga-based implementation

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Investigating Measurement Methods for High-Resolution Electromagnetic Field Side-Channel Analysis 14

Investigating Measurement Methods for High-Resolution Electr...

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14 International Symposium on Integrated Circuits (ISIC)

作者： Specht, Robert Heyszl, Johann Sigl, Georg Fraunhofer Inst AISEC Munich Germany Tech Univ Munich Munich Germany

ISBN: (纸本)9781479948338

Recent publications have emphasized the power of high-resolution, low-distance EM measurements for side channel analysis. In this paper, we investigate several aspects of such measurements, e.g. different coil-diameters, probe-to-die distances, bandwidths and spatial measurement resolutions. We use an fpga-based implementation of an AES s-box as device under test and perform measurements of the magnetic near-field. Using the peak amplitude of the magnetic near-field and the Pearson correlation coefficient as quality measures, we show that the probes with smallest diameters lead to the best results. We propose a suitable trade-off between measurement time and measurement quality by using one fourth of the coil diameter as spatial measurement resolution. We show that the correlation is decreasing significantly if a bandwidth less than 300 MHz is used and we recommend a bandwidth of 1 GHz. Additionally, we confirm that the maximum value of the measured EM amplitude decreases by 1/r(2), and the correlation of the measurement by 1/r with r being the distance between probe and die.

关键词： coils cryptography electromagnetic fields field programmable gate arrays probes AES s-box EM measurements fpga-based implementation Pearson correlation coefhcient coil-diameters embedded cryptographic devices high-resolution electromagnetic field side-channel analysis magnetic near-field measurement methods probe-to-die distances side channel analysis spatial measurement resolutions Bandwidth Correlation Position measurement Probes Spatial resolution Time measurement Voltage measurement

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An fpga-based architecture for a latitude and longitude correction in autonomous navigation tasks

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MEASUREMENT 2021年 182卷 109757-109757页

作者： Correa-Caicedo, Pedro J. Barranco-Gutierrez, Alejandro I. Guerra-Hernandez, Erick I. Batres-Mendoza, Patricia Padilla-Medina, Jose A. Rostro-Gonzales, Horacio Tecnol Nacl Mexico Celaya Celaya 38010 Mexico Catedras CONACYT Mexico City DF Mexico Univ Autonoma Benito Juarez Oaxaca Escuela Sistemas Biol & Innovac Tecnol Oaxaca 68120 Oaxaca Mexico Univ Guanajuato Dept Elect Salamanca 36885 Mexico

The response speed of the intelligent systems embedded in an autonomous vehicle is crucial for its correct operation and reduction of the risks on the road derived from autonomous driving. For that reason, it is necessary to optimize the algorithms that process the data from the sensors;with that aim the Field-Programmable Gate Arrays (fpgas) offer the possibility of parallelizing the tasks to be carried out by mentioned systems, accelerating their response and improving their performance. In this regard, this paper introduces a fuzzy absolute position correction system, which corrects the latitude and longitude data registered from a GPS Pmod sensor and its implementation on a fpga to speed up the correction results. A necessary comparison of the algorithm execution time on different platforms such as: A Raspberry pi 4 model B, a personal computer (PC) with Ubuntu 18.04.4 64bit and the fpga model, was performed to validate the results and the effectiveness of the implementation. The correction system was validated in software and hardware on 4 different routes, each of them with a large number of samples. The results were highly similar in the three platforms;however, the fpga-based implementation offers a speed up of 40000x compared to software-based implementations.

关键词： fpga-based implementation Fuzzy Systems GPS Data Correction

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Bifurcation and chaos in a smooth 3D dynamical system extended from Nose-Hoover oscillator

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CHAOS SOLITONS & FRACTALS 2022年 158卷

作者： Cang, Shijian Wang, Luo Zhang, Yapeng Wang, Zenghui Chen, Zengqiang Tianjin Univ Sci & Technol Dept Prod Design Tianjin 300222 Peoples R China Tianjin Univ Sci & Technol Coll Mech Engn Tianjin Key Lab Integrated Design & Online Monitor Tianjin 300222 Peoples R China Tianjin Univ Sci & Technol Sch Elect Informat & Automation Tianjin 300222 Peoples R China Tianjin Univ Technol Tianjin Key Lab Control Theory & Applicat Complica Tianjin 300384 Peoples R China Univ South Africa Dept Elect Engn ZA-1710 Florida South Africa Nankai Univ Coll Artificial Intelligence Tianjin 300350 Peoples R China

The chaotic system with complicated dynamical behaviors has high potential in practical applications. This paper reports a simple smooth 3D dynamical system that is derived from the Nose-Hoover oscillator and has rich dynamical behaviors, such as fold-Hopf bifurcation, saddle-node bifurcation, transient chaos, and conservative chaos (hidden attractors), which respectively correspond to four cases of equilibrium: infinitely many equilibria, two equilibria, four equilibria and no equilibrium. We first concentrate on the theoretical investigation of degenerate fold-Hopf and saddle-node bifurcations. Then, the power-law distribution of average lifetime of transient chaos is calculated and the coexistence of steady state and periodic motion after transient chaos is partially exhibited by time series. For the case of no equilibrium, we further study the conservative and ergodic dynamics, and hidden attractors with extremely rare properties by time-domain waveforms, phase portraits, histograms and Poincare sections. Finally, the fpga-based experimental results are presented and they are consistent with the numerical simulation results.

关键词： Degenerate fold-Hopf bifurcation Saddle-node bifurcation Transient chaos Conservative chaos Hidden chaotic attractors fpga-based implementation

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An fpga-based integrated signal conditioner for measurement of position, velocity and acceleration of a rotating shaft using an incremental encoder

An FPGA-based integrated signal conditioner for measurement ...

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IEEE International Conference on Control, Measurement and Instrumentation

作者： K. Banerjee B. Dam K. Majumdar Dept. of Instrumentation & Electronics Engineering Jadavpur University

ISBN: (纸本)9781479988501

关键词： Digital motion control Incremental encoders Velocity and acceleration estimation fpga-based implementation Signal conditioner

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