Although sequential decoding of convolutional codes gives a very small decoding error probability, the overall reliability is limited by the probability P-G of deficient decoding, the term introduced by Jelinek to ref...
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Although sequential decoding of convolutional codes gives a very small decoding error probability, the overall reliability is limited by the probability P-G of deficient decoding, the term introduced by Jelinek to refer to decoding failures caused mainly by buffer overflow. The number of computational efforts in sequential decoding has the Pareto distribution and it is this "heavy tailed" distribution that characterizes P-G. The heavy tailed distribution appears in many fields and buffer overflow is a typical example of the behaviors in which the heavy tailed distribution plays an important role. In this paper, we give a new bound on a probability in the tail of the heavy tailed distribution and, using the bound, prove the long-standing conjecture on P-G, that is, P-G approximate to constant x 1/(sigma(rho) Nrho-1) for a large speed factor sigma of the decoder and for a large receive buffer size N whenever the coding rate R and rho satisfy E(rho) = rhoR for 0 less than or equal to p less than or equal to 1.
The successive cancellation (SC) process in which symbols are decoded sequentially by processing some intermediate information is an essential component of various decoding algorithms used for polar codes and their va...
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The successive cancellation (SC) process in which symbols are decoded sequentially by processing some intermediate information is an essential component of various decoding algorithms used for polar codes and their variants. In some decoding schemes, we may need to redo this process from some specific symbol or from the first symbol. This operation is called rewinding. Rewinding the SC process seems trivial if we have access to all intermediate log-likelihood ratios (LLRs) and partial sums. However, as the block length increases, retaining all of the intermediate information becomes inefficient and impractical. Rewinding the SC process in a memory-efficient way is a problem that we address in this paper. As we store a fraction of all the intermediate information in the memory-efficient scheme, we may not be able to rewind the SC process to the target symbol index. The reason is that some of the stored intermediate information needed to decode the target symbol may have been overwritten. To recompute the lost information, we may need to rewind the process further. Before proposing the formal scheme for the rewinding process, we explore the known properties of the SC process based on the binary representation of the bit indices. Then, we introduce a new operator used for grouping the bit indices. This special grouping helps us in finding the closest bit index to the target index for rewinding. We also analytically prove that this approach gives access to the untouched intermediate information stored in the memory which is essential in resuming the SC process. Finally, we adapt the proposed approach to multiple rewinds and apply it to SC-flip decoding and shifted-pruning-based list decoding. The numerical evaluation of the proposed solution shows a significant reduction of >= 50% in the complexity of the additional decoding attempts at medium and high SNR regimes for SC-flip decoding and less for shifted-pruning based list decoding.
This paper presents the design of a channel-based asynchronous sequential decoder implemented with quasi-delay-insensitive templates. The Powermill simulation results in TSMC 0.25-CMOS technology show that the circuit...
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This paper presents the design of a channel-based asynchronous sequential decoder implemented with quasi-delay-insensitive templates. The Powermill simulation results in TSMC 0.25-CMOS technology show that the circuit runs at 430 MHz and consumes 32 mW. Techniques to effectively partition and implement the top level design, the implementation of fast shift registers, memories, and various other structures are discussed. Compared to a previously designed synchronous fano decoder, the asynchronous version consumes 1/3 the power and runs at 2.15 times the speed assuming standard process normalization. The design also highlights the introduction of a standard-cell library and back-end design flow for asynchronous designs based on precharged half buffer (PCHB) templates.
Sequential decoding can achieve a very low computational complexity and short decoding delay when the signal-to-noise ratio (SNR) is relatively high. In this article, a low-complexity high-throughput decoding architec...
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Sequential decoding can achieve a very low computational complexity and short decoding delay when the signal-to-noise ratio (SNR) is relatively high. In this article, a low-complexity high-throughput decoding architecture based on a sequential decoding algorithm is proposed for convolutional codes. Parallel fano decoders are scheduled to the codewords in parallel input buffers according to buffer occupancy, so that the processing capabilities of the fano decoders can be fully utilized, resulting in high decoding throughput. A discrete time Markov chain (DTMC) model is proposed to analyze the decoding architecture. The relationship between the input data rate, the clock speed of the decoder and the input buffer size can be easily established via the DTMC model. Different scheduling schemes and decoding modes are proposed and compared. The novel high-throughput decoding architecture is shown to incur 3-10% of the computational complexity of Viterbi decoding at a relatively high SNR.
The fano algorithm for sequential decoding permits the simultaneous comparison of a serial bit pattern, with a large number of reference patterns and is applicable to the identification of addresses in local area netw...
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The fano algorithm for sequential decoding permits the simultaneous comparison of a serial bit pattern, with a large number of reference patterns and is applicable to the identification of addresses in local area networks. Such a requirement arises frequently in the design of bridges (filtered, buffered, repeaters) between networks, operating at the data link layer so as to be transparent to various higher-level protocols. The paper explains how the algorithm functions and how it can be implemented in hardware, operating in real time as the address bits arrive. Several specific applications are discussed.
In this paper, we introduce a novel rate-profile design based on search-constrained optimization techniques to assess the performance of polarization-adjusted convolutional (PAC) codes under fano (sequential) decoding...
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ISBN:
(纸本)9798350382853;9798350382846
In this paper, we introduce a novel rate-profile design based on search-constrained optimization techniques to assess the performance of polarization-adjusted convolutional (PAC) codes under fano (sequential) decoding. The results demonstrate that the optimized PAC code offers much reduced computational complexity compared to a construction based on a conventional genetic algorithm without a loss in error-correction performance. We propose an adaptive successive cancellation list decoding algorithm as the fitness function of our algorithm to determine the weight distribution of the rate profiles. The simulation results indicate that, for a PAC(256, 128) code, only 8% of the population requires that their fitness function be evaluated with a large list size. This represents an improvement of almost 92% over a conventional evolutionary algorithm. For a PAC(64, 32) code, this improvement is about 99%. We also consider highrate PAC(128, 105) and PAC(64, 51) codes, showing superior performance compared to other existing algorithms.
V-BLAST is an important Multiple Input and Multiple Output (MIMO) space-time architecture for future high data rate wireless communication system. In this paper, a novel computation-efficient metric-guided (MG) algori...
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ISBN:
(纸本)0780379381
V-BLAST is an important Multiple Input and Multiple Output (MIMO) space-time architecture for future high data rate wireless communication system. In this paper, a novel computation-efficient metric-guided (MG) algorithm is proposed for V-BLAST signal detection. This algorithm can achieve near Maximum Likelihood (ML) detection performance with tractable detection complexity which is inherently adaptive to channel signal-noise ratio (SNR). Through adjusting the value of one parameter, MG algorithm offers the flexibility of achieving any in-between performance-complexity tradeoff between an efficient near-ML detection and original nulling/canceling algorithm for V-BLAST. Simulation results show that proposed algorithm can offer near-ML detection performance with complexity even less than that of Schnorr-Euchner sphere decoder[6] and stack algorithm[8].
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