This work presents approximations of two classes of complex filters, those with complex poles only and those with both complex poles and zeros. The approximation of these complex coefficient filter is based on a curve...
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This work presents approximations of two classes of complex filters, those with complex poles only and those with both complex poles and zeros. The approximation of these complex coefficient filter is based on a curve-fitting technique, where the magnitude response of the filters is approximated to a rational integer-order transfer function. The proposed approximation method is validated through MATLAB simulations and is experimentally verified using a field programmable analog array (FPAA) device, which offers digital programmability.
Complex-order controllers are a generalized version of conventional integer-order controllers and are known to offer greater flexibility, better robustness, and improved system performance. This paper discusses the de...
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Complex-order controllers are a generalized version of conventional integer-order controllers and are known to offer greater flexibility, better robustness, and improved system performance. This paper discusses the design of complex-order PI/PID controllers to control the speed of an induction motor drive and an electric vehicle. The speed-tracking performance of the complex-order controllers is compared with fractional-order controllers and conventional integer-order controllers. Implementing complex-order controllers is challenging due to commercial complex-order fractance element unavailability. Hence, it is carried out by approximating the complex-order controller transfer function using an integer-order rational function with a curve-fitting approach, namely the Sanathanan Koener (SK) iterative method. This method is quite simple and can fit the required frequency range compared to the conventional Matsuda and Oustaloup approaches. The approximated controller transfer function can easily be realized by employing the AN231E04 field programmable analog array (FPAA). Simulation and experimental results highlight that the controller behaviour is in good agreement with the theoretical expectations.
The numerical simulations and hardware realizations of the structures, which are inspired by central pattern generator networks and characterized as biologically inspired systems, draw attention. Numerical simulations...
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ISBN:
(纸本)9798350343557
The numerical simulations and hardware realizations of the structures, which are inspired by central pattern generator networks and characterized as biologically inspired systems, draw attention. Numerical simulations of these structures are important in examining the characteristics of these systems. However, the studies about the hardware realizations of the central pattern generator structures also appear as an alternative research area for the applications where real-time electrical signals are required. In this study, after the examination of the central pattern generator network, which are proposed for the swimming movement control of the lamprey, the hardware implementation of the motor neuron identification in this network structure is performed. The field programmable analog array (FPAA) element is used in the implementation process and the FPAA device draws attention with its low hardware cost, rapid prototyping and reconfiguration features.
In this paper, a block based systematic approach for synchronous design of linear filters and oscillators through full design space exploration is presented, which exploits inherent hierarchical property of tree. To b...
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In this paper, a block based systematic approach for synchronous design of linear filters and oscillators through full design space exploration is presented, which exploits inherent hierarchical property of tree. To bridge the gap between system specification and hardware structure of analog system, transfer function of linear filter and characteristic equation of oscillator have been modeled using a rooted tree, formed based on the characteristics of four basic building blocks. A hardware conversion algorithm has been used to map the paths of the tree into operational transconductance amplifier (OTA) based circuits, implementing both programmable linear filter and oscillator. Twenty seven distinct architectures for filters and oscillators are generated. The proposed approach is also compatible with field programmable analog array (FPAA), as demonstrated by mapping the generated circuits into a hexagonal FPAA.
While square and square root are critical for vector operations, several challenges exist in their computation in the digital domain including power, area, and delay overheads. While selective computation in the analo...
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ISBN:
(纸本)9781665439466
While square and square root are critical for vector operations, several challenges exist in their computation in the digital domain including power, area, and delay overheads. While selective computation in the analog domain is a longstanding alternative, tradeoffs of increased noise and reduced accuracy are prominent challenges. Herein, we propose a reconfigurable analog circuit which is capable of performing any nth-power and nth-root function and may be implemented within an analog or mixed-signal fieldprogrammablearray. The resulting analog block of Magnetic Tunnel Junctions (MTJs) along with FET-based sensing and amplification circuits are circuit-switched-configurable with terminal-level control. Herein the design is configured to rapidly evaluate various arithmetic operations within acceptable error tolerances for selected applications. When compared to a state-of-the-art approximate digital multiplier, our design yields 97% reduction in transistor count and stable output within a period comparable to single-cycle execution. When compared to an alternative recently proposed analog multiplier, the proposed design yields improvement in error and versatility to perform generalized operations.
In this paper a novel random number generator is introduced and it is based on the Skew-tent discrete-time chaotic map. The RNG presented in this paper is made using the discrete-time chaotic map and chaotic sampling ...
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ISBN:
(纸本)9781728193960
In this paper a novel random number generator is introduced and it is based on the Skew-tent discrete-time chaotic map. The RNG presented in this paper is made using the discrete-time chaotic map and chaotic sampling of regular waveform method together to increase the throughput and statistical quality of the output sequence. An explanation of the arithmetic model for the proposed design is given in this paper with an algebra confirmation for the generated bit stream that shows how it passes the primary four tests of the FIPS-140-2 test suit successfully. Finally the bit stream resulting from the hardware implementation of the circuit in a similar method has been confirmed to pass all NIST-800-22 test with no post processing. A presentation of the experimentally obtained results is given therefor proving the the circuit's usefulness. The proposed RNG can be built with the integrated circuit.
Atomic force microscopy (AFM) is one of the useful tools in the fields of nanoscale measurement and manipulation. High speed scanning is one of the crucial requirements for live cell imaging and soft matter characteri...
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Atomic force microscopy (AFM) is one of the useful tools in the fields of nanoscale measurement and manipulation. High speed scanning is one of the crucial requirements for live cell imaging and soft matter characterization. The scanning speed is limited by the bandwidth of the AFM's detection and actuation components. Generally, the bandwidth of a traditional scanner is too low to conduct the live cell imaging. This paper presents a simple and integrated compact home-made AFM for high speed imaging. To improve the bandwidth of the scanner, a parallel kinematics mechanism driven by piezoelectric actuators (PZTs) is proposed for the fast positioning in the X, Y and Z directions. The mechanical design optimization, modeling and analysis, and experimental testing have been conducted to validate the performance of the proposed scanner. A number of experimental results showed that the developed scanner has the capability for broad bandwidth with low coupling errors in the actuation directions. A hybrid control strategy including feedforward and feedback loops has been designed to significantly improve the dynamic tracking performance of the scanner and a field programmable analog array (FPAA) system is utilized to implement the control algorithm for excellent and stable tracking capability. Further, a number of high speed measurements have been conducted to verify the performance of the developed AFM. (C) 2019 Elsevier Ltd. All rights reserved.
In this paper a low voltage low power field programmable analog array (FPAA) is realized. The FPAA configurable analog block (CAB) design is based on three-bit digitally controlled fully differential current conveyor....
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In this paper a low voltage low power field programmable analog array (FPAA) is realized. The FPAA configurable analog block (CAB) design is based on three-bit digitally controlled fully differential current conveyor. The FPAA consists of seven CABs. The CABs are directly connected together without adding extra hardware by placing them in a hexagonal lattice arrangement. A variable gain amplifier, tunable second-order low-pass filter, and a tunable second-order band-pass filter are realized as an application for the FPAA. The FPAA total power consumption is 105.12 mW at 1V supply. The FPAA is realized using IBM 90 nm CMOS technology model from MOSIS under voltage supply of +/- 0.5 V.
This paper introduces a novel random number generator which is based on Bernoulli discrete-time chaotic map. In order to boost the throughput and to increase the statistical quality of the output sequence, presented R...
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ISBN:
(纸本)9781538666708
This paper introduces a novel random number generator which is based on Bernoulli discrete-time chaotic map. In order to boost the throughput and to increase the statistical quality of the output sequence, presented RNG is designed using the discrete-time chaotic map together with the dual oscillator architecture. An arithmetic model of the suggested design had been elaborated and it has been algebraically confirmed that the generated bit stream has successfully passed all four primary tests of the FIPS-140-2 test suite. Lastly, it has also been confirmed that the bit stream, which was obtained from the hardware realization of the circuit in a similar way, has passed all the NIST-800-22 tests without any post-processing. The results obtained from the experiment and simulation, which confirm the usefulness of the circuit, are presented. We can build the suggested RNG using the integrated circuit.
A novel programmableanalogarray of fractional-order filters is proposed in this paper. It is constructed from an active core which is implemented using Current Feedback Operational Amplifiers as active elements. The...
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ISBN:
(纸本)9781509039821
A novel programmableanalogarray of fractional-order filters is proposed in this paper. It is constructed from an active core which is implemented using Current Feedback Operational Amplifiers as active elements. The scheme offers the realization of lowpass, highpass, bandpass, and bandstop fractional-order filter functions of various orders, and this is achieved through the utilization of resistor and capacitor banks as well as a 4-to-16 decoder. The behavior of the proposed array has been evaluated using the OrCad PSpice simulator, while the AD844 discrete-component ICs have been employed as Current Feedback Operational Amplifiers.
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