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检索条件"主题词=Field Programmable Gate Array"
1339 条 记 录,以下是161-170 订阅
排序:
Truncation and Rounding-Based Scalable Approximate Multiplier Design for Computer Imaging Applications
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Computers, Materials & Continua 2022年 第12期73卷 5169-5184页
作者: S.Rooban A.Yamini Naga Ratnam M.V.S.Ramprasad N.Subbulakshmi R.Uma Mageswari Department of Electronics and Communication Engineering Koneru Lakshmaiah Education FoundationVaddeswaramGuntur522502Andhra PradeshIndia Department of EECE GITAM(Deemed to be University)VisakhapatnamAPIndia Department of Electronics and Communication Engineering Francis Xavier Engineering CollegeTirunelveli627003Tamil NaduIndia 4Department of Computer Science and Engineering Vardhaman College of EngineeringShamshabadHyderabad501218TelanganaIndia
Advanced technology used for arithmetic computing application,comprises greater number of approximatemultipliers and approximate *** and Rounding-based Scalable ApproximateMultiplier(TRSAM)distinguish a variety of mod... 详细信息
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Design and implementation of a power quality disturbance classifier: An Al approach
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JOURNAL OF INTELLIGENT & FUZZY SYSTEMS 2006年 第6期17卷 623-631页
作者: Reaz, M. B. I. Choong, F. Sulaiman, M. S. Mohd-Yasin, F. Multimedia Univ Fac Engn Cyberjaya 63100 Selangor Malaysia
This paper presents a new intelligent system incorporating wavelet transform, artificial neural network and fuzzy logic to automate the classification of power quality disturbance. This novel and efficient method in h... 详细信息
来源: 评论
FPGA implementation of adaptive p-norm filter for non-stationary power signal parameter estimation
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IET SCIENCE MEASUREMENT & TECHNOLOGY 2020年 第2期14卷 206-219页
作者: Nanda, Sarita Pattnaik, Ansuman Dash, Pradipta Kishore KIIT Univ Sch Elect Engn Bhubaneswar Odisha India Siksha O Anusandhan Univ Multidisciplinary Res Cell Bhubaneswar Odisha India
A p-norm extreme learning machine (ELM) based on sparsity constraint is presented in this study for tracking of fundamental frequency, harmonic and dc in current power signals which finds application in phasor measure... 详细信息
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Design of SSVEP Enhancement-Based Brain Computer Interface
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IEEE SENSORS JOURNAL 2021年 第13期21卷 14330-14338页
作者: Lin, Bor-Shing Wang, Hsiao-An Huang, Yao-Kuang Wang, Yu-Lin Lin, Bor-Shyh Natl Taipei Univ Dept Comp Sci & Informat Engn New Taipei 23741 Taiwan Natl Chiao Tung Univ Inst Imaging & Biomed Photon Tainan 71150 Taiwan Chiayi Chang Gung Mem Hosp Div Cardiovasc Surg Puzi City 61363 Chiayi County Taiwan Chi Mei Med Ctr Dept Rehabil Tainan 71004 Taiwan
Brain computer interface (BCI) system is a communication bridge between the brain and the external device, and it has been rapidly developed in the recent years. Here, steady state visually evoked potential (SSVEP) is... 详细信息
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Multiple perspectives on the hardware implementations of biological neuron models and programmable design aspects
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TURKISH JOURNAL OF ELECTRICAL ENGINEERING AND COMPUTER SCIENCES 2016年 第3期24卷 1729-1746页
作者: Korkmaz, Nimet Ozturk, Ismail Kilic, Recai Erciyes Univ Fac Engn Dept Elect & Elect Engn Kayseri Turkey
A few individual design examples of programmable device-based biological neuron model implementations are available in the literature, but there is no comprehensive study that examines analog and digital programmable ... 详细信息
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FPGA-based entropy neural processor for online detection of multiple combined faults on induction motors
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MECHANICAL SYSTEMS AND SIGNAL PROCESSING 2012年 30卷 123-130页
作者: Cabal-Yepez, E. Valtierra-Rodriguez, M. Romero-Troncoso, R. J. Garcia-Perez, A. Osornio-Rios, R. A. Miranda-Vidales, H. Alvarez-Salas, R. Univ Guanajuato Carr Salamanca Valle Div Ingn HSPdigital CA Telemat Procesamiento Digital Senal Guanajuato 36700 Mexico Univ Autonoma Queretaro Fac Ingn HSPdigital CA Mecatron San Juan Del Rio 76807 Queretaro Mexico Zona Univ Univ Autonoma San Luis Potosi Fac Ingn CA Elect Potencia & Control San Luis Potosi 78290 SLP Mexico
For industry, a faulty induction motor signifies production reduction and cost increase. Real-world induction motors can have one or more faults present at the same time that can mislead to a wrong decision about its ... 详细信息
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Real-time digital simulation of power electronics systems with Neutral Point Piloted multilevel inverter using FPGA
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ELECTRIC POWER SYSTEMS RESEARCH 2011年 第2期81卷 687-698页
作者: Rakotozafy, Mamianja Poure, Philippe Saadate, Shahrokh Bordas, Cedric Leclere, Loic Fac Sci & Tech LIEN F-54506 Vandoeuvre Les Nancy France Fac Sci & Tech GREEN F-54506 Vandoeuvre Les Nancy France CONVERTEAM SAS F-90008 Belfort France
Most of actual real time simulation platforms have practically about ten microseconds as minimum calculation time step, mainly due to computation limits such as processing speed, architecture adequacy and modeling com... 详细信息
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Non-linear behavioural modelling of device-level transients for complex power electronic converter circuit hardware realisation on FPGA
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IET POWER ELECTRONICS 2018年 第9期11卷 1566-1574页
作者: Lin, Ning Shi, Bo Dinavahi, Venkata Univ Alberta Dept Elect & Comp Engn Edmonton AB Canada
Detailed device-level models of the insulated-gate-bipolar-transistor (IGBT) and diode are essential for power converter design evaluation for providing insight into circuit and device behaviours, as well as to shorte... 详细信息
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Very-large-scale integration design of a low-power and cost-effective context-based adaptive variable length coding decoder for H.264/AVC portable applications
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IET IMAGE PROCESSING 2012年 第2期6卷 104-114页
作者: Huang, H-J. Fang, C-H. Fan, C-P. Natl Chiao Tung Univ Dept Elect Engn Hsinchu 300 Taiwan Natl Chung Hsing Univ Dept Elect Engn Taichung 402 Taiwan
Context-based adaptive variable length coding (CAVLC) is a new and efficient entropy coding tool in H.264/AVC (advanced video coding). This study proposes a low-power and cost-effective CAVLC decoding architecture for... 详细信息
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A routability driven technology mapping algorithm for LUT based FPGA designs
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IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES 2001年 第11期E84A卷 2690-2696页
作者: Kao, CC Lai, YT Natl Cheng Kung Univ Dept Elect Engn Tainan 701 Taiwan
This paper presents a CAD technology mapping algorithm for LUT-based FPGAs. Since interconnections in an FPGA must be accomplished with limited routing resources, routability is the most important objective in a techn... 详细信息
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