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Systemic approach explored in the context of passive target tracking

IET SIGNAL PROCESSING 2010年第3期4卷 314-323页

作者： Totir, F. Ioana, C. Serbanescu, A. Stopin, J. Anton, L. Stankovic, S. Mil Tech Acad Bucharest 050141 Romania INPG GIPSA Lab F-38402 St Martin Dheres France Univ Montenegro Podgorica 81000 Montenegro

For obvious reasons of cost, discretion and reliability costs, locating and tracking aerial targets under an electromagnetically completely passive paradigm, relying exclusively on illuminators of opportunity, is very appealing not only for military but also for civilian tasks. Such a passive radar system could exploit signals emitted by existing commercial television or radio stations or even satellite signals, such as the ones belonging to the global positioning system. This study considers target locating and tracking using a network of passive receivers and/or non-cooperative illuminators (a multi-static radar configuration) by making use of the Doppler shift only. A concept, the systemic approach, is used to combine and interpret information available from different sensors. Both the formalisation of the problem and the hardware and software implementation are presented. Implementation makes use of multi-component polynomial-phase signal models and genetic algorithms. For increased performance, implementation on field programmable gate array is envisaged.

关键词： passive radar system radar signal processing satellite signals global positioning system reliability costs field programmable gate array target locating discretion costs multicomponent polynomial-phase signal models target tracking Optimisation techniques Radar equipment, systems and applications Signal processing and detection genetic algorithms passive target tracking

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GliFreD: Glitch-Free Duplication Towards Power-Equalized Circuits on FPGAs

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IEEE TRANSACTIONS ON COMPUTERS 2018年第3期67卷 375-387页

作者： Wild, Alexander Moradi, Amir Gueneysu, Tim Ruhr Univ Bochum Horst Gortz Inst IT Secur D-44801 Bochum Germany Univ Bremen German Res Ctr Artificial Intelligence D-28359 Bremen Germany

Designers of secure hardware are required to harden their implementations against physical threats, such as power analysis attacks. In particular, cryptographic hardware circuits need to decorrelate their current consumption from the information inferred by processing (secret) data. A common technique to achieve this goal is the use of special logic styles that aim at equalizing the current consumption at each single processing step. However, since all hiding techniques like Dual-Rail Precharge (DRP) were originally developed for ASICs, the deployment of such countermeasures on FPGA devices with fixed and predefined logic structure poses a particular challenge. In this work, we propose and practically evaluate a new DRP scheme (GliFreD) that has been exclusively designed for FPGA platforms. GliFreD overcomes the well-known early propagation issue, prevents glitches, uses an isolated dual-rail concept, and mitigates imbalanced routings. With all these features, GliFreD significantly exceeds the level of physical security achieved by any previously reported, related countermeasures for FPGAs.

关键词： Dual-rail precharge logic field programmable gate array side-channel attack power analysis power-equalization hiding

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Indirect sliding mode power control for three phase grid connected power converter

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IET POWER ELECTRONICS 2015年第6期8卷 977-985页

作者： Hemdani, Asma Dagbagi, Mohamed Naouar, Wissem Mohamed Idkhajine, Lahoucine Belkhodja, Ilhem Slama Monmasson, Eric Univ Tunis El Manar Ecole Natl Ingn Tunis Lab Syst Elect LR11ES15 Tunis 1002 Tunisia SATIE IUP GEII F-95031 Cergy Pontoise France

Grid connected power converters are widely used to interface between grid - on one side- and loads or renewable energy sources - on the other side. This work presents an indirect sliding mode power control (ISMPC) for three phase grid connected power converter. This control is characterised by improved robustness with regard to external disturbances and parameters changes, while insuring at the same time low current total harmonic distortion factor. The development and implementation of the ISMPC algorithm on low cost Microsemi SmartFusion digital solution is also described. This digital solution includes in the same chip a field programmable gate array (FPGA) fabric and a Cortex-M3 processor associated to large number of peripheral cores. The developed ISMPC is compared with standard and commonly used controls for grid connected converters to show its interest and advantages. Moreover, an overview of the experimental set-up, the description of the algorithm modular partitioning between FPGA and processor, the resources optimisation as well as the execution time reduction are presented. Selected experimental results corresponding to different operation steps are presented to illustrate performances and effectiveness of the proposed ISMPC algorithm.

关键词： variable structure systems power control power grids power convertors renewable energy sources harmonic distortion digital control field programmable gate arrays optimisation robust control indirect sliding mode power control three phase grid connected power converter ISMPC renewable energy source current total harmonic distortion factor Microsemi SmartFusion digital solution field programmable gate array FPGA Cortex-M3 processor modular partitioning resource optimisation execution time reduction

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The FPGA Pixel array Detector

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NUCLEAR INSTRUMENTS & METHODS IN PHYSICS RESEARCH SECTION A-ACCELERATORS SPECTROMETERS DETECTORS AND ASSOCIATED EQUIPMENT 2013年 701卷 7-16页

作者： Hromalik, Marianne S. Green, Katherine S. Philipp, Hugh T. Tate, Mark W. Gruner, Sol M. SUNY Coll Oswego Dept Comp Sci Oswego NY 13126 USA Cornell Univ Lab Atom & Solid State Phys Ithaca NY 14853 USA Cornell Univ Cornell High Energy Synchrotron Source Ithaca NY 14853 USA

A proposed design for a reconfigurable x-ray Pixel array Detector (PAD) is described. It operates by integrating a high-end commercial field programmable gate array (FPGA) into a 3-layer device along with a high-resistivity diode detection layer and a custom, application-specific integrated circuit (ASIC) layer. The ASIC layer contains an energy-discriminating photon-counting front end with photon hits streamed directly to the FPGA via a massively parallel, high-speed data connection. FPGA resources can be allocated to perform user defined tasks on the pixel data streams, including the implementation of a direct time autocorrelation function (ACF) with time resolution down to 100 ns. Using the FPGA at the front end to calculate the ACF reduces the required data transfer rate by several orders of magnitude when compared to a fast framing detector. The FPGA-ASIC high-speed interface, as well as the in-FPGA implementation of a real-time ACF for x-ray photon correlation spectroscopy experiments has been designed and simulated. A 16 x 16 pixel prototype of the ASIC has been fabricated and is being tested. (C) 2012 Published by Elsevier B.V.

关键词： X-ray Pixel array Detectors field programmable gate array Real-time data processing Autocorrelation function

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FPGA implementation of NN based LMS-LMF control algorithm in DSTATCOM for power quality improvement

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CONTROL ENGINEERING PRACTICE 2020年 98卷 104378-000页

作者： Malathi, S. Jayachandran, J. SASTRA Deemed Univ Dept Elect & Elect Engn Thanjavur 613401 Tamil Nadu India

Neural Network (NN) based Least Mean Square (LMS)-Least Mean Fourth (LMF) control technique is developed and implemented in field programmable gate array (FPGA) for Shunt Active Power Filter (SAPF) to enhance Power Quality (PQ) in three-phase four wire distribution system. The PQ enhancement comprises the improvement of power factor, mitigation of harmonics and compensation of reactive power. The proposed control strategy is simulated in MATLAB/Simulink to determine the reference source currents and weights of active and reactive components. The simulation results of LMS-LMF control are compared with the other three control strategies. The NN control is developed as individual modules in FPGA. Thus it can be configured to any other research area which has identical requirements. The FPGA implementation overcomes the drawback of conventional controllers with a fast and accurate response. The FPGA based proposed control strategy for SAPF is developed as a laboratory prototype and the results obtained are analyzed. The results attained adhere to power quality standards.

关键词： Neural network Shunt active power filter Total harmonic distortion field programmable gate array Power quality

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Low Complexity Digital Quadrature Oscillators for Variable Frequency Applications

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IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS 2024年第9期71卷 10475-10485页

作者： Sengupta, Arkadeb Shahu, Vihan Kundu, Utsab John, Vinod Univ Kiel Chair Power Elect D-24143 Kiel Germany Indian Inst Sci Dept Elect Engn Bengaluru 560012 India

Switching frequency is utilized as a degree of freedom in digital control strategies for power converters. In addition to carrier-based schemes, quadrature oscillators offer an alternative method for the generation of variable frequency switching pulses. In this article, amplitude instability in a computationally simple digital quadrature oscillator is analyzed. Algorithms for stabilizing the oscillator are developed based on this. Further implementation issues arising are addressed and a systematic comparison to carrier-based schemes is executed. It is shown that the proposed approach can be implemented with only four additions and four comparison steps without resorting to multiplication. The studies are validated in system simulation and experiments on a commercial field programmable gate array board.

关键词： Amplitude stabilization field programmable gate array integrator discretization quadrature oscillator second order generalized integrator

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Hardware-assisted initialisation for constant modulus algorithm adaptive antenna

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IET MICROWAVES ANTENNAS & PROPAGATION 2008年第4期2卷 303-311页

作者： Boonpoonga, A. Sirisuk, P. Chongcheawchamnan, M. Patisang, S. Krairiksh, M. King Mongkuts Inst Technol Ladkrabang Fac Engn Bangkok 10520 Thailand King Mongkuts Inst Technol Ladkrabang Res Ctr Commun & Informat Technol Bangkok 10520 Thailand Mahanakorn Univ Technol Fac Engn Bangkok 10530 Thailand

A cost-effective approach for initialisation of an adaptive antenna based on the constant modulus algorithm (CMA) is proposed. The technique utilises 1 bit phase shifters and a power detector, which are normally integrated with a multibeam antenna, to determine the maximum power beam direction. Consequently, the beam is exploited as an initial beam for CMA. Development of hardware-assisted initialisation is discussed. In addition field programmable gate array implementation of a CMA processor and associated control circuitry is presented. Several simulations are performed to evaluate the performance of the proposed initialisation technique. In addition, the developed prototype is tested with a phase array antenna designed for operation at the IMT2000 frequency of 1.95 GHz. Experimental results confirm superiority of the proposed technique.

关键词： Other analogue circuits field programmable gate arrays multibeam antenna field programmable gate array constant modulus algorithm hardware-assisted initialisation adaptive antenna arrays phase shifters associated control circuitry Logic circuits CMA processor CMA based adaptive antenna Antenna arrays power detector

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Design and implementation of equilateral triangle array digital direction finding system

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IEICE ELECTRONICS EXPRESS 2012年第13期9卷 1102-1108页

作者： Zhou, Lin Wang, Fan Gao, Huotao Sun, Yuxiang Zhang, Huajun Wuhan Univ Elect Informat Dept Wuhan 430072 Peoples R China

In this work, a scheme of an equilateral triangle array digital direction finding system is proposed, which implements the online real-time direction finding task for an airborne system. The three-elements equilateral triangle array can be used for calibrating the channel errors and eliminating the DOA (direction of arrival) fuzzy problem of the two-elements linear array, which is greatly reduced the system complexity and suitable for portable requirement. At the same time, the project adopts field programmable gate array (FPGA) to process the sample data in parallel mode, including data quadrature demodulation and multiple signal classification (MUSIC) algorithm. The hardware implementation of MUSIC algorithm makes the system more flexible and faster than software implementation. The experimental results show that the deviation is less than 0.5 degrees with over 64 snapshots and the time is less 6ms with 256 snapshots, and then the program can complete the MUSIC algorithm accurately with high speed.

关键词： direction of arrival equilateral triangle array channel calibration field programmable gate array multiple signal classification algorithm

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A Video Streaming Encryption Method and Experimental System Based on Reconfigurable Quaternary Logic Operators

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IEEE ACCESS 2024年 12卷 25034-25051页

作者： Zhou, Xinyu Wang, Hongjian Li, Kuiyan Tang, Lifeng Mo, Ningchun Jin, Yi Donghua Univ Sch Comp Sci & Technol Shanghai 201620 Peoples R China Shanghai Astronaut Elect Co Ltd Shanghai 201821 Peoples R China Shanghai Meiduo Commun Equipment Co Ltd Shanghai 200333 Peoples R China Shanghai Univ Sch Comp Engn & Sci Shanghai 200444 Peoples R China

Multiple-valued logics (MVL) have abundant operation functions which can be used for encryption. A reconfigurable MVL operator can perform all MVL functions with a universal circuit structure at fast operation speed, based on which a one-time-pad cryptosystem is expected to be built. However, we find that when the existing MVL encryption method is applied to video data encryption, the color edges in the plaintext image will remain in the ciphertext image, resulting in partial leakage of information. To solve this problem, we propose byte reorganization and random mask strategies, forming an improved MVL encryption method for video streaming. For verifying the effectiveness of the method, we implement an FPGA-based experimental system to encrypt and decrypt real-time video streaming data. In this system, 16-quit reconfigurable quaternary logic operators are implemented to encrypt, decrypt and derive keys. The process of either encryption or decryption only takes 34 clock cycles. The encryption and decryption modules are capable of processing streaming data at a speed of 6.21 Gbit/s, showing that the system has real-time processing capability. For proving that our method is secure, we compare our improved MVL encryption method with existing image encryption methods in terms of common security evaluation metrics. Experimental results show that our method solves the problem of remained color edge and the ciphertext exhibits good statistical properties.

关键词： Encryption Cryptography Streaming media Real-time systems Symbols Image edge detection field programmable gate arrays Videos Image processing Reconfigurable architectures Video and image encryption multiple-valued logic reconfigurable quaternary logic operator field programmable gate array

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FPGA Based Integrated Control of Brushless DC Motor for Renewable Energy Storage System

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CYBERNETICS AND SYSTEMS 2024年第4期55卷 918-939页

作者： Karthikeyan, S. Lakshmi, K. Sri Krishna Coll Engn & Technol Coimbatore Tamilnadu India KSR Coll Engn Dept EEE Tiruchengode Tamilnadu India

To reduce air pollution and global warming, renewable energy technologies may generate power. Wind, solar PV, and fuel cell energy are the primary sources. Solar PV system-powered brushless direct current motor (BLDC) drives are used in the automobile industry due to their importance. In this study, Sheppard-Taylor (S-T) converter and Pulse Width Modulated (PWM) Inverter-fed BLDC provide steady voltage across the BLDC motor drive independent of solar PV system power output. When renewable energy is scarce, the proposed battery-supercapacitor hybrid energy storage system (BS-HESS) provides electricity. S-T converters may be used for load matching and power processing to create energy-efficient systems and stabilize PV panel output voltage. The variable step size open circuit voltage-Maximum Power Point Tracking (VSSOCV-MPPT) technique in S-T converter switching pulses extracts maximum power from the solar PV system. This study considers the PVSWPS control function as a Port-Controlled Hamiltonian (PCH) system to continue rural growth and reduce the greatest demand and load. MATLAB/Simulink software simulates the system's performance, and FPGA controllers validate the controller's real-time performance.

关键词： Brushless DC motor energy storage system field programmable gate array renewable energy storage system solar water pumping system (PVSWPS) S-T converter variable step size open circuit voltage-Maximum Power Point Tracking (VSSOCV-MPPT)

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