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检索条件"主题词=Field Programmable Gate Array"
1331 条 记 录,以下是211-220 订阅
排序:
A novel autonomous low-cost on-board data handling architecture for a pin-point planetary lander
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ACTA ASTRONAUTICA 2011年 第7-8期68卷 811-829页
作者: Vladimirova, Tanya Fayyaz, Muhammad Sweeting, Martin N. Vitanov, Valentin I. Univ Surrey Dept Elect Engn Surrey Space Ctr Guildford GU2 7XH Surrey England Univ Durham Sch Engn & Comp Sci Durham DH1 3LE England
There has been increased interest in the exploration of the Moon in recent years. Pinpoint precision landing is highly desirable for future lunar missions. This paper is concerned with the design of the on-board data ... 详细信息
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Rapid prototyping of hardware/software codesign for embedded signal processing
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JOURNAL OF INFORMATION SCIENCE AND ENGINEERING 1998年 第3期14卷 605-632页
作者: Hwang, YT Wang, YH Hwang, JS Natl Yunlin Univ Sci & Technol Dept Elect Engn Yunlin 640 Taiwan
In this paper, we propose a target board architecture suitable for embedded signal processing applications based on hardware software codesign. The target board, which serves as a system attached to a host PC via a PC... 详细信息
来源: 评论
An Unbiased MCMC FPGA-Based Accelerator in the Land of Custom Precision Arithmetic
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IEEE TRANSACTIONS ON COMPUTERS 2017年 第5期66卷 745-758页
作者: Liu, Shuanglong Mingas, Grigorios Bouganis, Christos-Savvas Imperial Coll Dept Elect & Elect Engn London SW7 2AZ England
Markov Chain Monte Carlo (MCMC) based methods have been the main tool used for Bayesian Inference by practitioners and researchers due to their flexibility and theoretical properties that guarantee unbiased sampling-b... 详细信息
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Automated framework for partitioning DSP applications in hybrid reconfigurable platforms
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MICROPROCESSORS AND MICROSYSTEMS 2007年 第1期31卷 1-14页
作者: Galanis, M. D. Milidonis, A. Theodoridis, G. Soudris, D. Goutis, C. E. Univ Patras VLSI Design Lab Elect & Comp Engn Dept Rion Greece Aristotle Univ Thessaloniki Dept Phys Sect Elect GR-54006 Thessaloniki Greece Democritus Univ VLSI Design Ctr Elect & Comp Engn Dept Xanthi Greece
In this paper, we present a software framework that implements a formalized methodology for partitioning Digital Signal Processing applications between reconfigurable hardware blocks of different granularity. A hybrid... 详细信息
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FPGA-based methodology for depth-of-field extension in a single image
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DIGITAL SIGNAL PROCESSING 2017年 70卷 14-23页
作者: Lopez-Ramirez, M. Ledesma-Carrillo, L. M. Cabal-Yepez, E. Botella, G. Rodriguez-Donate, C. Ledesma, Sergio Univ Guanajuato Div Ingn Campus Irapuato SalamancaAve Univ SN Guanajuato 38944 Mexico Univ Complutense Madrid Dept Arquitectura Comp & Automat Ave Complutense S-N E-28040 Madrid Spain
Computer vision applications rely upon high resolution images with extended depth of field (DoF). Most approaches contain arrays of lenses and computing intensive algorithms that must be calibrated every time, to reac... 详细信息
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Development of a FPGA based fuzzy neural network system for early diagnosis of critical health condition of a patient
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COMPUTERS IN BIOLOGY AND MEDICINE 2010年 第2期40卷 190-200页
作者: Chowdhury, Shubhajit Roy Saha, Hiranmay Jadavpur Univ Dept Elect & Telecommun Engn IC Design & Fabricat Ctr Kolkata 700032 W Bengal India
The paper describes the design and training of a fuzzy neural network used for early diagnosis of a patient through an FPGA based implementation of a smart instrument. The system employs a fuzzy interface cascaded wit... 详细信息
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Real-time emulation of a three-phase Vienna rectifier with DC voltage control and power factor correction
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ELECTRICAL ENGINEERING 2020年 第1期102卷 97-106页
作者: Aiello, G. Cacciato, M. Scarcella, G. Scelba, G. Gennaro, F. Aiello, N. DIEEI Univ Catania Catania Italy STMicroelectronics Syst Res & Applicat Catania Italy
The paper deals with the accomplishment of a FPGA-based dynamic model of a three-phase Vienna rectifier controlled in order to feature unity power factor operations. Such a model has been developed for the Hardware In... 详细信息
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Design and FPGA Implementation of a Novel Efficient FRM-Based Channelized Receiver Structure
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IEEE ACCESS 2019年 7卷 114778-114787页
作者: Zhang, Wenxu Yao, Yushuang Zhao, Zhongkai Zhao, Wentong He, Junxi Harbin Engn Univ Coll Informat & Commun Engn Harbin 150001 Peoples R China
The main application of the filter bank in radar signal processing is the wideband digital channelized receiver. In order to save hardware resources of the field programmable gate array (FPGA), the efficient channeliz... 详细信息
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FPGA-based embedded platform for fiber optic gyroscope signal denoising
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INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS 2014年 第7期42卷 744-757页
作者: Peesapati, Rangababu Sabat, Samrat L. Karthik, K. P. Narasimhappa, M. Giribabu, N. Nayak, J. Univ Hyderabad Sch Phys Hyderabad 500046 Andhra Pradesh India Res Ctr Imarat Hyderabad 500069 Andhra Pradesh India
This paper presents System on Chip (SoC) implementation of a proposed denoising algorithm for fiber optic gyroscope (FOG) signal. The SoC is developed using an Auxillary Processing Unit of the proposed algorithm and i... 详细信息
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Design and Analysis of Linear Phase Finite Impulse Response Filter Using Water Strider Optimization Algorithm in FPGA
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CIRCUITS SYSTEMS AND SIGNAL PROCESSING 2022年 第9期41卷 5254-5282页
作者: Karthick, R. Senthilselvi, A. Meenalochini, P. Senthil Pandi, S. Sethu Inst Technol Dept Elect & Commun Engn Pulloor Tamil Nadu India SRM Inst Sci & Technol Dept Comp Sci & Engn Ramapuram campus Chennai Tamil Nadu India Sethu Inst Technol Dept Elect & Elect Engn Pulloor Tamil Nadu India Mohamed Sathak A J Coll Engn Dept Comp Sci & Engn Chennai Tamil Nadu India
In this manuscript, an optimal linear phase finite impulse response (FIR) filter is designed using water strider optimization algorithm and implemented in the field programmable gate array (FPGA). The initiative behin... 详细信息
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