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Portable device for continuous sensing with rapidly pulsed LEDs - Part 1: Rapid on-the-fly processing of large data streams using an open source microcontroller with field programmable gate array

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MEASUREMENT 2019年 146卷 749-757页

作者： Noori, Ansara Mahbub, Parvez Parry, John S. Davis, John Lucieer, Arko Macka, Mirek Univ Tasmania Australia Ctr Res Separat Sci ACROSS Hobart Australia Univ Tasmania Sch Phys Sci Chem Hobart Australia Victoria Univ Inst Sustainable Ind & Livable Cities Footscray Pk Campus Melbourne Vic 3011 Australia Univ Tasmania Cent Sci Lab Private Bag 74 Hobart Tas 7001 Australia Univ Tasmania Sch Land & Food Private Bag 76 Hobart Tas 7001 Australia Mendel Univ Brno Dept Chem & Biochem Zemedelska 1 Brno 61300 Czech Republic Brno Univ Technol Cent European Inst Technol Purkynova 123 Brno 61200 Czech Republic

We designed a portable system using an open source microcontroller (mu C) with built-in field programmable gate array (FPGA) for on-the-fly data acquisition and processing of optical data generated from rapidly pulsed infrared light emitting diodes (IR LEDs) for optical sensing of gases. The system is used for rapid pulse generation (ca. 2 mu s short pulses with a typical repetition rate of 1 kHz) to drive the IR LED, as well as for the optical sensing data acquisition and processing on-the-fly large data streams of ca. 2 Gbit/s. The flexibility and performance of the system is demonstrated. Each of the digitally processed signal pulses yielded one data point of analytical signal in time as a quasi-continuous data stream produced at a rate of between 1000 and 0.1 Hz. This microcontroller-based portable open source platform is then implemented in on-the-fly data acquisition and processing, of analytical signals enabling continuous gas sensing. (C) 2019 Elsevier Ltd. All rights reserved.

关键词： field programmable gate array Red Pitaya microcontroller On-the-fly data acquisition and processing IR LED Rapid microsecond pulsing Portable sensor

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Discrete wavelet transform realisation using run-time reconfiguration of field programmable gate array (FPGA)s

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IET CIRCUITS DEVICES & SYSTEMS 2011年第4期5卷 321-328页

作者： Desmouliers, C. Oruklu, E. Saniie, J. IIT Dept Elect & Comp Engn Chicago IL 60616 USA

Designing a universal embedded hardware architecture for discrete wavelet transform is a challenging problem because of the diversity among wavelet kernel filters. In this work, the authors present three different hardware architectures for implementing multiple wavelet kernels. The first scheme utilises fixed, parallel hardware for all the required wavelet kernels, whereas the second scheme employs a processing element (PE)-based datapath that can be configured for multiple wavelet filters during run-time. The third scheme makes use of partial run-time configuration of FPGA units for dynamically programming any desired wavelet filter. As a case study, the authors present FPGA synthesis results for simultaneous implementation of six different wavelets for the proposed methods. Performance analysis and comparison of area, timing and power results are presented for the Virtex-II Pro FPGA implementations.

关键词： partial run-time configuration filters universal embedded hardware architecture discrete wavelet transform wavelet kernel filter processing element-based datapath run-time reconfiguration discrete wavelet transforms field programmable gate array Virtex-II Pro FPGA field programmable gate arrays

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Analysis of the error susceptibility of a field programmable gate array-based image compressor through random event injection simulation

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IET COMPUTERS AND DIGITAL TECHNIQUES 2012年第3期6卷 160-165页

作者： Lopes Filho, A. d'Amore, R. Natl Inst Space Res INPE Div Eletron Aeroespacial Sao Jose Dos Campos SP Brazil ITA Dept Eletron Aplicada Sao Jose Dos Campos SP Brazil

The successful use of commercial-off-the-shelf (COTS) devices on board space applications requires the use of fault mitigation methods because of the effects of space radiation in microelectronics devices. This study describes a scheme for the random injection of single event transients/upsets to evaluate the viability of employing COTS field programmable gate array for an onboard, low-complexity, remote-sensing image data compressor. The fault injection features are added to the application to be tested by modifying its hardware description language source code. Then the tests are executed by simulation, with or without the inclusion of fault mitigation methods, so that comparative evaluations can be quickly obtained. The evaluation results (robustness enhancement against area) of different fault mitigation methods are presented, with good estimates of the behaviour of the hardware implementation of the application in a space radiation environment.

关键词： COTS device image compressor random event injection simulation single event transient Logic and switching circuits Image and video coding hardware description languages commercial-off-the-shelf single event upset error susceptibility Logic circuits field programmable gate arrays Logic design methods fault injection features Computer vision and image processing techniques field programmable gate array image coding radiation effects Radiation effects (semiconductor technology) board space application space radiation Digital circuit design, modelling and testing microelectronics device hardware description language source code fault mitigation method

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RadPC: A Novel Single-Event Upset Mitigation Strategy for field programmable gate array-Based Space Computing

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JOURNAL OF AEROSPACE INFORMATION SYSTEMS 2021年第5期18卷 280-288页

作者： Major, Christopher M. Bachman, Annie Barney, Colter Tamke, Skylar LaMeres, Brock J. Montana State Univ Elect & Comp Engn Dept 324 Norm Asbjornson Hall Bozeman MT 59715 USA Montana State Univ Space Sci & Engn Lab Cobleigh Hall Bozeman MT 59717 USA Montana State Univ Elect & Comp Engn Dept 316-C Norm Asbjornson Hall Bozeman MT 59717 USA

This paper presents a computer architecture with the ability to respond to radiation-induced faults. The architecture presented advances the state-of-the-art by implementing a redundant multiprocessor system on a commercial-off-the-shelf field programmable gate array. The system, called RadPC, can respond to radiation-induced faults and undergo repairs as necessary. A reliability analysis is conducted using Markov chain models to characterize the architecture's ability to continue performance despite faults. Further analysis regarding expected radiation exposure is provided for runtime context of the architecture.

关键词： field programmable gate array Space Computing Commercial off the Shelf Triple Modular Redundancy Microprocessors Semiconductor Power Cycling MATLAB Metal Oxide Semiconductors Numerical Modeling

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A field programmable gate array controlled high-current pulsed source for airborne transient electromagnetic system

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IET POWER ELECTRONICS 2021年第7期14卷 1313-1322页

作者： Liu, Wei Hu, Xuquan Liao, Xian Liu, Longhuan Fu, Zhihong Chongqing Univ Sch Elect Engn Dept Elect Engn Theory & New Technol Chongqing Peoples R China Chongqing Triloop Prospecting Technol Co Ltd Chongqing Peoples R China

A high-current pulsed source with high charging efficiency, high stability and low current ripple is proposed for airborne transient electromagnetic method application. The high voltage capacitor bank is employed to provide and store energy for generating current pulses in the inductive load. An N-channel interleaved boost module is designed to replenish the capacitor energy gap so that current pulses can be repeated in a short time. The operation principles of the proposed topology are explained and the theoretical analysis is provided. In addition, a convenient and effective control strategy to raise efficiency of the charging circuit is introduced. The concise closed-loop control method directed at the characteristics of load variations is available for changing the steady operation and control the output current. Logic input and output modules based on field programmable gate array are designed for the controller. A laboratory prototype with the maximum peak current 400 A is built for the load coil of 2.1 mH and 150 m omega to verify the effectiveness of the proposed topology and control method.

关键词： airborne transient electromagnetic system capacitors field programmable gate array Logic circuits concise closed-loop control method high voltage capacitor bank closed loop systems airborne transient electromagnetic method application bridge circuits low current ripple capacitor energy gap high charging efficiency inductance current pulses field programmable gate arrays high-current pulsed source current 400.0 A power capacitors power convertors charging circuit N-channel interleaved boost module power supply circuits Capacitors Power electronics, supply and supervisory circuits

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field programmable gate array-based new fusion control for photovoltaic inverter

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COMPUTERS & ELECTRICAL ENGINEERING 2022年 98卷 107738-107738页

作者： Prathap, Joseph Anthony Anandhi, T. S. Vardhaman Coll Engn Dept Elect & Commun Engn Hyderabad India Annamalai Univ Dept Elect & Instrumentat Engn Chidambaram India

This paper proposes a new fusion of digital controls for Photovoltaic (PV) fed DC-DC-AC inverter. The proposed PV-DC-DC-AC design includes the control for voltage regulation of the closed-loop buck converter by combining two duty cycles of Digital Proportional Integral-Digital Pulse Width Modulation (DPI-DPWM) and Maximum Power Point Tracking (MPPT) for one of the DC supply (9V) of the 81-level Trinary Cascaded Hybrid Multi-Level Inverter (TCHMLI). The control for the DC-DC converter is provided by the DPWM techniques, and the TCHMLI requires 16 switching patterns that are to be controlled by the Half Height-Switching Angle Method (HH-SAM). The real-time implementation for the proposed fusion control is verified with a resolution of 2(8) and 2(10) bits and validated using field programmable gate array (FPGA). The hardware result of the proposed photovoltaic inverter is compared with the existing methods and proves to be feasible.

关键词： Photo voltaic module Maximum power point tracking Proportional integral controller Pulse width modulation Switching angle algorithm Buck converter Multi-level inverter field programmable gate array

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Research and implementation of a fabric printing detection system based on a field programmable gate array and deep neural network

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TEXTILE RESEARCH JOURNAL 2022年第7-8期92卷 1060-1078页

作者： Li, Feng Xi, Qinggang Donghua Univ Sch Comp Sci & Technol 2999 Renmin North Rd Shanghai 201620 Peoples R China

In this paper, aiming at the problems of difficult positioning, slow speed and low precision of digital printing, a detection system suitable for textile printing positioning is proposed and designed. This detection system innovatively combines a neural network and field programmable gate array (FPGA) to realize rapid and accurate positioning of printing. In the neural network part, this paper selects the backbone network Darknet19 of YOLOv2 as the backbone network, and under the premise of ensuring a certain detection accuracy, the network model is pruned and quantified to make it suitable for deployment on the embedded device FPGA. In addition, before the network training, this paper optimizes the candidate boxes by introducing k-means clustering to customize the analysis of the fabric print dataset to improve the detection accuracy. In the FPGA part, this paper optimizes the architecture on the FPGA side in two parts: data computation and data transmission. In terms of computational optimization, parallel optimization of the neural network is performed by combining FPGA optimization methods, such as pipeline and unroll. In terms of transmission optimization, we use a double-buffered design to ping-pong in the input and output modules to overlap the latency, and then use multi-port transmission to improve the overall bandwidth utilization and reduce the transmission latency caused by on-chip and off-chip interactions. The experimental results show that the detection system combining the neural network and FPGA can effectively position fabric prints and meet the needs of real-time. The design scheme has lower power compared to the graphics processing unit and is faster compared to the central processing unit.

关键词： field programmable gate array neural network fabric detection

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Development of field programmable gate array-based Reactor Trip Functions Using Systems Engineering Approach

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NUCLEAR ENGINEERING AND TECHNOLOGY 2016年第4期48卷 1047-1057页

作者： Jung, Jaecheon Ahmed, Ibrahim KEPCO Int Nucl Grad Sch Nucl Power Plant Engn 1456-1 Shinam Ri Ulsan 689882 South Korea

Design engineering process for field programmable gate array (FPGA)-based reactor trip functions are developed in this work. The process discussed in this work is based on the systems engineering approach. The overall design process is effectively implemented by combining with design and implementation processes. It transforms its overall development process from traditional V-model to Y-model. This approach gives the benefit of concurrent engineering of design work with software implementation. As a result, it reduces development time and effort. The design engineering process consisted of five activities, which are performed and discussed: needs/systems analysis;requirement analysis;functional analysis;design synthesis;and design verification and validation. Those activities are used to develop FPGA-based reactor bistable trip functions that trigger reactor trip when the process input value exceeds the setpoint. To implement design synthesis effectively, a model-based design technique is implied. The finite-state machine with data path structural modeling technique together with very high speed integrated circuit hardware description language and the Aldec Active-HDL tool are used to design, model, and verify the reactor bistable trip functions for nuclear power plants. Copyright (C) 2016, Published by Elsevier Korea LLC on behalf of Korean Nuclear Society.

关键词： field programmable gate array Finite State Machine with Data Path Reactor Trip Functions Systems Engineering

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Development of field programmable gate array-based encryption module to mitigate man-in-the-middle attack for nuclear power plant data communication network

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NUCLEAR ENGINEERING AND TECHNOLOGY 2018年第5期50卷 780-787页

作者： Elakrat, Mohamed Abdallah Jung, Jae Cheon KEPCO Int Nucl Grad Sch Dept Nucl Engn Ulsan South Korea

This article presents a security module based on a field programmable gate array (FPGA) to mitigate man-in-the-middle cyber attacks. Nowadays, the FPGA is considered to be the state of the art in nuclear power plants I&C systems due to its flexibility, reconfigurability, and maintainability of the FPGA technology;it also provides acceptable solutions for embedded computing applications that require cybersecurity. The proposed FPGA-based security module is developed to mitigate information-gathering attacks, which can be made by gaining physical access to the network, e.g., a man-in-the-middle attack, using a cryptographic process to ensure data confidentiality and integrity and prevent injecting malware or malicious data into the critical digital assets of a nuclear power plant data communication system. A model-based system engineering approach is applied. System requirements analysis and enhanced function flow block diagrams are created and simulated using CORE9 to compare the performance of the current and developed systems. Hardware description language code for encryption and serial communication is developed using Vivado Design Suite 2017.2 as a programming tool to run the system synthesis and implementation for performance simulation and design verification. Simple windows are developed using Java for physical testing and communication between a personal computer and the FPGA. (C) 2018 Korean Nuclear Society, Published by Elsevier Korea LLC.

关键词： AES-128 Cyber Security Encryption field programmable gate array I&C

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field programmable gate array-based coherent lidar employing the ordinal statistics method for fast Doppler frequency determination

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OPTICAL ENGINEERING 2022年第12期61卷 124102-124102页

作者： Saklakova, Viktoriia Han, Yuli Zhang, Shuhua Qin, Zheng Xue, Xianghui Chen, Tingdi Sun, Dongsong Zhao, Yiming Zheng, Jun Univ Sci & Technol China CAS Key Lab Geospace & Environm Hefei Peoples R China Univ Sci & Technol China Anhui Mengcheng Geophys Natl Observat & Res Stn Hefei Peoples R China Beijing Res Inst Telemetry Beijing Peoples R China

We report the development of a portable coherent Doppler lidar (CDL) system incorporating onboard field programmable gate array for real-time data processing. An ordinal statistic-based mean Doppler frequency estimation algorithm with high accuracy and low computational cost is proposed. The basic characteristics of the proposed method were specified with the use of mathematical modeling through the algorithm, realized as MATLAB computer code that includes parts simulating lidar signals and data processing. A comparison of the proposed method with established and well-used determination methods of the maximum Doppler frequency is accomplished. The ordinal statistics method is easy to implement and facilitates obtaining computational results swiftly. To demonstrate the performance of this lidar system, an intercomparison field campaign between lidar and ultrasonic anemometer is carried out. The excellent degree of correlation experimentally confirmed the feasibility of developing affordable, low-power consumption, compact, and robust CDL systems for various industrial and scientific applications.(c) The Authors. Published by SPIE under a Creative Commons Attribution 4.0 International License.

关键词： portable lidar coherent Doppler lidar field programmable gate array wind measurement

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