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检索条件"主题词=Field Programmable Gate Arrays"
41522 条 记 录,以下是31-40 订阅
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On-line fault detection for bus-based field programmable gate arrays
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IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS 1998年 第4期6卷 656-666页
作者: Shnidman, NR Mangione-Smith, WH Potkonjak, M MIT Dept Elect Engn & Comp Sci Cambridge MA 02139 USA Univ Calif Los Angeles Dept Elect Engn Los Angeles CA 90095 USA MIT Dept Comp Sci Cambridge MA 02139 USA
We introduce a technique for on-line built-in self-testing (BIST) of bus-based held programmable gate arrays (FPGA's), This system detects deviations from the intended functionality of an FPGA without using specia... 详细信息
来源: 评论
SYNTHESIS METHODS FOR field-programmable gate arrays
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PROCEEDINGS OF THE IEEE 1993年 第7期81卷 1057-1083页
作者: SANGIOVANNIVINCENTELLI, A ELGAMAL, A ROSE, J STANFORD UNIV DEPT ELECT ENGNSTANFORDCA 94305 UNIV TORONTO DEPT ELECT ENGNTORONTO M5S 1A4ONTARIOCANADA
field programmable gate arrays (FPGA's) reduce the turn-around time of application-specific integrated circuits from weeks to minutes. However, the high complexity of their architectures makes manual mapping of de... 详细信息
来源: 评论
Reconfiguration time overhead on field programmable gate arrays: reduction and cost model
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IET COMPUTERS AND DIGITAL TECHNIQUES 2012年 第2期6卷 105-113页
作者: Duhem, F. Muller, F. Lorenzini, P. Univ Nice Sophia Antipolis LEAT CNRS F-06560 Valbonne France
Partial reconfiguration suffers from low performance and thus its use is limited when the reconfiguration overhead is too high compared to the task execution time. To overcome this issue, the authors present a fast in... 详细信息
来源: 评论
Security evaluation of application-specific integrated circuits and field programmable gate arrays against setup time violation attacks
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IET INFORMATION SECURITY 2011年 第4期5卷 181-190页
作者: Selmane, N. Bhasin, S. Guilley, S. Danger, J. -L. TELECOM ParisTech Inst TELECOM CNRS LTCI UMR 5141 Paris France Dept COMELEC F-75634 Paris 13 France
Fault attacks are real threats against hardware implementations of robust cryptographic algorithms such as advanced encryption standard (AES). The authors present an active non-invasive attack to inject faults during ... 详细信息
来源: 评论
Extendable multirate real-time simulation of active distribution networks based on field programmable gate arrays
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APPLIED ENERGY 2018年 228卷 2422-2436页
作者: Wang, Zhiying Wang, Chengshan Li, Peng Fu, Xiaopeng Wu, Jianzhong Tianjin Univ Key Lab Smart Grid Minist Educ Tianjin 300072 Peoples R China Cardiff Univ Inst Energy Sch Engn Cardiff CF24 3AA S Glam Wales
Real-time simulation of large-scale active distribution networks exhibiting a wide range of time-scales puts forward higher requirements for simulation accuracy and efficiency. This paper presents an extendable method... 详细信息
来源: 评论
Multiplicative finite impulse response filters: implementations and applications using field programmable gate arrays
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IET SIGNAL PROCESSING 2015年 第5期9卷 449-456页
作者: Vandenbussche, Jean-Jacques Lee, Peter Peuteman, Joan Katholieke Univ Leuven KU Leuven Kulab Dept ESAT Fac Engn Technol Louvain Belgium Univ Kent Sch Engn & Digital Arts Canterbury CT2 7NT Kent England
This paper describes how modern field programmable gate array (FPGA) technology can be used to build practical and efficient multiplicative finite impulse response (MFIR) filters with low-pass, high-pass, band-pass an... 详细信息
来源: 评论
Technology mapping algorithm for heterogeneous field programmable gate arrays
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IEE PROCEEDINGS-COMPUTERS AND DIGITAL TECHNIQUES 2002年 第6期149卷 249-255页
作者: Lai, YT Kao, CC Natl Cheng Kung Univ Dept Elect Engn Tainan 701 Taiwan
To maximise device utilisation, a heterogeneous field programmable gate array (FPGA) provides either an array of homogeneous lookup tables (LUTs) of different sizes or an array of physically heterogeneous LUTs. It is ... 详细信息
来源: 评论
Step forward to map fully parallel energy efficient cortical columns on field programmable gate arrays
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IET SCIENCE MEASUREMENT & TECHNOLOGY 2014年 第6期8卷 432-440页
作者: Ghani, Arfan See, Chan H. Ali, Syed M. Usman Univ Bolton Dept Elect & Elect Engn Bolton BL3 5AB England Newcastle Univ Dept Elect & Elect Engn Newcastle Upon Tyne NE1 7RU Tyne & Wear England NED Univ Engn & Technol Dept Elect Engn Karachi 75270 Pakistan
This study presents energy and area-efficient hardware architectures to map fully parallel cortical columns on reconfigurable platform - field programmable gate arrays (FPGAs). An area-efficient architecture is propos... 详细信息
来源: 评论
A Hardware-Friendly Hyperspectral Lossy Compressor for Next-Generation Space-Grade field programmable gate arrays
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IEEE JOURNAL OF SELECTED TOPICS IN APPLIED EARTH OBSERVATIONS AND REMOTE SENSING 2019年 第12期12卷 4813-4828页
作者: Guerra, Raul Barrios, Yubal Diaz, Maria Baez, Abelardo Lopez, Sebastian Sarmiento, Roberto Univ Las Palmas Gran Canaria Inst Appl Microelect Las Palmas Gran Canaria 35017 Spain
The increment in the data rate of the new-generation hyperspectral sensors is making more critical the necessity of lossy compression solutions able to achieve higher compression ratios (CRs). In this paper, a transfo... 详细信息
来源: 评论
HARDWARE IMPLEMENTATION OF AN ARTIFICIAL NEURAL-NETWORK USING field-programmable gate arrays (FPGAS)
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IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS 1994年 第6期41卷 665-667页
作者: BOTROS, NM ABDULAZIZ, M Department of Electrical Engineering Southem Illinois University Carbondale IL USA
In this paper we present a hardware implementation of a fully digital multi-layer perceptron artificial neural network using Xilinx field programmable gate arrays (FPGAs). Each node is implemented with two XC3042 FPGA... 详细信息
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