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检索条件"主题词=Field Programmable Gate Arrays"

共 41416 条记录，以下是4911-4920 订阅

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Intelligent Reconfigurable Instruction Set Processor (IRISP) design

Intelligent Reconfigurable Instruction Set Processor (IRISP)...

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11th IEEE International Multitopic Conference

作者： Aziz-Ur-Rehaman Syed, Aqeel A. Iqbal, M. Aqeel Quaid I Azam Univ Dept Elect Islamabad Pakistan

ISBN: (纸本)9781424415526

Reconfigurable computing is being used to achieve high speed of Application Specific Integrated Circuits (ASICs), on the one hand, and the flexibility of the General Purpose Processors (GPPs), oil the other. However, due to the requirement of multiple reconfigurations to complete a computation, the recontiguration overhead might degrade the performance of the system. In order to avoid excessive reconfiguration, this paper presents all Intelligent Reconfigurable Instruction Set Processor (IRISP). The proposed processor is based oil an Intelligent Computational Analyzer Unit (ICAU), which intelligently analyzes and compares the newly required configuration with that of the existing configuration of the processor and makes it possible to reuse maximum of the existing resources, while reconfiguring only the required resources. It has been shown that the intelligent reutilization of the existing resources significantly improves the performance of the processor.

关键词： embedded systems reconfigurable computing reconfigurable instruction set processor field programmable gate arrays

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Control Flow for Robust One-Shot Robot Programming using Entity-based Resources 18

Control Flow for Robust One-Shot Robot Programming using Ent...

引用

18th International Conference on Advanced Robotics (ICAR)

作者： Orendt, Eric M. Henrich, Dominik Univ Bayreuth Chair Appl Comp Sci 3 Robot & Embedded Syst D-95445 Bayreuth Germany

ISBN: (纸本)9781538631577

Robotic systems are used in a wide range of applications. With an intuitive programming system from previous work we are able to transfer the advantages of robotic systems into more unstructured environments like private households or small and medium sized enterprises. An important challenge in this field is to enable non-experts to use all the capabilities of a robot. This includes two aspects: Robots must be intuitive to program and robust to execute. Our recently presented One-Shot programming framework concerns both aspects. The main contribution of this work is to extend the existing framework and to raise the usability of our approach. With this motivation we identify generalization chances in our task representation model and introduce an extension of our programming paradigm by integrating control flow to increase its capabilities. The proposed system concept enables users to guide a robot kinesthetically through a task without prior knowledge. By observing resources in the workspace, the demonstrated task is encoded as a finite state machine (FSM). This FSM allows the reproduction of a task by the robot itself and also offers two ways to control the flow of a robot program: Loops and Branches. With these statements a non-expert user gains the opportunity to program even more complex task solutions.

关键词： Estimation field programmable gate arrays OFDM Modulation Filtration Clocks Signal processing algorithms

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VIP: A Versatile Inference Processor 25

VIP: A Versatile Inference Processor

引用

25th IEEE International Symposium on High Performance Computer Architecture (HPCA)

作者： Hurkat, Skand Martinez, Jose F. Microsoft Redmond WA 98052 USA Cornell Univ Ithaca NY USA

ISBN: (纸本)9781728114446

We present Versatile Inference Processor (VIP), a highly programmable architecture for machine learning inference. VIP consists of 128 lightweight processing engines employing a vector processing paradigm, with a simple ISA and carefully chosen microarchitecture features. It is coupled with a modern, lightly customized, 3D-stacked memory system. Through detailed execution-driven simulations backed by RTL synthesis, we show that we can achieve online, real-time vision throughput (24 fps), at low power consumption, for both full-HD depth-from-stereo using belief propagation, and VGG-16 and VGG-19 deep neural networks (batch size of 1). Our RTL synthesis of a VIP processing engine in TSMC 28nm technology, using a commercial standard-cell library supplied by ARM, results in 18mm(2) of silicon area and 3.5W to 4.8W of power consumption for all 128 VIP processing engines combined.

关键词： Engines Optical imaging field programmable gate arrays Convolution Task analysis Computer architecture Microarchitecture

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Optimal kinematic finite-time control of mobile manipulators 11

Optimal kinematic finite-time control of mobile manipulators

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11th International Workshop on Robot Motion and Control (RoMoCo)

作者： Galicki, Miroslaw Univ Zielona Gora Fac Mech Engn PL-65516 Zielona Gora Poland

ISBN: (纸本)9781538639269

This paper addresses the optimal kinematic control problem of the mobile manipulators. A computationally simple class of the Jacobian transpose control algorithms is proposed for the end-effector trajectory tracking. These controllers use a new non-singular Terminal Sliding Mode (TSM) manifold, as being a non-linear integral mapping of the second order with respect to the task space tracking error. Based on the Lyapunov stability theory, Jacobian transpose control schemes proposed are shown to be finite-time stable provided that some reasonable assumptions are fulfilled during the mobile manipulator movement. The performance of the proposed control strategies is illustrated through computer simulations for a planar mobile manipulator which accomplishes trajectory tracking by the end-effector in a two-dimensional task space and simultaneously minimises the Euclidean instantaneous distance between initial configuration and the current one.

关键词： Estimation field programmable gate arrays OFDM Modulation Filtration Clocks Signal processing algorithms

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Reloc - An Open-Source Vivado Workflow for Generating Relocatable End-User Configuration Tiles 26

Reloc - An Open-Source Vivado Workflow for Generating Reloca...

引用

26th IEEE Annual International Symposium on field-programmable Custom Computing Machines (FCCM)

作者： Gottschall, Bjoern Preusser, Thomas B. Kumar, Akash Tech Univ Dresden Dresden Germany

ISBN: (纸本)9781538655221

As programmable logic is conquering data centers, FPGA resources become a ubiquitously available commodity available through the cloud. In these ecosystems, their employment must advance to fit the role of a dynamically managed, shared resource within multi-user environments. programmable hardware vendors provide engineering workflows that only start to acknowledge the requirements of this thriving application context, which makes resource regularization, design migratability and isolated execution imperatives. Quite a few academic efforts have aimed at the key technique of design relocation on top of the vendor-provided workflows. Regularly, critical shortcomings remain and, in all cases, the engineering procedure is ridiculously complex. This paper identifies the significant gaps left by previous approaches and describes a thoroughly automated workflow for building a system infrastructure on FPGA that makes it a resource that is manageable by the OS. It highlights an end-to-end workflow to enable (a) the out-of-context synthesis of end-user designs against a thin module interface defined by appropriate synthesis constraints, which are (b) universally employable to all the user slots provisioned on an appropriately partitioned device without re-synthesis and (c) will operate there appropriately isolated merely communicating to the user host application through privately allocated communication channels.

关键词： field programmable gate arrays Data centers Hardware Buildings Web services Tools Routing"

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Designing alternative FPGA implementations using spatial data from hardware resources

引用

16th International Workshop on Power and Timing Modeling, Optimization and Simulation

作者： Siozios, Kostas Soudris, Dimitrios Thanailakis, Antonios Democritus Univ Thrace Dept Elect & Comp Engn VLSI Design & Testing Ctr GR-67100 Xanthi Greece

ISBN: (纸本)3540390944

A novel approach for efficient implementation of applications onto reconfigurable architectures is introduced. The proposed methodology can applied both for designing an interconnection architecture as well as for making a thermal-aware placement. In the first case, the dominant parameters that affect performance and energy (segment length and switch boxes) are examined. This approach is based on finding the optimal wire length and then making exploration in order to determine the appropriate combination of multiple switch boxes. In the second case, a new technique for thermal-aware placement is introduced. The main goal of this technique is to spread out the power consumption across the whole device, as well as to minimize it. Both of the methodologies are fully-supported by the software tool called EX-VPR. For the purposes of this paper, the EnergyxDelay Product (EDP) is chosen as selection criterion for the optimal interconnection network, while the total power consumption is the criterion for the thermal-aware routing. For the designing of the interconnection network we achieved EDP reduction by 45%, performance increase by 40% and reduction in total energy consumption by 8%, at the expense of increase of channel width by 20%. On the other hand, for the thermal-aware approach, we spread the heat and power across the whole FPGA, while we achieve about 20% reduction in total power consumption. In this case, the penalty in channel width is about 10%.

关键词： field programmable gate arrays

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Cooperative Adaptive Flow Estimation For Spherical Formation Tracking Control With Directed Communication 13

Cooperative Adaptive Flow Estimation For Spherical Formation...

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13th IEEE International Conference on Control & Automation (ICCA)

作者： Chen, Yang-Yang Ai, Xiang Tian, Yu-Ping Zhang, Ya Southeast Univ Sch Automat Nanjing 210096 Jiangsu Peoples R China Southeast Univ Key Lab Measurement & Control Complex Syst Engn Minist Educ Nanjing 210096 Jiangsu Peoples R China

ISBN: (纸本)9781538626795

This article considers the robust cooperative control problem of multiple double-integrator agents' formation moving around a set of given curves on spheres, where each agent suffers an unknown spatiotemporal flowfield and the communication topology among agents is directed. The flow specification is composed of a general direction matrix and a responding unknown flow speed vector, which includes almost all forms of flowfield in the literature. A new second-order adaptive update law is given for estimating the flow speed vector by using the tool of adaptive backstepping, which is incorporated into our previous geometric extension design for the purpose of designing the robust spherical formation tracking control law. A potential function is used to avoid each agent's movement to the undefined angle on the points between the poles of sphere. The asymptotic stability of the system is proved when the directed communication topology is strongly connected. The effectiveness of the analytical results is verified by a numerical simulation.

关键词： Estimation field programmable gate arrays OFDM Modulation Filtration Clocks Signal processing algorithms

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Generation of a reference network for Ireland and its contribution to the design of an optical network architecture 19

Generation of a reference network for Ireland and its contri...

引用

19th International Conference on Transparent Optical Networks (ICTON)

作者： Arbelaez, Alejandro Mehta, Deepak O'Sullivan, Barry Quesada, Luis Sasmaz, Ata Univ Coll Cork Insight Ctr Data Analyt Cork Ireland

ISBN: (纸本)9781538608593

Realistic reference networks are critical for all techno-economic evaluations in the design of an optical network architecture. As this information was not publicly available for Ireland, we generated such a reference network. In this paper we elaborate on the challenges faced during the generation and present some statistics. We also show how this is used in the design of an optical architecture for the same country. The level of detail of the reference network needed varies according to the layer of the architecture that is being designed. In this paper we show how the original reference network is reduced while maintaining important properties for the design of the architecture. We also elicit geotypes from the structure of the reference network and discus the importance of this computation in the design of the optical distribution network.

关键词： Estimation field programmable gate arrays OFDM Modulation Filtration Clocks Signal processing algorithms

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A Risk-Based Sensor Management using Random Finite Sets and POMDP 20

A Risk-Based Sensor Management using Random Finite Sets and ...

引用

20th International Conference on Information Fusion (Fusion)

作者： Gomes-Borges, Marcos Eduardo Maltese, Dominique Vanheeghe, Philippe Duflos, Emmanuel Cent Lille CRIStAL UMR 9189 F-59650 Villeneuve Dascq France Safran Elect & Def F-91344 Massy France

ISBN: (纸本)9780996452700

In this paper, we consider the problem of scheduling an agile sensor to perform an optimal control action in the case of the multi-target tracking scenario. Our purpose is to present a random finite set (RFS) approach to the multi-target sensor management problem formulated in the Partially Observed Markov Decision Process (POMDP) framework. The reward function associated with each sensor control (action) is computed via the Expected Risk Reduction between the multitarget predicted and updated densities. The proposed algorithm is implemented via the Probability Hypothesis Density filter (PHD). Numerical studies demonstrate the performance of this particular approach to a radar beam-pointing problem where targets need to be prioritized.

关键词： Estimation field programmable gate arrays OFDM Modulation Filtration Clocks Signal processing algorithms

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Typability in Bounded Dimension 17

Typability in Bounded Dimension

引用

32nd Annual ACM/IEEE Symposium on Logic in Computer Science (LICS)

作者： Dudenhefner, Andrej Rehof, Jakob Tecn Univ Dortmund Fac Comp Sci Dortmund Germany

ISBN: (纸本)9781509030187

Recently (authors, POPL 2017), a notion of dimensionality for intersection types was introduced, and it was shown that the bounded-dimensional inhabitation problem is decidable under a non-idempotent interpretation of intersection and undecidable in the standard set-theoretic model. In this paper we study the typability problem for bounded-dimensional intersection types and prove that the problem is decidable in both models. We establish a number of bounding principles depending on dimension. In particular, it is shown that dimensional bound on derivations gives rise to a bounded width property on types, which is related to a generalized subformula property for typings of arbitrary terms. Using the bounded width property we can construct a nondeterministic transformation of the typability problem to unification, and we prove that typability in the settheoretic model is PSPACE-complete, whereas it is in NP in the multiset model.

关键词： Estimation field programmable gate arrays OFDM Modulation Filtration Clocks Signal processing algorithms

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