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A Flexible-Channel MDF Architecture for Pipelined Radix-2 FFT

IEEE ACCESS 2023年 11卷 38023-38033页

作者： Zhou, Xiao Chen, Xuerong He, Yi Mou, Xingang Wuhan Univ Technol Sch Mech & Elect Engn Wuhan 430070 Hubei Peoples R China Wuhan Univ Technol Intelligent Transportat Syst Res Ctr Wuhan 430070 Hubei Peoples R China

This paper proposes a flexible-channel multiple-path delay feedback (FC-MDF) pipelined fast Fourier transform architecture, which is based on Radix-2 FFT algorithm. The FC-MDF can be dynamically configured to accommodate two levels of FFT size. Different from the bypass structure that prevents the sequence data from passing through the preceding stages when the FFT size is reduced, the FC-MDF can be dynamically configured into single-channel mode when calculating larger size sequences, and into dual-channel mode when calculating smaller size sequences by taking advantage of the first stage 0and sharing of processing elements in subsequent stages. The proposed architecture increases the utilization of computing units, including butterfly and complex multiplier, from 50% to 100%, and provides twice the throughput in dual-channel mode, compared with the traditional Radix-2 single-path delay feedback (R2SDF) architecture. We implemented this structure on Xilinx FPGAs. The experimental results show that, compared with current SDF, the proposed FC-MDF significantly optimizes the proportion of resources when the FFT size is reduced.

关键词： Signal processing algorithms Discrete Fourier transforms Periodic structures Delays Computer architecture Hardware field programmable gate arrays Fast Fourier transform (FFT) pipelined architecture reconfigurable design multi-path delay feedback (MDF)

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TCLink: A Fully Integrated Open Core for Timing Compensation in FPGA-Based High-Speed Links

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IEEE TRANSACTIONS ON NUCLEAR SCIENCE 2023年第2期70卷 156-163页

作者： Mendes, Eduardo Baron, Sophie Hegeman, Jeroen Troska, Jan Loukas, Nikitas CERN Expt Phys Dept Geneva Switzerland Univ Notre Dame Dept Phys Notre Dame IN USA

The high luminosity expected in the second phase of the upgrades of the Large Hadron Collider (LHC phase-2 upgrades) will pose unprecedented challenges to its four experiments in terms of collisions density-also known as pile-up-per beam crossing. Disentangling the vertices of 200 simultaneous collisions every 25 ns requires high granularity in the detectors, as well as extremely precise and stable timing. While short-term timing stability is usually a concern addressed in timing distribution systems, long-term variations due to changing environmental conditions can accumulate through distribution chains and can dominate the overall timing stability of the systems they serve. Timing distribution systems in LHC experiments typically use high-speed links and clock recovery. This article presents a logic core that can be used to mitigate long-term temperature variations in high-speed links. The timing compensated link (TCLink) is an open-source firmware core fully integrated in Xilinx Ultrascale field programmable gate arrays (FPGAs). It demonstrates picosecond-level phase precision over timing distribution systems, improving the overall timing stability in physics experiments.

关键词： Timing Clocks field programmable gate arrays Large Hadron Collider Mathematical models Detectors Transceivers Fast timing field programmable gate arrays (FPGAs) high energy physics (HEP) instrumentation optical links timing circuits

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Medium-Earth-Orbit Spaceflight Radiation Effects in Triple Modular System on programmable Device

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IEEE TRANSACTIONS ON NUCLEAR SCIENCE 2023年第8期70卷 1783-1790页

作者： Bastos, Rodrigo Possamai Picas, Marti Gorchs Velazco, Raoul Univ Grenoble Alpes CNRS Grenoble INP TIMA F-38000 Grenoble France

This work presents experimental results of mediumEarth-orbit (MEO) spaceflight radiation effects in a commercial off-the-shelf (COTS) static random access memory (SRAM)-based field programmable gate array (FPGA) device implementing a case-study digital system design protected with the classical triple modular redundancy (TMR) technique. This UGA/TIMA's experiment is a part of the NASA/GSFC's space environment testbeds (SETs) payload launched in the AFRL's demonstration and science experiments (DSX) spacecraft in June 2019. Results report 69 single-event upset (SEU)-induced failures in the TMR-protected case-study system, moreover total ionizing dose (TID) effects for nearly two years of space mission seem not to contribute to an increment of SEU-induced failures.

关键词： Space vehicles field programmable gate arrays Digital systems Radiation effects Payloads Ions Protons Commercial off-the-shelf (COTS) devices field programmable gate array (FPGA) medium-Earth orbit (MEO) single-event upset (SEU) space applications space radiation effects triple modular redundancy (TMR)

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Optical multi-context scrubbing operation on a redundant system

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OPTICS EXPRESS 2023年第23期31卷 38529-38539页

作者： Ando, Kakeru Watanabe, Minoru Watanabe, Nobuya Okayama Univ Grad Sch Nat Sci & Technol 3 1 1 Tushima NakaKita Ku Okayama 7008530 Japan Okayama Univ Fac Environm Life Nat Sci & Technol 3 1 1 Tsushima NakaKita Ku Okayama 7008530 Japan

This paper presents a proposal of the world-first optical multi-context scrubbing operation on a redundant system that can maintain the state of a sequential circuit and the operation continuously without any interruption on a radiation-hardened optically reconfigurable gate array even after a permanent failure suddenly happens on the sequential circuit or a flip-flop by radiation. Up to now, a high-speed optical scrubbing operation has been demonstrated on a radiation-hardened optically reconfigurable gate array. In addition, a multi-context scrubbing operation based on the high-speed optical scrubbing operation has already been demonstrated. Although the multi-context scrubbing operation presents the benefit that it can treat both soft errors and permanent failures caused by radiation simultaneously, the conventional contributions have never presented how to maintain the state of a sequential circuit after a permanent failure occurs on flip-flops. Therefore, in the conventional multi-context scrubbing operation, all the operations must be restarted from the initial condition each time a permanent failure occurs on a programmable gate array. As a result, conventional multi-context scrubbing operations could not be applied for real-time systems. The proposed optical multi-context scrubbing method that can solve the issue has been experimentally evaluated on a radiation-hardened optically reconfigurable gate array.

关键词： CCD cameras Diode lasers field programmable gate arrays Holographic memory Optical testing Semiconductor lasers

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Broadband tunable basic units for nonvolatile field programmable photonic gate array

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JOURNAL OF THE OPTICAL SOCIETY OF AMERICA B-OPTICAL PHYSICS 2023年第5期40卷 1054-1062页

作者： Nampoothiri, Govindan Nishi Sadasivan, Viswas Amrita Vishwa Vidyapeetham Amritapuri Dept Elect & Commun Engn Vallikavu India

field programmable photonic gate arrays (FPPGAs) use 2 x 2 tunable basic units (TBUs) interconnected as a mesh to achieve various functionalities on the same chip. It is desirable to have TBUs that can retain the state with-out power and function over a broad bandwidth. Different TBU structures and materials are compared in this work to design a suitable nonvolatile broadband device. An optical phase change material (O-PCM) based Mach- Zehnder interferometer provided the required nonvolatile TBU with a high bandwidth, low insertion loss, and low crosstalk. Among the various O-PCM materials, Sb2S3 provided the lowest insertion loss of < 1 dB and a low crosstalk of < - 25 dB. The proposed TBU can enable a low-power FPPGA with a smaller footprint and broader bandwidth compared to their volatile thermo-optic or electro-optic counterparts. (c) 2023 Optica Publishing Group

关键词： Absorption coefficient Effective refractive index field programmable gate arrays Refractive index Ring resonators Tunable filters

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Energy-Resolved SEU Cross Section From 10-meV to 800-MeV Neutrons by Time-of-Flight Measurement

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IEEE TRANSACTIONS ON NUCLEAR SCIENCE 2023年第3期70卷 216-221页

作者： Iwashita, Hidenori Kiuchi, Ryu Hiroshima, Yoshiharu Okugawa, Yuichiro Sebe, Tomoki Takeda, Miki Sato, Hirotaka Kamiyama, Takashi Furusaka, Michihiro Kiyanagi, Yoshiaki Nippon Telegraph & Tel Corp Tokyo 1808585 Japan Hokkaido Univ Fac Engn Sapporo 0608628 Japan Natl Inst Adv Ind Sci & Technol Fac Engn Tsukuba 3058568 Japan High Energy Accelerator Res Org Tsukuba 3050801 Japan

We performed continuous observations of single event upset (SEU) cross sections for the energy range of 10 meV-1 MeV at the Japan Proton Accelerator Research Complex (J-PARC). As a result, we were able to clearly obse... 详细信息

关键词： Neutrons Energy measurement Measurement uncertainty Single event upsets Semiconductor device measurement field programmable gate arrays Time measurement field-programmable gate arrays (FPGAs) neutron energy-dependent radiation effects particle accelerator single-event upset (SEU) cross section time-of-flight (TOF) technique

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Energy Saving Multi-Relay Technique for Wireless Sensor Networks Based on Hw/Sw MPSoC System

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IEEE ACCESS 2023年 11卷 27919-27927页

作者： Loukil, Kais Univ Sfax Natl Engn Sch Sfax ENIS Comp & Embedded Syst Lab CES Lab Sfax 3029 Tunisia

Currently, we are witnessing a wide range of Wireless Sensor Networks (WSNs) in various fields of application. In most cases, these networks contain numerous battery-powered sensor nodes. Therefore, the lifetime of WSNs is intrinsically dependent. For this purpose, different studies have been conducted to reduce the power consumption. We propose a new technique for reducing the power consumption of clustered WSNs. We considered clusters in which sensors transmitted data to a Cluster Head (CH) by cooperative communication based on the Bit Error Probability (BEP) criterion for the multi-relay technique. Therefore, the proposed technique uses a multi-relay to reduce the transmission power to communicate between the source and destination which respects the predefined reliability level. The proof of the described technique was performed using a multiprocessor architecture. Second, we used an efficient software/hardware (Sw/Hw) architecture that utilized accelerator modules. The experimental results demonstrate significant gains in terms of energy consumption and workload compared to the SW implementation.

关键词： Wireless sensor networks Relays Power demand field programmable gate arrays Mathematical models Energy consumption Cooperative communication Energy saving multi-relay WSN sensor node Hw/Sw MPSoC

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Faber: A Hardware/SoftWare Toolchain for Image Registration

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IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS 2023年第1期34卷 291-303页

作者： D'Arnese, Eleonora Conficconi, Davide Sozzo, Emanuele Del Fusco, Luigi Sciuto, Donatella Santambrogio, Marco Domenico Politecn Milan Dept Elect Informat & Bioengn I-20133 Milan IT Italy

Image registration is a well-defined computation paradigm widely applied to align one or more images to a target image. This paradigm, which builds upon three main components, is particularly compute-intensive and represents many image processing pipelines' bottlenecks. State-of-the-art solutions leverage hardware acceleration to speed up image registration, but they are usually limited to implementing a single component. We present Faber, an open-source HW/SW CAD toolchain tailored to image registration. The Faber toolchain comprises HW/SW highly-tunable registration components, supports users with different expertise in building custom pipelines, and automates the design process. In this direction, Faber provides both default settings for entry-level users and latency and resource models to guide HW experts in customizing the different components. Finally, Faber achieves from 1.5x to 54x in speedup and from 2x to 177x in energy efficiency against state-of-the-art tools on a Xeon Gold.

关键词： Measurement Pipelines Image registration field programmable gate arrays Optimization Graphics processing units Registers FPGAs HW SW design automation image registration

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Implementation and Comparison of Three Image Reconstruction Algorithms in FPGA Toward Palm-Size Photoacoustic Tomography

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IEEE SENSORS JOURNAL 2023年第8期23卷 8605-8612页

作者： Gao, Zijian Shen, Yuting Jiang, Daohuai Zheng, Yuwei Liu, Fengyu Gao, Feng Gao, Fei ShanghaiTech Univ Hybrid Imaging Syst Lab Sch Informat Sci & Technol Shanghai 201210 Peoples R China Shanghai Engn Res Ctr Energy Efficient & Custom AI Shanghai 201210 Peoples R China Shanghai Clin Res & Trial Ctr Shanghai 201210 Peoples R China

Photoacoustic (PA) imaging has been widely applied in both preclinical and clinical applications. With a significantly increasing number of data acquisition channels, fast high-quality image reconstruction with low cost for PA imaging is an open challenge. In this article, we propose a palm-size PA tomography (PAT) system, named palmPAT, to achieve miniaturized low-cost PA imaging modality with high performance. To prove the feasibility, field-programmable gate array (FPGA) implementation of PA image reconstruction is performed to achieve high-quality imaging performance with miniaturized size and cost. This FPGA implementation can be easily adapted to widely used algorithms, such as delay-and-sum (DAS) and its variants [e.g., delay-multiply-and-sum (DMAS), DAS-coherence factor (CF)]. We have performed in vivo human finger experiments to demonstrate the feasibility and potential. To the best of our knowledge, this is the first study concentrated on the implementation and comparison of three frequently used PA image reconstruction algorithms based on FPGA platform.

关键词： field programmable gate arrays Image reconstruction Sensors Imaging Ultrasonic imaging Transducers Costs Delay-and-sum (DAS) field-programmable gate array (FPGA) acceleration photoacoustic (PA) tomography

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OFIDS : Online Learning-Enabled and Fingerprint-Based Intrusion Detection System in Controller Area Networks

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IEEE TRANSACTIONS ON DEPENDABLE AND SECURE COMPUTING 2023年第6期20卷 4607-4620页

作者： Wei, Yehua Cheng, Can Xie, Guoqi Hunan Normal Univ Sch Informat Sci & Engn Changsha 410082 Hunan Peoples R China Hunan Univ Coll Comp Sci & Elect Engn Key Lab Embedded & Network Comp Hunan Prov Changsha 410082 Hunan Peoples R China

As a widely used industrial field bus, the controller area network (CAN) lacks security mechanisms (e.g., encryption and authentication) and is vulnerable to security attacks (e.g., masquerade). A fingerprint-based intrusion detection system (IDS) in CAN networks can detect masquerade attacks by scanning the unique clock signals of CAN devices. However, most state-of-the-art fingerprint-based IDSs commonly use an analog-to-digital converter module with a low frequency of 60 MHz to sample CAN signals, lowering the detection accuracy of fingerprint-based IDSs. In addition, almost all fingerprint-based IDSs are trained offline and then detected online, ignoring that system clock signals of hardware change over time, resulting in degraded detection performance. This paper proposes an online learning-enabled and fingerprint-based IDS (OFIDS) in CAN networks to increase the sampling frequency, shorten the detection response time, and increase the detection accuracy. OFIDS uses a high-speed comparator (i.e., TLV3501) and FPGA (i.e., Xilinx ZYNQ-7010) to sample the CAN_High signal, achieving a low sampling delay time of 4.5 ns and a high sampling frequency of 1 GHz. The self-adaptability of the backpropagation neural network is taken advantage of and used to train the OFIDS model with a detection accuracy of 99.9992%. OFIDS is deployed to a CAN network prototype with five CAN devices (i.e., two Arduino UNO boards and three STM32 microcontrollers) and a real vehicle. Experimental results show that OFIDS can achieve at least 99.99% detection accuracy within 0.18 mu s in a CAN network prototype and can achieve 98% detection accuracy in a real vehicle.

关键词： Fingerprint recognition Intrusion detection Clocks field programmable gate arrays Delays Training Security Controller area network (CAN) fingerprint intrusion detection system (IDS) online learning

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