To realize filtering of high-speed input data, and aiming at the design method of systolic FIR digital filter, this paper proposes a design method of high-speed FIR filter based on FPGA. The states conversion between ...
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ISBN:
(纸本)9783037853191
To realize filtering of high-speed input data, and aiming at the design method of systolic FIR digital filter, this paper proposes a design method of high-speed FIR filter based on FPGA. The states conversion between coefficients configuring mode and filtering mode is finished by FSM (Finite State Machine), which ensures the system to work orderly. The experimental results demonstrated, it can reduce the input dimension and eliminate linear and nonlinear interference effectively. In addition, it is very suitable for hardware implementation due to its simple structure.
To solve the crossing-linkable polyethylene (XLPE) insulation compound purity evaluation problem, a high speed scanning measurement system was designed according to FPGA. With the updated information technology and ad...
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ISBN:
(纸本)9783037853191
To solve the crossing-linkable polyethylene (XLPE) insulation compound purity evaluation problem, a high speed scanning measurement system was designed according to FPGA. With the updated information technology and advanced electronic devices, it is possible to develop a new inspecting technology for sorting, checking and evaluating material quality, by which defects microscopic images can be real-time recorded, processed and displayed. The result shows that this system can measure the size of impurity particles of XLPE cable materials correctly, it also can find out the accurate location and numbers of impurity particles. The resolving power of this method can reach 20 m and the error is less than 10%. The possibility that the impurity particles can be checked out is up to 100%.
This paper presents a novel design of a Configurable Logic Block (CLB) for a field programmable gate array (FPGA) based on a computing scheme in nanoscale technology called the Quantum-dot Cellular Automata (QCA). In ...
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ISBN:
(纸本)9781467325271
This paper presents a novel design of a Configurable Logic Block (CLB) for a field programmable gate array (FPGA) based on a computing scheme in nanoscale technology called the Quantum-dot Cellular Automata (QCA). In QCA technology, the cells made of quantum dots transmit information from one cell to the other based on Coulombic repulsion between the electrons. The main goal behind the design of the CLB is to ultimately design a miniscule nano FPGA without transistors for the 'beyond CMOS era' of the 2020s. Unlike previous research in this area, the attempt here is to take advantage of the unique QCA features in building the architecture. It is found that the proposed CLB has less latency and occupies less number of cells as compared to earlier designs. Different components of the CLB including a (4x16) decoder, a D-latch, a multiplexer and an RS-flip flop are designed, and simulated using the QCADesigner tool for functional correctness.
This paper introduces the first fully digital implementation of 1-D, 2-D and 3-D multiscroll chaos using the sawtooth nonlinearity in a 3rd order ODE with the Euler approximation. Systems indicate chaotic behaviour th...
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ISBN:
(纸本)9781467325271
This paper introduces the first fully digital implementation of 1-D, 2-D and 3-D multiscroll chaos using the sawtooth nonlinearity in a 3rd order ODE with the Euler approximation. Systems indicate chaotic behaviour through phase space boundedness and positive Lyapunov exponent. Low-significance bits form a PRNG and pass all tests in the NIST SP. 800-22 suite without post-processing. Real-time control of the number of scrolls allows distinct output streams with 2-D and 3-D multiscroll chaos enabling greater controllability. The proposed PRNGs are experimentally verified on a Xilinx Virtex 4 FPGA with logic utilization less than 1.25%, throughput up to 5.25 Gbits/s and up to 512 distinct output streams with low cross-correlation.
Any battery powered electric vehicle is a safety critical system due to very high probability of untimed power failure. In this work a model predictive controller has been implemented in field programmable gate array ...
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ISBN:
(纸本)9781467351171;9781467351188
Any battery powered electric vehicle is a safety critical system due to very high probability of untimed power failure. In this work a model predictive controller has been implemented in field programmable gate array (FPGA) for safe state generation by enhancing the runtime of electric car based on predicted battery state of charge. Initially an area and time efficient Coulomb counting technique has been implemented in FPGA. Subsequently a proactive load controller has been developed using FPGA from predicted State of Charge (SOC). The controller proactively optimizes the constrained battery energy by varying the power delivered to the noncritical loads and supports critical loads as per demand. The paper validates the proposed mechanism by experimental results.
作者：
Umamaheswari, B.Kamala, J.Anna Univ
Coll Engn Guindy Elect & Elect Engn Dept Madras 25 Tamil Nadu India Anna Univ
Coll Engn Guindy Elect & Commun Engn Dept Madras 25 Tamil Nadu India
This paper presents an effective use of User Transducer Electronic Data Sheet (TEDS) of IEEE 1451.0-2007 standard in obtaining an integrated architecture for sensing / actuation and control of DC/DC converter module. ...
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ISBN:
(纸本)9789881925244
This paper presents an effective use of User Transducer Electronic Data Sheet (TEDS) of IEEE 1451.0-2007 standard in obtaining an integrated architecture for sensing / actuation and control of DC/DC converter module. Modularity is the major advantage of the proposed architecture, which allows application of the proposed concept to any system with new sensors / actuators. Implementation of the proposed integrated Transducer Interface Module (TIM) architecture is achieved in field programmable gate array (FPGA).
The application of FPGAs (field programmable gate array) became an important issue in designing electronic systems. Also, the flexibility and performance offered by reconfigurable computing shorts the development time...
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ISBN:
(纸本)9783902823144
The application of FPGAs (field programmable gate array) became an important issue in designing electronic systems. Also, the flexibility and performance offered by reconfigurable computing shorts the development time required for implementing digital signal processing solutions using FPGAs. In this paper, we present original hardware designs of the BPSK and QPSK systems, using Matlab/Simulink environment, System Generator and Xilinx ISE, in order to verify the functionality of the systems in hardware which speeds up the simulations. The capabilities of the Spartan 3E board are also compared with previous reported results.
To solve the problems of the unknown of ordinary FPGA configuration bitstreams and long time for download configuration bitstreams into ordinary FPGA in evolvable hardware, multilayer feedforward neural network was co...
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ISBN:
(纸本)9780769547923
To solve the problems of the unknown of ordinary FPGA configuration bitstreams and long time for download configuration bitstreams into ordinary FPGA in evolvable hardware, multilayer feedforward neural network was combined with virtual reconfigurable circuit to build MFNNVRC in an ordinary FPGA. This MFNNVRC structure was used to implement the control circuit of three phase brushless DC motor. In order to validate the effectiveness of this circuit design, a self-recovery experiment was carried out in the FPGA with some given partial faults. The successful result of experiment argues that the proposed circuit is a befitting evolutionary reconfigurable platform utilizing ordinary FPGAs for combinational logic circuits.
Providing high reliability for FPGAs is a demanding task, as such devices may be subject to faults in the configuration bitstream, altering the specified function. Traditional modular redundancy remains the most used ...
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ISBN:
(纸本)9781467306973
Providing high reliability for FPGAs is a demanding task, as such devices may be subject to faults in the configuration bitstream, altering the specified function. Traditional modular redundancy remains the most used technique, due to its high fault coverage and low performance overhead. When high availability and strict real-time deadlines must be considered, however, a short mean time to repair also becomes crucial. The use of fine-grained modules can accelerate error detection, fault diagnosis and bitstream correction, but with increased area costs. In this work, we propose the use of hardwired resources found in state-of-the-art FPGAs to provide fast and area efficient fine-grained error detection. Experimental results show an average speed up in error detection of 7.68 times with only 3.2% more area overhead, when compared to coarse-grained modular redundancy.
Analog to Digital Converters (ADC) are important components of the Input /Output system in a Large-Scale Integrated Circuit, And the applied value is very high. Such as wireless communications, medical imaging, portab...
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ISBN:
(纸本)9783642319679
Analog to Digital Converters (ADC) are important components of the Input /Output system in a Large-Scale Integrated Circuit, And the applied value is very high. Such as wireless communications, medical imaging, portable test equipment, video equipment, radar and guide, portable instrumentation, etc. in this paper, by researching and explorating the multiplexing design methodology, the paper achieves three quasi-digital IF soft cores of 8-bit, 10bit and 16bit. The AD Converters are comprehensive certificated, and meet the requirements, they can be directly applied to the SoC and the front parts of ASIC.
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