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检索条件"主题词=Field Programmable Gate array"
1335 条 记 录,以下是1131-1140 订阅
排序:
A FPGA-Based Bit-Word PLC CPUs Development Platform
A FPGA-Based Bit-Word PLC CPUs Development Platform
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10th IFAC Workshop on programmable Devices and Embedded Systems (PDeS)
作者: Chmiel, Miroslaw Mocha, Jan Hrynkiewicz, Edward Silesian Tech Univ Inst Elect Gliwice Poland
The conception of the hardware-software platform is presented in the paper. Presented platform is designed in order to test different constructions of the central processing units dedicated to programmable logic contr... 详细信息
来源: 评论
Two-Dimensional Systolic-array Architecture for Pixel-Level Vision Tasks
Two-Dimensional Systolic-Array Architecture for Pixel-Level ...
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Conference on Real-Time Image and Video Processing 2010
作者: Vijverberg, Julien A. de With, Peter H. N. Eindhoven Univ Technol Eindhoven Netherlands
This paper presents ongoing work on the design of a two-dimensional (2D) systolic array for image processing. This component is designed to operate on a multi-processor system-on-chip. In contrast with other 2D systol... 详细信息
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An Impulse C Application in the LDPC Decoding Algorithm
An Impulse C Application in the LDPC Decoding Algorithm
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6th International Conference on Intelligent Computing
作者: Zhang, Pei Tao, Zhifu Wang, Yiming Zhou, Changxiong JiangSu Prov Support Software Engn R&D Ctr Modern Suzhou 215104 Jiangsu Peoples R China Suzhou Vocat Univ Suzhou 215104 Peoples R China Suzhou Univ Suzhou 215021 Peoples R China
In order to obtain the balance of the decoding rate and the hardware consumption, a new method to design LDPC decoder is proposed, which is a communicating sequential process model intended for streams-oriented and mi... 详细信息
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AUTOMATIC VHDL GENERATION SOFTWARE TOOL FOR PARAMETERIZED FPGA BASED FFT ARCHITECTURES
AUTOMATIC VHDL GENERATION SOFTWARE TOOL FOR PARAMETERIZED FP...
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IEEE National Aerospace and Electronics Conference
作者: Schmuland, Todd E. Longbrake, Matthew B. Buxa, Peter E. Jamali, Mohsin M. Univ Toledo Dept EECS Toledo OH 43606 USA Wright Patterson AFB AFRL RYDR Dayton OH USA
This paper describes the development of a software tool for simulating and generating fully parallel generic VHDL representations of Fast Fourier Transforms. Several fixed-point number optimizations are described with... 详细信息
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Design methodology and FPGA-based controllers for Power Electronics and drive applications
Design methodology and FPGA-based controllers for Power Elec...
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5th IEEE Conference on Industrial Electronics and Applications
作者: Monmasson, E. Idkhajine, L. Bahri, I. Naouar, M-W- Charaabi, L. UCP SATIE Rue dEragny F-95031 Cergy Pontoise France Ecole Natl Ingn Tunis LSE Tunis Tunisia
This paper presents a short state-of-the-art field programmable gate array (FPGA) technology. An efficient design methodology for designing FPGA-based controllers is also described. To illustrate the interest of this ... 详细信息
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Creating Next Generation HIL Simulators with FPGA Technology
Creating Next Generation HIL Simulators with FPGA Technology
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AUTOTESTCON 2010 Systems Readiness Technology Conference
作者: Washington, Chris Dolman, Jordan Natl Instruments Inc Real Time Testing Austin TX 78759 USA Natl Instruments Inc Modular Instruments Austin TX 78759 USA
As embedded control devices become more common in today's electro-mechanical systems, HIL Simulation is growing in its importance to the success of these systems. HIL testing provides a simulated environment for t... 详细信息
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Embedding an array Self-Recovery Algorithm into an FPGA Controller
Embedding an Array Self-Recovery Algorithm into an FPGA Cont...
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2010 IEEE International Symposium Antennas and Propagation/CNC-USNC/URSI Radio Science Meeting
作者: Malnar, Damir Joler, Miroslav Christodoulou, Christos G. Univ Rijeka Fac Engn Dept Comp Engn Rijeka 51000 Croatia Univ New Mexico Dpet Elect & Comp Engn Albuquerque NM 87131 USA
In this paper, we report on our work of embedding a self-recovery algorithm into a field programmable gate array (FPGA) board, as a means of radiation pattern recovery after failure of any antenna array element. In th... 详细信息
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Implementation of Lossy Haptic Data Compression Using Integer DCT to FPGA
Implementation of Lossy Haptic Data Compression Using Intege...
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36th Annual Conference of the IEEE Industrial-Electronics-Society (IECON)/4th IEEE International Conference on E-Learning in Industrial Electronics/IES Industry Forum
作者: Tanaka, Hiroyuki Ohnishi, Kouhei Nishi, Hiroaki Keio Univ Dept Syst Design Engn Tokyo Japan
In this paper, lossy compression based on Integer DCT (Discrete Cosine Transform) for haptic data is presented and implemented to an FPGA (field programmable gate array). The lossy data compression accomplishes to red... 详细信息
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High-Speed Parallel Matched Filter Designing and FPGA Implementation
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Wuhan University Journal of Natural Sciences 2010年 第4期15卷 335-339页
作者: ZHANG Qinglin, CHEN Shuzhen, LUO Yijun, WANG Shan School of Electronic Information, Wuhan University, Wuhan 430072, Hubei, China School of Electronic Information Wuhan University Wuhan Hubei China
Matched filter is one of the key technologies to achieve high-speed data transmission. In this paper,a parallel finite-impulse response (FIR) filter structure based on polyphase filter-ing is used to achieve high-spee... 详细信息
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Implementation of TinyOS on FPGA System
Implementation of TinyOS on FPGA System
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IEEE Region 10 Conference on TENCON 2010
作者: Dai-Hai Ton-That Anh-Vu Dinh-Duc Khoi Phan-Dinh Univ Technol Fac Comp Sci & Engn Ho Chi Minh City Vietnam
Wireless sensor networks are used in many fields. The needs to develop application based on wireless sensor networks are imperious. The node in wireless sensor networks nowaday is not only cheap but also reusable. To ... 详细信息
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