检索结果-内蒙古大学图书馆

Design of an FPGA-Based Controller for Fast Scanning Probe Microscopy

SENSORS 2024年第18期24卷 6108-6108页

作者： Gregorat, Leonardo Cautero, Marco Carrato, Sergio Giuressi, Dario Panighel, Mirco Cautero, Giuseppe Esch, Friedrich Univ Trieste DIA Dipartimento Ingn & Architettura I-34127 Trieste Italy Elettra Sincrotrone Trieste SCpA Sci PkStr Statale 14Km 163 5 I-34149 Basovizza Italy Univ Trieste Dipartimento Fis I-34127 Trieste Italy CNR IOM Ist Officina Mat Lab TASC Str Statale 14Km 163 5 I-34149 Basovizza Italy INFN Ist Nazl Fis Nucl Sez Trieste Via Valerio 2 I-34127 Trieste Italy Tech Univ Munich TUM Sch Nat Sci Chair Phys Chem Lichtenbergstr 4 D-85748 Garching Germany Tech Univ Munich TUM Sch Nat Sci Catalysis Res Ctr Dept Chem Lichtenbergstr 4 D-85748 Garching Germany Univ Luxembourg Dept Phys & Mat Sci Scanning Probe Microscopy Lab Luxembourg Luxembourg

Atomic-scale imaging using scanning probe microscopy is a pivotal method for investigating the morphology and physico-chemical properties of nanostructured surfaces. Time resolution represents a significant limitation of this technique, as typical image acquisition times are on the order of several seconds or even a few minutes, while dynamic processes-such as surface restructuring or particle sintering, to be observed upon external stimuli such as changes in gas atmosphere or electrochemical potential-often occur within timescales shorter than a second. In this article, we present a fully redesigned field programmable gate array (FPGA)-based instrument that can be integrated into most commercially available standard scanning probe microscopes. This instrument not only significantly accelerates the acquisition of atomic-scale images by orders of magnitude but also enables the tracking of moving features such as adatoms, vacancies, or clusters across the surface ("atom tracking") due to the parallel execution of sophisticated control and acquisition algorithms and the fast exchange of data with an external processor. Each of these measurement modes requires a complex series of operations within the FPGA that are explained in detail.

关键词： scanning probe microscopy field programmable gate array digital signal processing fast scanning tunneling microscopy atom tracking

来源：评论

学校读者我要写书评

暂无评论

FPGA Implementation of Efficient CFAR Algorithm for Radar Systems

引用

SENSORS 2023年第2期23卷 954-954页

作者： Sim, Yunseong Heo, Jinmoo Jung, Yongchul Lee, Seongjoo Jung, Yunho Korea Aerosp Univ Sch Elect & Informat Engn Goyang Si 10540 South Korea Korea Aerosp Univ Dept Smart Air Mobil Goyang Si 10540 South Korea Korea Elect Technol Inst KETI Seongnam 13509 South Korea Sejong Univ Dept Informat & Commun Engn Seoul 05006 South Korea Sejong Univ Dept Convergence Engn Intelligent Drone Seoul 05006 South Korea

The constant false-alarm rate (CFAR) algorithm is essential for detecting targets during radar signal processing. It has been improved to accurately detect targets, especially in nonhomogeneous environments, such as multitarget or clutter edge environments. For example, there are sort-based and variable index-based algorithms. However, these algorithms require large amounts of computation, making them difficult to apply in radar applications that require real-time target detection. We propose a new CFAR algorithm that determines the environment of a received signal through a new decision criterion and applies the optimal CFAR algorithms such as the modified variable index (MVI) and automatic censored cell averaging-based ordered data variability (ACCA-ODV). The Monte Carlo simulation results of the proposed CFAR algorithm showed a high detection probability of 93.8% in homogeneous and nonhomogeneous environments based on an SNR of 25 dB. In addition, this paper presents the hardware design, field-programmable gate array (FPGA)-based implementation, and verification results for the practical application of the proposed algorithm. We reduced the hardware complexity by time-sharing sum and square operations and by replacing division operations with multiplication operations when calculating decision parameters. We also developed a low-complexity and high-speed sorter architecture that performs sorting for the partial data in leading and lagging windows. As a result, the implementation used 8260 LUTs and 3823 registers and took 0.6 mu s to operate. Compared with the previously proposed FPGA implementation results, it is confirmed that the complexity and operation speed of the proposed CFAR processor are very suitable for real-time implementation.

关键词： radar signal processing constant false alarm rate target detection field programmable gate array automotive radar drone detection radar

来源：评论

学校读者我要写书评

暂无评论

Real-time fiber Bragg grating measurement system using temperature-controlled Fourier domain mode locking laser

引用

OPTICAL ENGINEERING 2017年第6期56卷 066112-066112页

作者： Yamaguchi, Tatsuya Shinoda, Yukitaka Nihon Univ Grad Sch Sci & Technol Elect Engn Chiyoda Ku Tokyo Japan Nihon Univ Coll Sci & Technol Elect Engn Chiyoda Ku Tokyo Japan

We constructed a temperature-controlled Fourier domain mode locking (TC-FDML) laser capable of high-speed wavelength sweeping and developed a real-time fiber Bragg grating (FBG) measurement system. The TC-FDML laser can perform high-speed wavelength sweeping at a sweep frequency of 50.7 kHz with a scan range of similar to 60 nm in the 1.55-mu m band. This system uses a data acquisition system mounting an analog/digital converter and field programmable gate array that enables real-time FBG measurement at a sampling frequency of 250 MHz. Using bidirectional wavelength sweeping by the TC-FDML laser, the system has a measurement time resolution of 9.9 mu s. We show that the developed system can measure high-speed vibrations of several kHz and perform simultaneous and continuous measurements of multiple FBGs for a period of one hour. (C) The Authors. Published by SPIE under a Creative Commons Attribution 3.0 Unported License.

关键词： fiber Bragg grating temperature-controlled Fourier domain mode locking laser real-time measurement vibration measurement wavelength-swept laser field programmable gate array

来源：评论

学校读者我要写书评

暂无评论

Heterogeneous coexistence of extremely many attractors in adaptive synapse neuron considering memristive EMI

引用

CHAOS SOLITONS & FRACTALS 2024年 178卷

作者： Zhang, Jianlin Bao, Han Yu, Xihong Chen, Bei Changzhou Univ Sch Microelect & Control Engn Changzhou 213159 Peoples R China

Heterogeneous coexistence of multiple attractors was exhibited by a two-dimensional (2-D) non-autonomous model of adaptive synapse neuron with external excitation. Considering that electromagnetic induction (EMI) is an unavoidable interference in the electrophysiological environment, and memristors are often used to simulate the EMI induced by neuron membrane potentials, can the memristive EMI current be used instead of the external excitation current in the 2-D non-autonomous adaptive synapse neuron model? To this end, this paper proposes a three-dimensional (3-D) autonomous model of memristor-based adaptive synapse neuron (MASN) considering EMI. The MASN model has extremely many equilibrium points with complicated stability evolutions, resulting in the heterogeneous coexistence of extremely many attractors. The heterogeneously coexisting behaviors of the MASN model are investigated through some numerical methods, and the globally coexisting bifurcation behaviors, initials-relied kinetic distributions, and initials-sensitive riddled basins of attraction are thereby demonstrated. Furthermore, based on field programmable gate array (FPGA) platform, the MASN model is digitally implemented and the correctness of the numerical results is verified by hardware experiments.

关键词： Memristor-based adaptive synapse neuron Electromagnetic induction Heterogeneous coexistence Equilibrium point field programmable gate array

来源：评论

学校读者我要写书评

暂无评论

Research on virtual simulation of basketball technology 3D animation based on FPGA and motion capture system

引用

MICROPROCESSORS AND MICROSYSTEMS 2021年 81卷 103679-103679页

作者： Dou, Zi Northwest Minzu Univ Phys Educ Inst Lanzhou 720030 Gansu Peoples R China

A stable structure and group information for measuring the driving dynamic binding character information processing, network control and operation when ready. Created with Unity, Tensol Stream and PyTorch. This method can be done bipedal and quadruped movement in the past occupied the complex and rational activity. The study will help researchers select the appropriate exercise programs and motion capture framework to test their gadgets. The rose to select and added to the open network arena, improve audit in their investigation. Framework has instructed sub conventional and highly accurate three-dimensional movement. Article screening to determine the motion capture framework research study of distributed source in one hundred academic studies used in the report of human activity. The proposed use of support to field programmable gate array (FPGA) virtual computing innovation replay basketball to move the ball from the foundation and other projects, such as the distinction between players and referees. The two-dimensional position of the ball results are calibrated to identify the real position of the ball. Reality from the position of the ball, shoot the scene from every angle camera, and further ground plane. True development continue to see the ball from the top. Tests showed that the proposed calculation obstacles can be handled quickly and less difficult ball, the ball slightly different size and shape.

关键词： 3D Basket Sports Human Motion Capture Systems Ball Movement field programmable gate array

来源：评论

学校读者我要写书评

暂无评论

An explainable embedded neural system for on-board ship detection from optical satellite imagery

引用

ENGINEERING APPLICATIONS OF ARTIFICIAL INTELLIGENCE 2024年第PartE期133卷

作者： Ieracitano, Cosimo Mammone, Nadia Spagnolo, Fanny Frustaci, Fabio Perri, Stefania Corsonello, Pasquale Morabito, Francesco C. Univ Mediterranea Reggio Calabria DICEAM Via Zehender Loc Feo Vito I-89122 Reggio Di Calabria Italy Univ Calabria DIMES Via P Bucci Arcavacata Rende I-87036 Arcavacata Di Rende Italy Univ Calabria DIMEG Via P BucciArcavacata Rende I-87036 Arcavacata Di Rende Italy

Automatic ship detection from spaceborne systems such as satellites or aircrafts, raises considerable attention in sea surface monitoring because of the several applications in military and civilian field. In this context, processing satellite images on-board would reduce the latency time especially for emergency situations. In this paper, an hardware-oriented (HO) ship detection system based on a customized Convolutional Neural Network (CNN), here referred to as HO-ShipNet, , is proposed and tested on a revised version of the "Ships in Satellite Imagery"(SSI) Kaggle dataset, reporting detection accuracy of up to 95%. Furthermore, the explainability of HO-ShipNet is investigated by means of explainable Artificial Intelligence (xAI) techniques (i.e., Local Interpretable Model-Agnostic Explanation (LIME) and Occlusion Sensitivuty Analysis (OSA)), in order to understand the reasoning behind the HO-ShipNet decisions by detecting the most important input features and consequently ensure the trustworthiness of the model itself. Finally, HO-ShipNet is also implemented on the heterogeneous Xilinx xc7z045ffg900-2 SoC field programmable gate array (FPGA) outperforming stateof-the-art FPGA-based accelerators dealing with high-resolution frames. The promising results encourage the potential deployment of the proposed system for on-board applications.

关键词： Ship detection Explainable artificial intelligence Optical satellite images field programmable gate array

来源：评论

学校读者我要写书评

暂无评论

Modeling and simulation of three-phase IGBT full-bridge inverter circuit based on FPGA

引用

COMPUTERS & ELECTRICAL ENGINEERING 2024年第PartA期118卷

作者： Zhang, Junchu Yan, Jianjun Zhang, Yongming East China Univ Sci & Technol Sch Mech & Power Engn Shanghai 200237 Peoples R China East China Univ Sci & Technol Shanghai Key Lab Intelligent Sensing & Detect Tech Shanghai 200237 Peoples R China Shanghai Inst Elect Engn Sch Elect Engn Shanghai 201306 Peoples R China

The field of motor drive makes extensive use of electronic power modeling and simulation of three-phase IGBT full-bridge inverter circuits. The accuracy and computational efficiency of these models have a direct impact on the dependability of the motor control system. The majority of earlier research focused solely on static processes of turning on and off in IGBTs, disregarding the transient proesses that occur when three-phase IGBT full-bridge inverter circuits are switched at high frequencies. This has an impact on the circuits' accuracy in real-time simulation. Therefore, this paper proposes and builds a field-programmable logic gate array (FPGA)-based steady-state and transient dual-phase three-phase IGBT full-bridge inverter circuit model for the static and transient characteristics of the insulated gate bipolar transistor (IGBT) element in the circuit. Depending on whether or not the switching states of the six IGBTs in the three-phase IGBT fullbridge inverter circuit are altered, the simulation process is split into steady state and transient phases. In the steady state phase with large step size, the circuit is d iscretized using the binary L/ C approach. In the transient phase, the transient process is divided into several small-step-long time domains. Real-time simulation waveforms are generated by interleaving and combining the multistage fitting method's solution of the circuit's transient waveforms at tiny step lengths with the steady state phase. Finally, in order to demonstrate the accuracy of the circuit model in this work, the simulation results of the two-stage three-phase IGBT full-bridge inverter circuit model based on FPGA are compared with those of the conventional ideal model for waveform comparison and data analysis.

关键词： field programmable gate array Three-phase inverter circuit Switch characteristics Real-time simulation

来源：评论

学校读者我要写书评

暂无评论

Radar-Jamming Decision-Making Based on Improved Q-Learning and FPGA Hardware Implementation

引用

REMOTE SENSING 2024年第7期16卷 1190页

作者： Zheng, Shujian Zhang, Chudi Hu, Jun Xu, Shiyou Sun Yat Sen Univ Sch Elect & Commun Engn Shenzhen 518107 Peoples R China

In contemporary warfare, radar countermeasures have become multifunctional and intelligent, rendering the conventional jamming method and platform unsuitable for the modern radar countermeasures battlefield due to their limited efficiency. Reinforcement learning has been proven to be a practical solution for cognitive jamming decision-making in the cognitive electronic warfare. In this paper, we proposed a radar-jamming decision-making algorithm based on an improved Q-Learning algorithm. This improved Q-Learning algorithm ameliorated the problem of overestimating the Q-value that exists in the Q-Learning algorithm by introducing a second Q-table. At the same time, we performed a comprehensive design and implementation based on the classical Q-Learning algorithm, deploying it to a field programmable gate array (FPGA) hardware. We decomposed the implementation of the reinforcement learning algorithm into individual steps and described each step using a hardware description language. Then, the reinforcement learning algorithm can be computed on FPGA by linking the logic modules with valid signals. Experiments show that the proposed Q-Learning algorithm obtains considerable improvement in performance over the classical Q-Learning algorithm. Additionally, they confirm that the FPGA hardware can achieve great efficiency improvement on the radar-jamming decision-making algorithm implementation.

关键词： radar-jamming decision-making reinforcement learning field programmable gate array

来源：评论

学校读者我要写书评

暂无评论

Survey of deployment locations and underlying hardware architectures for contemporary deep neural networks

引用

INTERNATIONAL JOURNAL OF DISTRIBUTED SENSOR NETWORKS 2019年第8期15卷

作者： Kotlar, Milos Bojic, Dragan Punt, Marija Milutinovic, Veljko Univ Belgrade Sch Elect Engn Bulevar Kralja Aleksandra 73 Belgrade 11000 Serbia Indiana Univ Dept Comp Sci Bloomington IN 47405 USA

This article overviews the emerging use of deep neural networks in data analytics and explores which type of underlying hardware and architectural approach is best used in various deployment locations when implementing deep neural networks. The locations which are discussed are in the cloud, fog, and dew computing (dew computing is performed by end devices). Covered architectural approaches include multicore processors (central processing unit), manycore processors (graphics processing unit), field programmable gate arrays, and application-specific integrated circuits. The proposed classification in this article divides the existing solutions into 12 different categories, organized in two dimensions. The proposed classification allows a comparison of existing architectures, which are predominantly cloud-based, and anticipated future architectures, which are expected to be hybrid cloud-fog-dew architectures for applications in Internet of Things and Wireless Sensor Networks. Researchers interested in studying trade-offs among data processing bandwidth, data processing latency, and processing power consumption would benefit from the classification made in this article.

关键词： Application-specific integrated circuit big data cloud computing central processing unit deep neural networks dew computing edge computing fog computing field programmable gate array graphics processing unit

来源：评论

学校读者我要写书评

暂无评论

DESIGN OF MICROPROGRAMMED CONTROLLERS TO BE IMPLEMENTED IN FPGAs

引用

INTERNATIONAL JOURNAL OF APPLIED MATHEMATICS AND COMPUTER SCIENCE 2011年第2期21卷 401-412页

作者： Wisniewski, Remigiusz Barkalov, Alexander Titarenko, Larisa Halang, Wolfgang A. Univ Zielona Gora Fac Elect Engn Comp Sci & Telecommun PL-65246 Zielona Gora Poland Univ Hagen Fac Math & Comp Sci D-58084 Hagen Germany

In the article we propose a new design method for microprogrammed controllers. The traditional structure is improved by modifying internal modules and connections. Such a solution allows reducing the total number of logic elements needed for implementation in programmable structures, especially field programmable gate arrays (FPGAs). Detailed results of experiments show that on the average the application of the proposed methods yields up to 30% savings as far as the destination device is considered.

关键词： control unit microprogrammed controller field programmable gate array

来源：评论

学校读者我要写书评

暂无评论

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案：

请选择收藏分类：

通借通还

建议与咨询 留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案： 新增检索档案 确定 取消

请选择收藏分类： 新增自定义分类 确定 取消

通借通还

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

请选择保存的检索档案：

请选择收藏分类：