The tip-tilt mirror (TTM) system was developed for the extreme ultraviolet (XUV) Cassegrain telescope aboard the Institute of Space and Astronautical Science sounding rocket. The spatial resolution of the telescope is...
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The tip-tilt mirror (TTM) system was developed for the extreme ultraviolet (XUV) Cassegrain telescope aboard the Institute of Space and Astronautical Science sounding rocket. The spatial resolution of the telescope is about 5 arcsec, whereas the rocket pointing is only controlled to be within +/-0.5 deg of the target (sun) without additional stability control. To stabilize the XUV image within about 5 arcsec on the focal plane, the TTM system controls the tilt of the secondary mirror with two-axis fixed-coil magnetic actuators. The TTM system has a wide tilt angle and can drive the large secondary mirror at high frequency. The two position-sensitive detectors, one placed in the telescope and the other in the TTM mechanical structure, are used for closed-loop control of the TTM. The closed-loop control system, which has command and telemetry, is executed by the flight software on the digital signal processor. The TTM has a launch-lock mechanism to protect against launch vibrations up to about 16G. The sounding rocket was launched from the Kagoshima Space Center on 31 January 1998. The TTM worked perfectly during the flight and achieved better than the expected 5-arcsec stability on the focal plane during CCD charge-coupled device exposures.
This paper presents a novel low-cost Acoustic Emission (AE) source-location system to locate corrosion sources in AISI304 austenitic stainless steel. The system is implemented using an FPGA-PC configuration. Three AE ...
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ISBN:
(纸本)0780385608
This paper presents a novel low-cost Acoustic Emission (AE) source-location system to locate corrosion sources in AISI304 austenitic stainless steel. The system is implemented using an FPGA-PC configuration. Three AE sensors with 150 kHz resonance frequency were used to detect the AE activities generated from the corrosion. Experiments were set up to show performance of the system in locating uniform and pitting corrosions in stable state using corrosive solutions and electrochemical environment. A commercial AE system was used to assure the AE activities with the location results. Experimental results showed the ability of the AE source location system to locate corrosion sources. In conclusion, the proposed AE source-location system is appropriate and practicable to locate corrosion with flexibility and affordability.
This paper describes power optimization techniques applied to a reconfigurable digital finite impulse response (FIR) filter used in a Universal Mobile Telephone Service (UMTS) mobile terminal. Various methods of optim...
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ISBN:
(纸本)0780385047
This paper describes power optimization techniques applied to a reconfigurable digital finite impulse response (FIR) filter used in a Universal Mobile Telephone Service (UMTS) mobile terminal. Various methods of optimization for implementation were combined to achieve low cost in terms of power consumption. Each optimization method is described in detail and is applied to the reconfigurable filter. The optimization methods have achieved a 78.8% reduction in complexity for the multipliers in the FIR structure. A comparison of synthesized RTL models of the original and the optimized architectures resulted in a 27% reduction in look-up tables when targeted for the Xilinx. Virtex 11 Pro field programmable gate array (FPGA). An automated method for transformation of coefficient multipliers into bit-shifts is also presented.
This article describes a real-time implementation on a FPGA of a two-colour pre-processing algorithm for a multi-spectral infrared (IR) missile approach warning system (MAWS). IR MAWSs have promised increased detectio...
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ISBN:
(纸本)0780388933
This article describes a real-time implementation on a FPGA of a two-colour pre-processing algorithm for a multi-spectral infrared (IR) missile approach warning system (MAWS). IR MAWSs have promised increased detection range over ultraviolet (UV) MAWSs. However they have been plagued by the related problems of high false alarm rate and high computational load Two colour MAWSs offer a method of reducing the false alarm rate and possibly reducing high level computational load. The FPGA (field programmable gate array) based system was demonstrated running in real-time on 128 by 128 resolution imagery at 130 frames per second with no latency. We conclude that FPGAs and reconfigurable computing technology offers a substantial advantage over traditional Von Neumann processors for low-level image processing algorithms.
Zoom magnification is an essential element of video-based low vision enhancement systems. However, since optical zoom systems are bulky and power intensive, digital zoom is an attractive alternative. This paper determ...
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ISBN:
(纸本)0819451959
Zoom magnification is an essential element of video-based low vision enhancement systems. However, since optical zoom systems are bulky and power intensive, digital zoom is an attractive alternative. This paper determines the visual acuity of 15 subjects when a letter chart is viewed through a video system with various levels of digital zoom. A strategy in which the 1:1 magnified image is obtained by combining optical magnification with digital minification gives the best result, provided background scene information is know from the other cameras. A real-time FPGA based system for simultaneous zoom and smoothing is also demonstrated for text reading and enhancement.
In this paper, we propose a fuzzy phase-locked loop (PLL) in which a fuzzy inference circuit is used instead of a loop filter consisting of resistors and capacitors in an analog PLL. This circuit can be integrated in ...
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ISBN:
(纸本)0780387481
In this paper, we propose a fuzzy phase-locked loop (PLL) in which a fuzzy inference circuit is used instead of a loop filter consisting of resistors and capacitors in an analog PLL. This circuit can be integrated in small chip size in the low frequency, and a performance similar to that of conventional PLLs is achieved.
A direct torque controller for permanent magnet synchronous motors (PMSMs) using a single-chip FPGA (field programmable gate array) with soft-CPU (Central Processing Unit) core is reported. This controller was constru...
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ISBN:
(纸本)7560518699
A direct torque controller for permanent magnet synchronous motors (PMSMs) using a single-chip FPGA (field programmable gate array) with soft-CPU (Central Processing Unit) core is reported. This controller was constructed by connecting a gate drive unit and an A/D converter board that acquires the information from current and voltage sensors, to Altera Nios development board. As an advantage example of the use of a soft-CPU core, the functions, which are motor starting/stop and data monitoring function through LAN, were implemented on the controller. It was confirmed that a 1.5 kW PMSM could be controlled by a remote computer connected with constructed controller through LAN.
The use of the discrete wavelet transform (DWT) for the JPEG2000 image compression standard has sparked interest in the design of fast, efficient hardware implementations of the perfect reconstruction filter bank used...
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The use of the discrete wavelet transform (DWT) for the JPEG2000 image compression standard has sparked interest in the design of fast, efficient hardware implementations of the perfect reconstruction filter bank used for computing the DWT. The accuracy and efficiency with which the filter coefficients are quantized in a multiplierless implementation impacts the image compression and hardware performance of the filter bank. A high precision representation ensures good compression performance, but at the cost of increased hardware resources and processing time. Conversely, lower precision in the filter coefficients results in smaller, faster hardware, but at the cost of poor compression performance. In addition to filter coefficient quantization, the filter bank structure also determines critical hardware properties such as throughput and power consumption.
This thesis first investigates filter coefficient quantization strategies and filter bank structures for the hardware implementation of the biorthogonal 9/7 wavelet filters in a traditional convolution-based filter bank. Two new filter bank propertiesâ â no-distortion-mseâ and â deviation-at-dcâ â are identified as critical to compression performance, and two new â compensatingâ filter coefficient quantization methods are developed to minimize degradation of these properties. The results indicate that the best performance is obtained by using a cascade form for the filters with coefficients quantized using the â compensating zerosâ technique. The hardware properties of this implementation are then improved by developing a cascade polyphase structure that increases throughput and decreases power consumption.
Next, this thesis investigates implementations of the lifting structureâ an orthogonal structure that is more robust to coefficient quantization than the traditional convolution-based filter bank in computing the DWT. Novel, optimal filter coefficient quantization techniques ar
A module generator which can produce an FPGA-based implementation of an electronic cochlea filter with arbitrary precision is presented. Although hardware implementations of electronic cochlea models have traditionall...
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A module generator which can produce an FPGA-based implementation of an electronic cochlea filter with arbitrary precision is presented. Although hardware implementations of electronic cochlea models have traditionally used analog VLSI as the implementation medium due to their small area, high speed, and low power consumption, FPGA-based implementations offer shorter design times, improved dynamic range, higher accuracy, and a simpler computer interface. The tool presented takes filter coefficients as input and produces a synthesizable VHDL description of an application-optimized design as output. Furthermore, the tool can use simulation test vectors in order to determine the appropriate scaling of the fixed-point precision parameters for each filter. The resulting model can be used as an accelerator for research in audition or as the front-end for embedded auditory signal processing systems. The application of this module generator to a real-time cochleagram display is also presented.
Tool-path generation is one of the most complex problems in computer-aided manufacturing. Although some efficient strategies have been developed to solve it, most of them are only useful for 3- and 5-axis standard mac...
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Tool-path generation is one of the most complex problems in computer-aided manufacturing. Although some efficient strategies have been developed to solve it, most of them are only useful for 3- and 5-axis standard machining. The algorithm called virtual digitising computes the tool path by means of a "virtually digitised" model of the surface and a geometry specification of the tool and its motion, so it can be used even in non-standard machining (retrofitting). This algorithm is simple, robust, and avoids the problem of tool-surface collision. However, its computing cost is high. Presented in the paper there is a virtual digitising optimisation that takes advantage of reconfigurable computing (using fieldprogrammablegates arrays) in order to improve the algorithm speed. A comparative study will show the gain and precision achieved.
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