检索结果-内蒙古大学图书馆

ROSETTA: A Resource and Energy-Efficient Inference Processor for Recurrent Neural Networks Based on programmable Data Formats and Fine Activation Pruning

引用

IEEE TRANSACTIONS ON EMERGING TOPICS IN COMPUTING 2023年第3期11卷 650-663页

作者： Kim, Jiho Kim, Tae-Hwan Korea Aerosp Univ Sch Elect & Informat Engn Goyang 10540 Gyeonggi Do South Korea

Recurrent neural networks (RNNs) are extensively employed to perform inference based on the temporal features of the input data. However, their computational workload and power consumption involved in inference are prohibitively high in practice, which may be problematic to achieve a high-speed inference in devices with tight limitations in the available silicon resources and power supply. This paper presents an efficient inference processor for RNNs, named ROSETTA. ROSETTA supports multiple data formats programmable for each vector operand to achieve a wide range or high precision with a limited data size. ROSETTA consistently performs every vector operation based on homogeneous processing units with a high utilization rate. Moreover, ROSETTA skips operations and reduces memory accesses to achieve high energy efficiency by pruning the activation elements in a fine-grained manner. Implemented in a low-cost 28 nm field-programmable gate array, ROSETTA exhibits a resource and energy efficiency as high as 2.51 - 1.14 MOP/s/LUT and 434.01 - 113.29 GOP/s/W, respectively, while producing near-floating-point inference results. The resource and energy efficiency of ROSETTA are higher than those of the previous processor implemented in the same device by up to 206.1% and 304.0%, respectively. The functionality has been verified for several RNN models of various types under a fully-integrated inference system.

关键词： Logic gates field programmable gate arrays Speech recognition Energy efficiency Convolutional neural networks Recurrent neural networks Integrated circuit modeling Accelerator field programmable gate array inference microarchitecture recurrent neural networks

来源：评论

学校读者我要写书评

暂无评论

HopliteRT*: Real-Time NoC for FPGA

引用

IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS 2020年第11期39卷 3650-3661页

作者： Gonzalez, Yilian Ribot Nelissen, Geoffrey Polytech Inst Porto ISEP CISTER Res Ctr P-4200465 Porto Portugal Eindhoven Univ Technol Dept Math & Comp Sci NL-5612 AZ Eindhoven Netherlands

With the increasing number of computation nodes integrated in multi and many-core platforms, network-on-chips (NoCs) emerged as a new communication medium in systems-on-chips (SoCs). HopliteRT is a new NoC design that was recently proposed to address the needs of real-time systems whilst respecting the constraints of field-programmable gate array (FPGA) platforms. In this article, we: 1) introduce priority-based routing in HopliteRT;2) change the network topology in order to improve the packets' worst-case traversal time (WCTT);3) identify a flaw in the existing timing analysis of HopliteRT;and 4) develop a new timing analysis that is proven correct. We also show by means of experiments that the modifications of HopliteRT proposed in this article allows for at least 2x improvement on the worst and average case traversal time of high priority packets, without impacting the quality of service of low-priority packets. The timing properties of high priority flows are greatly improved for negligible additional hardware costs. The proposed NoC has been implemented in Verilog and synthesized for a Xilinx Virtex-7 FPGA platform.

关键词： field programmable gate array network-onchips real-time embedded systems systems-on-chips timing analysis

来源：评论

学校读者我要写书评

暂无评论

Infrared Target Detection and Recognition Method in Airborne Photoelectric System

引用

JOURNAL OF AEROSPACE INFORMATION SYSTEMS 2019年第3期16卷 94-106页

作者： Ding, Meng Sun, Zhejun Wei, Li Cao, Yunfeng Yao, Yuheng Nanjing Univ Aeronaut & Astronaut Coll Civil Aviat Nanjing 210016 Jiangsu Peoples R China Nanjing Univ Aeronaut & Astronaut Jin Cheng Coll Nanjing 210016 Jiangsu Peoples R China Nanjing Univ Aeronaut & Astronaut Coll Astronaut Nanjing 210016 Jiangsu Peoples R China Univ Southern Calif Viterbi Sch Engn 649 W 34th St Los Angeles CA 90089 USA

Infrared target detection and recognition are investigated by considering the wide application requirements of an airborne photoelectric system. The proposed algorithm can be divided into three parts. First, on the basis that the target of infrared images dominates the background in the frequency domain, this paper presents a method of candidate region detection. The detection algorithm first generates a saliency map using the discrete cosine transform and then identifies candidate regions by computing and comparing saliency scores of different regions. Second, to extract the features of each candidate region for recognition, the paper presents a local descriptor and subsequently uses locality-constrained linear coding and a pooling operator to obtain the feature vector of the target, and then further completes target recognition via a simple linear classifier. Finally, as preliminary research on the engineering application of related algorithms, the detection and recognition algorithms are transplanted to an embedded platform. The paper conducts experiments on six test sequences to evaluate the performance of the proposed algorithms and the computing efficiency on the embedded platform. An evaluation experiment and comparison experiment verify the effectiveness and practicability of the proposed algorithms.

关键词： Computing Frequency Domain field programmable gate array Convolutional Neural Network Airport Towers Sensor Technology Unmanned Aerial Vehicle Graphics Processing Unit Support Vector Machine Focal Plane arrays

来源：评论

学校读者我要写书评

暂无评论

A New Imaging System for Real-Time Process Control

引用

IEEE SENSORS JOURNAL 2017年第12期17卷 3844-3852页

作者： Saied, Imran Mahmoud, Meribout Coll Engn Dept Elect Engn Abu Dhabi U Arab Emirates

In this paper, a new tomography technique called electrical charge tomography for two-phase flow imaging is presented. The probe consists of few pair of electrodes which are electrically energized to generate electrical charges within the fluid under test. The intensity of these charges depends on the chemical and physical properties of the fluid, as well as to its molecular distribution. Another group of electrodes surrounding the cross section of the fluid under test are used to capture the induced electrical charges. These are then converted into an electrical signal using a high sensitive charge amplifier. A postprocessing unit which consists of an analog to digital converter, followed by an field programmable gate array (FPGA) module is then used for high level signal processing (i.e., a dedicated dynamic thresholding algorithm) and image reconstruction. Experimental results demonstrate the capability of the system to accurately generate 2-D cross-sectional images, where the error is lower by up to 14% when using another electrical capacitance (ECT) tomography probe. The other advantage of this technique over ECT is the reduced data acquisition time, since in ECT a minimum time is required for the charge and discharge of the capacitance in order to achieve acceptable accuracy. This makes the probe another attractive concept for future tomography systems targeting real-time applications.

关键词： Electrical capacitance tomography imaging systems field programmable gate array solid contaminants measurement gas pipeline monitoring

来源：评论

学校读者我要写书评

暂无评论

Normally-Off Computing for Crystalline Oxide Semiconductor-Based Multicontext FPGA Capable of Fine-Grained Power Gating on programmable Logic Element With Nonvolatile Shadow Register

引用

IEEE JOURNAL OF SOLID-STATE CIRCUITS 2015年第9期50卷 2199-2211页

作者： Aoki, Takeshi Okamoto, Yuki Nakagawa, Takashi Kozuma, Munehiro Kurokawa, Yoshiyuki Ikeda, Takayuki Yamade, Naoto Okazaki, Yutaka Miyairi, Hidekazu Fujita, Masahiro Koyama, Jun Yamazaki, Shunpei Semicond Energy Lab Co Ltd Atsugi Kanagawa 2430036 Japan Univ Tokyo VDEC Tokyo 1130032 Japan

Normally-off computing (Noff computing) using a multicontext field programmable gate array (MC-FPGA) consisting of crystalline oxide semiconductor FETs has been developed. The Noff computing discussed in this paper is a control architecture for an MC-FPGA capable of performing fine-grained power gating on each programmable logic element (PLE) whose registers include a volatile register and also a nonvolatile shadow register for storing and loading data in the volatile register. The MC-FPGA performs fine-grained control of power supplied only to PLEs contributing to effective calculation, when context switching happens. With an MC-FPGA fabricated with a hybrid process of a 1.0 mu m crystalline oxide semiconductor FET on a 0.5 mu m CMOS FET, it has been confirmed that the proposed Noff computing can resume the previous task when a context switches back to it, increases PLE use efficiency, and reduces the power consumption by 27.7% at operating frequencies of 20 MHz with a driving voltage of 2.5 V.

关键词： CAAC-IGZO crystalline IGZO crystalline oxide semiconductor field programmable gate array multicontext nonvolatile memory normally-off computing oxide semiconductor power gating shadow register

来源：评论

学校读者我要写书评

暂无评论

An Architecture for Coexistence with Multiple Users in Frequency Hopping Cognitive Radio Networks

引用

IEEE JOURNAL ON SELECTED AREAS IN COMMUNICATIONS 2014年第3期32卷 563-571页

作者： McLean, Ryan K. Silvius, Mark D. Hopkinson, Kenneth M. Flatley, Bridget N. Hennessey, Ethan S. Medve, Curtis C. Thompson, Jared J. Tolson, Matthew R. Dalton, Clark V. Air Force Inst Technol Dept Elect & Comp Engn Wright Patterson AFB OH 43433 USA

The radio frequency (RF) spectrum is a limited resource. Spectrum allotment disputes stem from this scarcity as many radio devices are confined to a fixed frequency. One alternative is to incorporate reconfigurability within a cognitive radio platform, thereby enabling the radio to adapt to dynamic RF spectrum environments. In this way, the radio is able to actively observe the RF spectrum, orient itself to the current RF environment, decide on a mode of operation, and act accordingly, thereby sharing the spectrum and operating in more a flexible manner. This research presents a novel architecture for the purpose of adapting radio operation to the current RF spectrum environment. Specifically, this research makes three contributions: (1) a framework for testing and evaluating clustering algorithms in the context of cognitive radio networks, (2) a new RF spectrum map merging technique for adaptive waveform selection, with initial integration testing on a field-programmable gate array (FPGA), and (3) a novel cognitive radio network emulation framework for testing and evaluating totally-ordered multicast as a means for inter-node communication.

关键词： Cognitive radio adaptive waveform clustering radio environment map multicast field programmable gate array

来源：评论

学校读者我要写书评

暂无评论

FPGA-Accelerated Quantum Computing Emulation and Quantum Key Distillation

引用

IEEE MICRO 2021年第4期41卷 49-57页

作者： Li, He Pang, Yaru Univ Cambridge Cambridge CB2 1TN England UCL London WC1E 6BT England

In the past decades, field-programmable gate arrays (FPGAs) have demonstrated an interesting physical platform to facilitate quantum information processing, particularly in the emergence of domain-specific hardware accelerators for quantum computing emulation and quantum key distillation. While conventional general-purpose hardware platforms have been used for quantum information processing, FPGAs promise deep pipeline parallelism, adaptable interface, and trivial support for custom-precision operation. Therefore, the time is ripe for describing recent development of quantum computing emulators and quantum key distillation accelerators on FPGAs. In this article, we provide a comprehensive review of the state-of-the-art in this active field, with a balance between theoretical, implementational, and technological results. Challenges and promising research opportunities are also discussed.

关键词： field programmable gate arrays Quantum Computing Quantum Cryptography Quantum Information Processing FPG As Quantum Computing Emulators Quantum Key Distillation Accelerators FPGA Accelerated Quantum Computing Emulation field programmable gate arrays Interesting Physical Platform Domain Specific Hardware Accelerators General Purpose Hardware Platforms Qubit Logic gates Quantum Computing field programmable gate arrays Hardware Computational Modeling Process Control field programmable gate array Quantum Information Processing Hardware Emulation

来源：评论

学校读者我要写书评

暂无评论

Systemic approach explored in the context of passive target tracking

引用

IET SIGNAL PROCESSING 2010年第3期4卷 314-323页

作者： Totir, F. Ioana, C. Serbanescu, A. Stopin, J. Anton, L. Stankovic, S. Mil Tech Acad Bucharest 050141 Romania INPG GIPSA Lab F-38402 St Martin Dheres France Univ Montenegro Podgorica 81000 Montenegro

For obvious reasons of cost, discretion and reliability costs, locating and tracking aerial targets under an electromagnetically completely passive paradigm, relying exclusively on illuminators of opportunity, is very appealing not only for military but also for civilian tasks. Such a passive radar system could exploit signals emitted by existing commercial television or radio stations or even satellite signals, such as the ones belonging to the global positioning system. This study considers target locating and tracking using a network of passive receivers and/or non-cooperative illuminators (a multi-static radar configuration) by making use of the Doppler shift only. A concept, the systemic approach, is used to combine and interpret information available from different sensors. Both the formalisation of the problem and the hardware and software implementation are presented. Implementation makes use of multi-component polynomial-phase signal models and genetic algorithms. For increased performance, implementation on field programmable gate array is envisaged.

关键词： passive radar system radar signal processing satellite signals global positioning system reliability costs field programmable gate array target locating discretion costs multicomponent polynomial-phase signal models target tracking Optimisation techniques Radar equipment, systems and applications Signal processing and detection genetic algorithms passive target tracking

来源：评论

学校读者我要写书评

暂无评论

GliFreD: Glitch-Free Duplication Towards Power-Equalized Circuits on FPGAs

引用

IEEE TRANSACTIONS ON COMPUTERS 2018年第3期67卷 375-387页

作者： Wild, Alexander Moradi, Amir Gueneysu, Tim Ruhr Univ Bochum Horst Gortz Inst IT Secur D-44801 Bochum Germany Univ Bremen German Res Ctr Artificial Intelligence D-28359 Bremen Germany

Designers of secure hardware are required to harden their implementations against physical threats, such as power analysis attacks. In particular, cryptographic hardware circuits need to decorrelate their current consumption from the information inferred by processing (secret) data. A common technique to achieve this goal is the use of special logic styles that aim at equalizing the current consumption at each single processing step. However, since all hiding techniques like Dual-Rail Precharge (DRP) were originally developed for ASICs, the deployment of such countermeasures on FPGA devices with fixed and predefined logic structure poses a particular challenge. In this work, we propose and practically evaluate a new DRP scheme (GliFreD) that has been exclusively designed for FPGA platforms. GliFreD overcomes the well-known early propagation issue, prevents glitches, uses an isolated dual-rail concept, and mitigates imbalanced routings. With all these features, GliFreD significantly exceeds the level of physical security achieved by any previously reported, related countermeasures for FPGAs.

关键词： Dual-rail precharge logic field programmable gate array side-channel attack power analysis power-equalization hiding

来源：评论

学校读者我要写书评

暂无评论

Indirect sliding mode power control for three phase grid connected power converter

引用

IET POWER ELECTRONICS 2015年第6期8卷 977-985页

作者： Hemdani, Asma Dagbagi, Mohamed Naouar, Wissem Mohamed Idkhajine, Lahoucine Belkhodja, Ilhem Slama Monmasson, Eric Univ Tunis El Manar Ecole Natl Ingn Tunis Lab Syst Elect LR11ES15 Tunis 1002 Tunisia SATIE IUP GEII F-95031 Cergy Pontoise France

Grid connected power converters are widely used to interface between grid - on one side- and loads or renewable energy sources - on the other side. This work presents an indirect sliding mode power control (ISMPC) for three phase grid connected power converter. This control is characterised by improved robustness with regard to external disturbances and parameters changes, while insuring at the same time low current total harmonic distortion factor. The development and implementation of the ISMPC algorithm on low cost Microsemi SmartFusion digital solution is also described. This digital solution includes in the same chip a field programmable gate array (FPGA) fabric and a Cortex-M3 processor associated to large number of peripheral cores. The developed ISMPC is compared with standard and commonly used controls for grid connected converters to show its interest and advantages. Moreover, an overview of the experimental set-up, the description of the algorithm modular partitioning between FPGA and processor, the resources optimisation as well as the execution time reduction are presented. Selected experimental results corresponding to different operation steps are presented to illustrate performances and effectiveness of the proposed ISMPC algorithm.

关键词： variable structure systems power control power grids power convertors renewable energy sources harmonic distortion digital control field programmable gate arrays optimisation robust control indirect sliding mode power control three phase grid connected power converter ISMPC renewable energy source current total harmonic distortion factor Microsemi SmartFusion digital solution field programmable gate array FPGA Cortex-M3 processor modular partitioning resource optimisation execution time reduction

来源：评论

学校读者我要写书评

暂无评论

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案：

请选择收藏分类：

通借通还

建议与咨询 留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案： 新增检索档案 确定 取消

请选择收藏分类： 新增自定义分类 确定 取消

通借通还

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

请选择保存的检索档案：

请选择收藏分类：