In this paper, the Floating-Point Core Architecture based QR decomposition is proposed for solving least square problems in the Orthogonal Matching Pursuit algorithm (OMP-FPCA-QRD). To improve the computational perfor...
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In this paper, the Floating-Point Core Architecture based QR decomposition is proposed for solving least square problems in the Orthogonal Matching Pursuit algorithm (OMP-FPCA-QRD). To improve the computational performance of Orthogonal Matching Pursuit (OMP), it is necessary to modify the Orthogonal Matching Pursuit algorithm for analysing a wide range of signals in field programmable gate array (FPGA). As a result, it highly benefits from the available resources and acquires a scalable computational complexity. Since the solution of least square problem involves some iterative parts, like square root and division units, the processing time of the proposed QR Decomposition (QRD) approach is decreased by increasing parallelism using processing element driven systolic array implementation across all data-dependent operations. The hardware implementation on the ALTERA field programmable gate array shows optimal performance depends on hardware complexity and frequency of operation with the improved computational accuracy over existing QR Decomposition implementations. Moreover, the implementation of Orthogonal Matching Pursuit algorithm for signal reconstruction is also proposed to validate the performance metrics of floating point unit (FPU). The experimental results show that the optimization of floating point unit offers significant resource optimization in QR decomposition, and also better performance of high peak signal-to-noise ratio of 32.99 dB, which outperforms all other fixed point Orthogonal Matching Pursuit systems.
In order to accurately and quickly recognize Bengali handwritten digits and characters, this paper suggests an FPGA-based hardware accelerator design of ANN for handwritten Bengali character recognition applications. ...
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In recent years, the satellite industry has undergone rapid development, with the emergence of "Starlink", which has played a significant role in driving this progress. Among various types of satellites, Low...
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A watchdog timer is a type of electrical timer that detects and recovers from computer errors. In embedded systems and other computer-controlled equipment where individuals are unable to immediately access the equipme...
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In this paper an improved moving, non-recursive Least Squares Estimator is presented that is very lean in its implementation, requires very low computational effort and has very low latency after the last sample of a ...
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Ionizing radiation effect and failure mechanism of Digital signal processor(DSP) is studied through test-board and automatic test equipment to find the relationship between system function failure and parameter degrad...
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Ionizing radiation effect and failure mechanism of Digital signal processor(DSP) is studied through test-board and automatic test equipment to find the relationship between system function failure and parameter degradation. Static bias is more sensitive than dynamic bias when DSP is tested on-line during radiation. Core current, high-Z leakage current and timing parameter are sensitive to ionizing radiation. No enhanced low-dose-rate sensitivity is found by comparing experiment results under high and low dose rate *** memory interface and Timer are deduced to be the sensitive module by step radiation and analysis basing full parameter test in Verigy 93000. The timing parameter degradation have a strong correlation to these module functions. And the degeneration mechanism is analysed on inverter through Hspice simulation which indicate the leakage circuit caused by radiation can lead a delay to the digital signal propagating. The parasitical capacitance among long connections make it worse to the data transmission around DSP, field programmable gate array and memory. Then an early function failure occurs in test board than Verigy 93000. This work provide support to systematic radiation hardness design and hardness assurance/lot acceptance testing in space applications.
To meet the increasing computing needs of various application fields, field programmable gate array(FPGA) has been widely deployed. In FPGA-based processing, hardware tasks can be better accelerated by allocating appr...
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To meet the increasing computing needs of various application fields, field programmable gate array(FPGA) has been widely deployed. In FPGA-based processing, hardware tasks can be better accelerated by allocating appropriate computing resources. Therefore,FPGA-based hardware task scheduling has become one of the mainstream research directions in academia and industry. However, the optimization objectives of existing FPGA-based hardware task scheduling methods are relatively scattered. In this regard, this paper summarizes the research status of hardware task dynamic scheduling from the three essential elements of FPGA processing: time, resources, and power *** paper analyzes, sorts out, categorizes the ideas and implementations of various scheduling methods and analyzes and evaluates optimization effects of various scheduling methods from multiple dimensions. Then, the shortcomings of the existing methods are summarized and some practical applications are introduced. Finally, the research direction of task scheduling based on FPGA is prospected and summarized.
In this paper, a new design and flexible energy management strategy are presented for microgrids. The proposed intelligent energy management system (IEMS) achieves effective integration between the resilient microcont...
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In this paper, a new design and flexible energy management strategy are presented for microgrids. The proposed intelligent energy management system (IEMS) achieves effective integration between the resilient microcontroller, chosen for its rapid response speed and its capability to perform multiple operations simultaneously, and the optimization techniques to enhance the power quality. The IEMS is designed using the FPGA board, chosen for its flexibility and capability to handle multiple and complex operations simultaneously. The experimental testing of the IEMS demonstrates a significant level of effectiveness in managing energy. To enhance system performance and ensure cost-effective reliability, advanced optimization techniques are employed. This study deals with a complex multi-objective optimization problem involving the limitations of energy generation, load demand, and a hydrogen-battery hybrid energy storage system. The moth-flame optimization (MFO) algorithm is chosen to solve this optimization problem due to its rapid convergence rate and accuracy. The effectiveness of the MFO algorithm is assessed by comparing it with several new algorithms. The obtained results show the robust performance of the IEMS and its high responsiveness to dynamic operational scenarios. It can observe, gather, and analyze data in real-time. It achieves a remarkable 1.287 % reduction in operating costs within a short timeframe.
Accurate prediction of photovoltaic (PV) power can significantly alleviate energy crises. However, the inherent randomness and intermittency of PV power pose challenges to the stability and safety of PV-penetrated gri...
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Accurate prediction of photovoltaic (PV) power can significantly alleviate energy crises. However, the inherent randomness and intermittency of PV power pose challenges to the stability and safety of PV-penetrated grid systems. To address this, we have developed a novel hybrid model: a reduced deep convolutional stack autoencoder with a minimum variance multikernel random vector functional link network (RDCSAEMVMRVFLN). This model enhances grid efficacy and safety. We extract the most informative band-limited intrinsic mode functions (BLIMFs) of highly nonlinear and nonstationary solar energy parameters using an entropy, kurtosis, and correlation coefficient-based information-oriented variational mode decomposition (IOVMD). These efficient BLIMFs are concatenated and input into the RDCSAE for rich, abstract, and discriminative representation computation. A less computationally complex MVMKRVFLN regression method, incorporating these refined representations, is proposed for superior prediction accuracy and reduced computational complexity. Our method shows exceptional performance in predicting solar temperature, irradiation, and power for multi-horizon forecasts with minimal error metrics (correlation coefficients of 0 . 999 +/- 0 . 001, 0 . 992 +/- 0 . 001, 0 . 986 +/- 0 . 02 and 0 . 978 +/- 0 . 02, and RMSE of 0 . 016 +/- 0 . 001, 0 . 024 +/- 0 . 001, 0 . 034 +/- 0 . 001 and 0 . 045 +/- 0 . 001 for the interval of 10 minutes, 30 minutes, 1 hour and 3 hours respectively) in both single-step and multistep forecasting compared to conventional methods. The RDCSAE-MVMKRVFLN model is implemented on a high-speed Xilinx Virtex-5 FPGA embedded processor to validate its simplicity, robustness, and practicability. Additionally, we examine the prediction performance using real-time data from a 1 MW solar farm in Odisha, India, demonstrating the model's effectiveness and superiority.
We propose a dynamic parameter decoding algorithm for polar turbo product codes (polar-TPC), obtaining performance gains of up to 0.1 dB without additional complexity. Employing field programmable gate array (FPGA) em...
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ISBN:
(纸本)9781665481557
We propose a dynamic parameter decoding algorithm for polar turbo product codes (polar-TPC), obtaining performance gains of up to 0.1 dB without additional complexity. Employing field programmable gate array (FPGA) emulations, the performance of polar-TPC at ultra-low bit error rate (BER) is verified. In addition, we construct a 16.7% concatenated polar-TPC and Reed-Solomon (RS) code with a pre-forward-error-correction BER of 2.05x10(-2), applicable to optical fiber communications.
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