检索结果-内蒙古大学图书馆

Development of a High-Voltage Pulsed Electric field Sterilization Power Supply Using a New Topology Circuit

ENERGIES 2023年第6期16卷 2741页

作者： Zhu, Bo Su, He Fang, Zhihan Wu, Guoyan Wei, Xinlao Harbin Univ Sci & Technol Coll Elect & Elect Engn Harbin 150080 Peoples R China

Traditional thermal sterilization technology is easy to implement and safe, but it will destroy food nutrition and change food taste. Therefore, people began to turn their attention to non-thermal sterilization. High-voltage pulsed electric field sterilization technology is one of them;it has attracted much attention because of its high efficiency and little damage to food. Different types of loads will cause serious trailing of the pulse falling edge. In view of this situation, this paper proposes a new topology circuit that combines a solid-state switch with a half-bridge Marx generator. It can be used for high-voltage pulsed electric field sterilization. By improving the structure of the classical Marx circuit, the high-voltage pulse power supply of the new topology circuit has the characteristics of steep rising edge and short falling edge delay;does not require isolation inductance or isolation resistance, which solves the isolation problem between the DC charging power supply and the high-voltage terminal;and has a good voltage-clamping function and load adaptability. The working process of the topology circuit under resistive, capacitive and inductive loads and the voltage clamping effect when the solid-state switch does not work properly in the discharge process are analyzed in detail. The power supply is composed of an adjustable DC power supply, five-stage half-bridge Marx generator and control protection circuit. A field programmable gate array (FPGA) is used as the controller to generate control signals, and optical fiber isolation is used to provide control signals for the main loop. The power supply can output a high-voltage square wave pulse with a voltage amplitude of 10 kV, maximum pulse number of 1000 per second, maximum pulse width of 20 mu s, pulse rise time of smaller than 300 ns and short pulse drop time, and the repeated voltage amplitude, frequency and pulse width are adjustable, which can meet the requirements of a high-voltage pulse sterili

关键词： high-voltage pulse power supply pulsed electric field Marx generator all-solid-state field programmable gate array liquid sterilization

来源：评论

学校读者我要写书评

暂无评论

Oscillator Selection Strategies to Optimize a Physically Unclonable Function for IoT Systems Security

引用

SENSORS 2023年第9期23卷 4410-4410页

作者： Aparicio-Tellez, Raul Garcia-Bosque, Miguel Diez-Senorans, Guillermo Celma, Santiago Univ Zaragoza Aragon Inst Engn Res I3A Grp Elect Design GDE Zaragoza 50009 Spain

Physically unclonable functions avoid storing secret information in non-volatile memories and only generate a key when it is necessary for an application, rising as a promising solution for the authentication of resource-constrained IoT devices. However, the need to minimize the predictability of physically unclonable functions is evident. The main purpose of this work is to determine the optimal way to construct a physically unclonable function. To do this, a ring oscillator physically unclonable function based on comparing oscillators in pairs has been implemented in an FPGA. This analysis shows that the frequencies of the oscillators greatly vary depending on their position in the FPGA, especially between oscillators implemented in different types of slices. Furthermore, the influence of the chosen locations of the ring oscillators on the quality of the physically unclonable function has been analyzed and we propose five strategies to select the locations of the oscillators. Among the strategies proposed, two of them stand out for their high uniqueness, reproducibility, and identifiability, so they can be used for authentication purposes. Finally, we have analyzed the reproducibility for the best strategy facing voltage and temperature variations, showing that it remains stable in the studied range.

关键词： authentication cybersecurity field programmable gate array identification Internet of Things physically unclonable function ring oscillator wireless sensor networks

来源：评论

学校读者我要写书评

暂无评论

A low delay highly dynamic range infrared imaging system for complex scenes based on FPGA

引用

MEASUREMENT 2023年 223卷

作者： Zhou, Yongkang Li, Xiaoqiong Zhou, Junjie Tang, Xingfen Beijing Inst Technol Sch Life Sci 5 South Zhongguancun St Beijing Peoples R China Kunming Inst Phys 31 Jiaochang East Rd Kunming Peoples R China

We proposed a hardware-oriented framework for infrared images compression and enhancement. The aim is to achieve high-quality imaging with minimal delay. Specifically, we introduce several key improvements: Firstly, we adopt the anisotropic guided filtering for layering, which effectively addresses the issue of detail halo. Secondly, we proposed a dynamic range compression algorithm (LIHS&HRC), which is based on local information histogram statistics and thus highlights the gray scales with abundant details. Thirdly, we propose a low-complexity adaptive two-dimensional non-local mean algorithm, which preserves important details while reducing noise. Through extensive experimentation, it is demonstrated the proposed algorithm framework significantly reduces latency and field programmable gate array (FPGA) resource requirements. It generates high-quality infrared image sequences in a minimal delay of only 0.31 ms at a frame rate of 50fps, with consuming a mere 0.0362 MB of shift register and 0.0312 MB of BRAM.

关键词： Low delay infrared imaging system Anisotropic Guided Filtering Local information histogram Adaptive non-local mean filtering field programmable gate array

来源：评论

学校读者我要写书评

暂无评论

An analytical approach to error detection and correction for onboard nanosatellites

引用

EURASIP JOURNAL ON WIRELESS COMMUNICATIONS AND NETWORKING 2023年第1期2023卷 49页

作者： Islam, Md. Motaharul Hasan, Mahmudul Bhuiyan, Zaheed Ahmed United Int Univ Dept Comp Sci & Engn Dhaka Bangladesh

Nanosatellites are persistently progressing and creating global communication and data transmission. It builds up a colossal request for more progressed and dependable frameworks to transmit faster and more reliable information. A syntactic machine learning approach has been distinguished as a good plot for anticipating single-bit and multiple-bit errors that influence onboard nanosatellites. In this paper, we have proposed an analytical approach to error detection and correction for onboard nanosatellites. We have planned the framework separately with three distinct parts: encoding, error checking, and decoding. It has created an amid information exchange from satellite to the ground station. It has analyzed six camera pictures simultaneously with the assistance of field programmable gate array and EDAC strategies. We have presented the progressed turbo mechanics EDAC for unprecedented transfer speeds of satellite communication and execution & examination with the AWGN and Rayleigh channels to extend the proficiency. EDAC strategies codes have been implemented in MATLAB. This method is straightforward and accomplishes unwavering quality and exactness compared to comparable strategies.

关键词： Error detection and correction Low-density parity check Bose-Chaudhuri-Hocquenghem codes Turbo codes Convolutional codes Shannon's theorem Earth observation field programmable gate array On-board command data handling

来源：评论

学校读者我要写书评

暂无评论

High-level synthesis assisted, low-latency, area- and power-optimized FPGA implementation of MUSIC algorithm for direction-of-arrival estimation

引用

SUSTAINABLE ENERGY TECHNOLOGIES AND ASSESSMENTS 2023年 57卷

作者： Sikka, Prateek ST Microelect Greater Noida Uttar Pradesh India

For multiple signal-processing applications, estimating the target's speed, distance, and elevation angle by using applications running in real time and consequently, fast data rates is important. Custom hardwares, such as field programmable gate arrays (FPGAs), are often used to prototype and deploy such signal-processing algorithms. Multiple signal classification (MUSIC) is typically used for direction-of-arrival (DOA) estimation. It involves complex mathematical operations such as covariance matrix computation, eigen value decomposition, and peak value search for signal values. With a novel high-level synthesis (HLS)-based design approach that optimizes the bit widths for the eigen value decomposition logic, this study presents an area and speed-optimal implementation of MUSIC algorithm on FPGA. The final implementation involving the covariance matrix computation, eigen value decomposition, and peak search was implemented on Xilinx Zynq (XC7Z020) FPGA. Because of its optimum bit widths, area utilization was minimized and operation frequency on the target FPGA was maximized. The proposed design works in real time to estimate the DOA in less than 1.7 mu s (15 % faster than reported values) and uses up to 30 % less resources on the target FPGA compared with other reported implementations.

关键词： Direction of arrival field programmable gate array High-level synthesis Multiple signal classification

来源：评论

学校读者我要写书评

暂无评论

A review of the use of simple time-domain NMR/MRI for material-science Time-domain benchtop and mobile NMR/MRI for liquid and solid material science, and nano- to micro-pore-size measurement

引用

SN APPLIED SCIENCES 2021年第10期3卷 1-18页

作者： Webber, J. Beau W. Lab Tools Ltd NanoSci Marlowe Innovat Ctr Marlowe Way Ramsgate CT12 6FA England

The intention of this discussion is as a simple introduction for general-non-nuclear magnetic resonance (NMR)-specialist-materials scientists, to make them aware as to how some of the materials science measurements that they need to make might possibly be addressed by simple physical measurements using low-cost time-domain NMR apparatus. The intention is to include a minimum of complex NMR detail, while enabling general material-scientists to see that simple easily understood time-domain NMR might be of use to them. That is how I have tried to structure this discussion. It seems to me be generally forgotten how much of materials science is actually physics, as opposed to chemistry, and the extent to which simple time-domain NMR may be used to make measurements of the physical properties of materials. There frequently seems to be an assumption that if NMR is mentioned that it is chemical analysis methods that are under discussion, or possibly magnetic resonance imaging (MRI). These are both extremely powerful techniques, but to forget about the physics that often governs the properties of the sample can be a significant mistake. Key material science properties are often described in different fields using the terms mobility/dynamics/stiffness/viscosity/rigidity of the sample. These properties are usually dependent on atomic and molecular motion in the sample. We will discuss a method, time-domain NMR, that appears often to be ignored, to obtain quantitative or comparative information on these properties. The intention of this paper is not to probe the material properties of some interesting system, but to discuss in as clear a manner as possible a particular technique, "low-field time-domain NMR", to bring this technique and its advantages to the attention of other material scientists. Thus we discuss time-domain NMR and MRI, as methods of measuring the physical properties of liquid and solid materials. Time-domain NMR is also a good technique for measuring pore-size

关键词： Material-science Time-domain Time domain NMR Low-field Low field NMR NMR relaxation NMR cryoporometry FPGA field programmable gate array Benchtop NMR mouse Digital RF Variable temperature V-T Pore-size Process monitoring

来源：评论

学校读者我要写书评

暂无评论

Multi-hardware Real-time Simulator Resource Optimization Configuration Method

International Core Journal of Engineering

引用

International Core Journal of Engineering 2023年第11期9卷 71-75页

作者： Wenbin Mu Hao Wu

This article uses the subway traction power supply model as a simulation model to study the efficient and accurate real-time simulation of power systems with limited computing resources and real-time constraints. It focuses on the resource optimization configuration method for multi-hardware real-time simulators. Firstly, the article distinguishes the tasks suitable for different hardware based on their different computing characteristics, the generality of CPU, and the inherent high parallelism and stronger computing capabilities of FPGA. Then, it adopts a physics-decoupled method to perform fine-grained partitioning of the resource occupation rate required for processing tasks on each hardware, so that each module can operate with the minimum resource occupation rate on the hardware, maximizing hardware resource savings and computational *** multi-level parallel real-time simulation architecture is formed through the coordination allocation of the coarse-grained and fine-grained partitioned model on the hardware, from hardware level, module level, to element level.

关键词： Real-time Simulator field programmable gate array Resource Optimization Allocation

来源：评论

学校读者我要写书评

暂无评论

Implementation of Image Watermark Algorithm Based on FPGAImage watermark embedding circuit 23

Implementation of Image Watermark Algorithm Based on FPGAIma...

引用

Proceedings of the 2023 International Conference on Artificial Intelligence, Systems and Network Security

作者： Guotao Cong Sen Wang Henan Li Dalian Neusoft University of Information China

ISBN: (纸本)9798400716966

With the popularization of the Internet and the widespread application of digital technology, there are more and more digital products that are easy to spread, and at the same time, copyright protection issues are becoming increasingly prominent. Digital watermarking technology has been continuously developed in this context. This system is based on the FPGA platform to embed image watermarks and achieve hardware acceleration processing. Receive the data of the original image and watermark image through the high-speed transmission interface, perform wavelet transform on the original image, embed the watermark image, and then output the synthesized watermark image data through the high-speed transmission interface. This system selects the lifting wavelet transform algorithm as the watermark embedding algorithm to achieve blind watermarking, which has the characteristics of easy hardware implementation, high robustness and security of the watermark. The system has been verified through simulation and physical testing, with correct functionality and reliable performance.

关键词： field programmable gate array Hardware Acceleration Image Watermarks Wavelet Transform

来源：评论

学校读者我要写书评

暂无评论

Research on Spaceborne Memory Control Based on FPGA Configuration Refresh Technology 23

Research on Spaceborne Memory Control Based on FPGA Configur...

引用

Proceedings of the 2023 6th International Conference on Artificial Intelligence and Pattern Recognition

作者： Xiaofeng Yang Chuang Wu Xi'an University of Posts and Telecommunications China

ISBN: (纸本)9798400707674

The development of my country's manned space technology has advanced by leaps and bounds. From the Shenzhou 5 with one person in orbit for half a day to the Shenzhou 13 with three people in orbit for half a year, the spacecraft communicates with the ground in real time. field programmable gate array(FPGA) with their own advantages of high integration and flexibility, are widely used in aerospace ***, the space environment is complex, and based on the physical structure of SRAM-type FPGA, the vast majority of FPGA devices will be very sensitive to electromagnetic radiation, which can cause errors in the configuration information of the design circuit, and even cause the system to fail to operate normally, causing incalculable damage. Therefore, it is important to study the configuration refresh technology of FPGA for starboard systems. This paper proposes a Xilinx Kintex-7 series FPGA as the target device, improves the traditional three-mode redundancy technology, and introduces a configuration refresh technology for the on-board memory control system, which corrects the data transmission error caused by SEU. Improved stability and reliability during data transfer.

关键词： field programmable gate array Single-event upset configuration refresh

来源：评论

学校读者我要写书评

暂无评论

Efficient AI Reasoning Model Based on FPGA

引用

Procedia Computer Science 2023年 228卷 1068-1076页

作者： Junyi Ran School of Big Data Chongqing Vocational College of Transportation Chongqing 402247 China

The artificial intelligence inference model is currently the best mathematical model based on artificial neural networks. The intelligent reasoning mode based on artificial intelligence has a large construction scale. In a completed inference, many multiplication and addition operations need to be completed. To establish an effective artificial intelligence inference model, its computational complexity is dozens or even more times higher than traditional artificial intelligence algorithms. This article focused on the research on the isomerization acceleration of FPGA (field programmable gate array). This article was looking for a method that reduces both system changes and migration, while maximizing the flexibility of FPGA programmability. In order to build on this foundation, a fast interface for fast computation using FPGA was designed. The characteristic of this project was that it could combine the FPGA acceleration platform with ordinary computers or servers, and could effectively utilize traditional computer software and toolchains. This article compared the computational time consumption between the inference model and the CPU. In the scale calculation logic scenario of the inference model designed in this article, it could achieve the same computing power as the CPU when processing 70000 multiplication calculations. The experimental results indicated that the increase in CPU computing power was greater than that of the inference model. This indicated that the larger the amount of computational data, the more significant the acceleration effect of the inference model in this article would be.

关键词： AI Reasoning Model Central Processing Unit field programmable gate array Graphics Processing Unit

来源：评论

学校读者我要写书评

暂无评论

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案：

请选择收藏分类：

通借通还

建议与咨询 留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案： 新增检索档案 确定 取消

请选择收藏分类： 新增自定义分类 确定 取消

通借通还

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

请选择保存的检索档案：

请选择收藏分类：