检索结果-内蒙古大学图书馆

MsBV: A Memory Compression Scheme for Bit-Vector-Based Classification Lookup Tables

IEEE ACCESS 2020年 8卷 38673-38681页

作者： Shi, Zilin Yang, Hui Li, Junnan Li, Chenglong Li, Tao Wang, Baosheng Natl Univ Def Technol Coll Comp Sci & Technol Changsha 410072 Peoples R China

Packet classification is widely used in Software-Defined Networking (SDN). At present, packet classification is mainly implemented by software, such as OpenvSwitch, which has the disadvantage of low performance. On the field programmable gate array (FPGA) platform, FPGA has the advantages of reconfigurability and high processing performance. The current work proposes the FPGA-based Bit-Vector algorithms in packet classification, which has the advantages of determining latency and high throughput. In the Bit-Vector-based algorithms, stringent memory resources in FPGA are wasted to store relatively useless wildcards because there are plenty of wildcards in the rules. A bit-vector-based memory compression scheme named Memory-shared Bit-Vector (MsBV) is proposed. MsBV adopts a memory-shared homogeneous two-dimensional pipeline architecture, and it can reduce memory consumption and ensure the correctness of packet classification. In MsBV, we reduce memory consumption better by rearranging the bit matrix. The experimental results show that MsBV saves about 43.69& x0025;memory resources, 57.53& x0025;the number of ALUTs, and 37.59& x0025;the number of Registers compared to StrideBV of 100K OpenFlow rules.

关键词： Pipelines Memory management field programmable gate arrays Heuristic algorithms Decision trees Engines Standards Bit-vector packet classification memory compression shared memory field programmable gate array

来源：评论

学校读者我要写书评

暂无评论

Current transformer saturation compensation based on a partial nonlinear model

引用

ELECTRIC POWER SYSTEMS RESEARCH 2013年 97卷 34-40页

作者： Shi, D. Y. Buse, J. Wu, Q. H. Guo, C. X. S China Univ Technol Sch Elect Power Engn Guangzhou 510640 Guangdong Peoples R China Univ Liverpool Dept Elect Engn & Elect Liverpool L69 3GJ Merseyside England Zhejiang Univ Coll Elect Engn Hangzhou 310027 Zhejiang Peoples R China

This paper proposes a partial nonlinear model to accurately represent the nonlinear saturation characteristic of a current transformer (CT). Based on the model, the saturated section of the secondary current as well as the unsaturated section can be used in a regression process to estimate model parameters. The saturated section normally lies near the inception of a fault, therefore accurate parameters can be obtained faster compared with the methods using only unsaturated sections. The pre-fault remanent flux and DC-offset, which could significantly influence CT saturation, are both considered in the model, thus they do not affect the accuracy of the parameter estimation. The computational load of the regression calculation is significantly reduced by using separable nonlinear least squares (SNLLS) method. This provides the feasibility to implement the method for real-time protective relaying. The performance of the method has been evaluated on the data obtained from both PSCAD/EMTDC simulation and live recording with a test CT. The method has also been implemented in a field programmable gate array (FPGA). (C) 2013 Elsevier B.V. All rights reserved.

关键词： Current transformer Saturation Nonlinear regression field programmable gate array

来源：评论

学校读者我要写书评

暂无评论

Energy efficient spiking neural network processing using approximate arithmetic units and variable precision weights

引用

JOURNAL OF PARALLEL AND DISTRIBUTED COMPUTING 2021年 158卷 164-175页

作者： Wang, Yi Zhang, Hao Oh, Kwang-Il Lee, Jae-Jin Ko, Seok-Bum Univ Saskatchewan Dept Elect & Comp Engn 57 Campus Dr Saskatoon SK S7N 5A9 Canada ETRI SoC Design Res Grp Daejeon South Korea

Spiking neural networks (SNNs) have been getting more research attention in recent years as the way they process information is suitable for building neuromorphic systems effectively. However, realizing SNNs on hardware is computationally expensive. To improve their efficiency for hardware implementation, a field-programmable gate array (FPGA) based SNN accelerator architecture is proposed and implemented using approximate arithmetic units. To identify the minimal required bit-width for approximate computation without any performance loss, a variable precision method is utilized to represent weights of the SNN. Unlike the conventional reduced precision method applied to all weights uniformly, the proposed variable precision method allows different bit-widths to represent weights and provide the feasibility of maximizing truncation effort for each weight. Four SNNs adopting different network configurations and training datasets are established to compare the performance of proposed accelerator architecture using the variable precision method with the proposed one using the conventional reduced precision method. Based on the experimental results, more than 40% of the weights require less bit-width when applying the variable precision method instead of the reduced precision method. With the variable precision method, the proposed architecture achieves 28% fewer ALUTs and 29% less power consumption than the proposed one using the reduced precision method. (C) 2021 Elsevier Inc. All rights reserved.

关键词： Spiking neural network Approximate computing field programmable gate array Hardware accelerator

来源：评论

学校读者我要写书评

暂无评论

Optical cyber-physical system embedded on an FPGA for 3D measurement in structural health monitoring tasks

引用

MICROPROCESSORS AND MICROSYSTEMS 2018年 56卷 121-133页

作者： Elias Miranda-Vega, Jesus Flores-Fuentes, Wendy Sergiyenko, Oleg Rivas-Lopez, Moises Lindner, Lars Rodriguez-Quinonez, Julio C. Hernandez-Balbuena, Daniel Univ Autonoma Baja California Fac Ingn Campus Mexicali Mexicali Baja California Mexico Univ Autonoma Baja California Inst Ingn Campus Mexicali Mexicali Baja California Mexico

This paper presents the description of a cyber-physical system embedded on an FPGA for 3D measurement in structural health monitoring tasks. The implementation technique and performance evaluation demonstrate the contribution of this paper to the mathematical fundamentals adaptation of an on-site rotatory scanning system to a cyber-physical system. In particular, it is described in detail the design of a virtual angle measurement soft sensing technique based on the information conversion of an optoelectronic signal provided by a rotatory scanning system through an FPGA. Behaving the FPGA as the sensor controller and the actuator in the scanning system. Using the measurement of angles through the proposed embedded system, it can be calculated the coordinates and displacement of specific indicators distributed over a structure under observation. Providing online data exchange from on-site measurement to a remote computational station for real-time or posteriorly data analysis.

关键词： Angle measurement Cyber-physical system Embedded system field programmable gate array Soft sensing Structural health monitoring Optoelectronic signal Virtual sensor

来源：评论

学校读者我要写书评

暂无评论

VLSI-based Real-time Signal Processing Solution Employing Four-phase Codes for Spread-spectrum Applications

引用

IETE JOURNAL OF RESEARCH 2012年第1期58卷 57-64页

作者： Balaji, N. Rao, Kakarla Subba VNRVJIET Dept ECE Hyderabad Andhra Pradesh India Osmania Univ Univ Coll Engn Hyderabad 500007 Andhra Pradesh India

Spread-Spectrum applications require a set of sequences with individually peaky autocorrelation and pair-wise cross correlation. Obtaining such sequences is a combinatorial problem. If the autocorrelation and cross correlation are taken in the aperiodic sense, then there are hardly any theoretical aids available. Thus, the problem of signal design referred to above is a challenging problem for which many global optimization algorithms like genetic algorithm, simulated annealing, and tunneling algorithm were reported in the literature. The paper aims at implementation of an efficient VLSI System for the design of an optimal pulse compression codes useful for Spread-Spectrum applications. The proposed VLSI system implements the modified genetic algorithm for identifying and generating the optimal pulse compression codes. The VLSI System is implemented on the field programmable gate array as it provides the flexibility of reconfigurability and reprogramability and it is a real-time signal-processing solution which identifies and generates optimal sequences.

关键词： field programmable gate array Four-phase codes Genetic algorithm Hamming scan Spread-spectrum applications VLSI

来源：评论

学校读者我要写书评

暂无评论

The dynamical analysis of modified two-compartment neuron model and FPGA implementation

引用

PHYSICA A-STATISTICAL MECHANICS AND ITS APPLICATIONS 2017年 484卷 199-214页

作者： Lin, Qianjin Wang, Jiang Yang, Shuangming Yi, Guosheng Deng, Bin Wei, Xile Yu, Haitao Tianjin Univ Sch Elect Automat & Informat Engn Tianjin 300072 Peoples R China

The complexity of neural models is increasing with the investigation of larger biological neural network, more various ionic channels and more detailed morphologies, and the implementation of biological neural network is a task with huge computational complexity and power consumption. This paper presents an efficient digital design using piecewise linearization on field programmable gate array (FPGA), to succinctly implement the reduced two-compartment model which retains essential features of more complicated models. The design proposes an approximate neuron model which is composed of a set of piecewise linear equations, and it can reproduce different dynamical behaviors to depict the mechanisms of a single neuron model. The consistency of hardware implementation is verified in terms of dynamical behaviors and bifurcation analysis, and the simulation results including varied ion channel characteristics coincide with the biological neuron model with a high accuracy. Hardware synthesis on FPGA demonstrates that the proposed model has reliable performance and lower hardware resource compared with the original two-compartment model. These investigations are conducive to scalability of biological neural network in reconfigurable large-scale neuromorphic system. (C) 2017 Elsevier B.V. All rights reserved.

关键词： Neuronal two-compartment model field programmable gate array Piecewise linearization Implementation

来源：评论

学校读者我要写书评

暂无评论

Application-specific customisation of multi-threaded soft processors

引用

IEE PROCEEDINGS-COMPUTERS AND DIGITAL TECHNIQUES 2006年第3期153卷 173-180页

作者： Dimond, R. Mencer, O. Luk, W. Univ London Imperial Coll Sci Technol & Med Dept Comp London SW7 2RH England

A multi-threaded microprocessor with a customisable instruction set, CUStomisable Threaded ARchitecture (CUSTARD), is proposed. CUSTARD features include design space exploration and a compiler for automatic selection of custom instructions. Custom instructions, optimised for a specific application, accelerate frequently performed computations by implementing them as dedicated hardware. field programmable gate array implementations of CUSTARD are evaluated using media and cryptography benchmarks, and commercial MicroBlaze processor is compared. As low as 28% area overhead for four interleaved threads and up to 355% speedup over a processor without custom instructions are demonstrated.

关键词： cryptography microprocessor chips FPGA implementation multi-threading Cryptography Logic and switching circuits Microprocessor chips media benchmark MicroBlaze processor Data security Distributed systems software Logic circuits design space exploration multithreaded microprocessor customisable instruction set dedicated hardware field programmable gate arrays instruction sets field programmable gate array custom instruction automatic selection cryptography benchmark interleaved thread customisable threaded architecture multithreaded soft processor Microprocessors and microcomputers

来源：评论

学校读者我要写书评

暂无评论

Development of mass spectrometry by high energy focused heavy ion beam: MeV SIMS with 8 MeV Cl⁷⁺ beam

引用

NUCLEAR INSTRUMENTS & METHODS IN PHYSICS RESEARCH SECTION B-BEAM INTERACTIONS WITH MATERIALS AND ATOMS 2014年 332卷 22-27页

作者： Jeromel, Luka Siketic, Zdravko Potocnik, Nina Ogrinc Vavpetic, Primoz Rupnik, Zdravko Bucar, Klemen Pelicon, Primoz Jozef Stefan Inst SI-1000 Ljubljana Slovenia Rudjer Boskovic Inst Zagreb 10000 Croatia LOTRIC Metrol Ltd SI-4227 Selca Slovenia

Particle induced X-ray emission (PIXE) at microprobe of jozef Stefan Institute is used to measure two-dimensional quantitative elemental maps of biological tissue. To improve chemical and biological understanding of the processes in vivo, supplementary information about chemical bonding and/or molecular distributions could be obtained by heavy-ion induced molecular desorption and a corresponding mass spectroscopy with Time-Of-Flight (TOF) mass spectrometer. As the method combines the use of heavy focused ions in MeV energy range and TOF Secondary Ion Mass Spectrometry, it is denoted as MeV SIMS. At jozef Stefan Institute, we constructed a linear TOF spectrometer and mount it to our multipurpose nuclear microprobe. A beam of 8 MeV Cl-35(7+) could be focused to a diameter of better than 3 mu m x 3 mu m and pulsed by electrostatic deflection at the high-energy side of accelerator. TOF mass spectrometer incorporates an 1 m long drift tube and a double stack microchannel plate (MCP) as a stop detector positioned at the end of the drift path. Secondary ions are focused at MCP using electrostatic cylindrical einzel lens. Time of flight spectra are currently acquired with a single-hit time-to-digital converter. Pulsed ion beam produces a shower of secondary ions that are ejected from positively biased target and accelerated towards MCP. We start our time measurement simultaneously with the start of the beam pulse. Signal of the first ion hitting MCP is used to stop the time measurement. Standard pulses proportional to the time of flight are produced with time to analog converter (TAC) and fed into analog-to-digital converter to obtain a time histogram. To enable efficient detection of desorbed fragments with higher molecular masses, which are of particular interest, we recently implemented a state-of art field programmable gate array (FPGA)-based multi-hit TOF acquisition. To test the system we used focused 8 MeV Cl-35(7+) ion beam with pulse length of 180 ns. Mass resoluti

关键词： Mass spectrometry Focused ion beam field programmable gate array Micro-PIXE MeV-SIMS Dual imaging mode

来源：评论

学校读者我要写书评

暂无评论

High-frequency pulse width modulation implementation using FPGA and CPLD ICs

引用

JOURNAL OF SYSTEMS ARCHITECTURE 2006年第6期52卷 332-344页

作者： Koutroulis, Eftichios Dollas, Apostolos Kalaitzakis, Kostas Tech Univ Crete Dept Elect & Comp Engn GR-73100 Khania Greece

Pulse width modulation (PWM) has been widely used in power converter control. Most high power level converters operate at switching frequencies up to 500 kHz, while operating frequencies in excess of 1 MHz at high power levels can be achieved using the planar transformer technology. The contribution of this paper is the development of a high-frequency PWM generator architecture for power converter control using FPGA and CPLD ICs. The resulting PWM frequency depends on the target FPGA or CPLD device speed grade and the duty cycle resolution requirements. The post-layout timing simulation results are presented, showing that PWM frequencies up to 3.985 MHz can be produced with a duty cycle resolution of 1.56%. Additionally, experimental results are also presented for low cost functional verification of the proposed architecture. (c) 2005 Elsevier B.V. All rights reserved.

关键词： pulse width modulation power converters field programmable gate array CPLD counter

来源：评论

学校读者我要写书评

暂无评论

Development design and demonstration of very high-speed multi-antenna digital receiver

引用

IET RADAR SONAR AND NAVIGATION 2018年第5期12卷 523-529页

作者： Sun, Weiwei Vertatschitsch, Laura Sahr, John D. Univ Washington Dept Elect Engn Seattle WA 98195 USA Syst & Technol Res Woburn MA USA

The authors present initial results from the fourth-generation receiver for the Manastash Ridge radar, which is a distributed passive radar system used for ionospheric physics and engineering studies. This receiver permits simultaneous access to the high-frequency (HF), very HF (VHF), and ultra HF (UHF) spectrum by sampling at speeds up to 5 billion samples/s on multiple antennas. This system has large aggregate bandwidth;it can simultaneously collect the entire VHF FM broadcast band as well as several UHF DTV broadcasts. The receiver adopts direct sampling architecture;therefore, high dynamic range is achieved with decimation for narrowband signals. Most of the analogue signal path is eliminated, yielding excellent linearity, and high-speed digital signal processing in the field programmable gate array (FPGA) yields low-latency real-time operation. The authors also discuss algorithms to make effective use of the FPGA. For example, the sampler runs 16 times faster than the FPGA, so initial FPGA processing requires parallel algorithms. In the authors design, the downconverter passband centre frequencies and spectral widths are selectable at run time, and can be changed in a few milliseconds. The authors FPGA computes in fixed point math, which presents both opportunities and challenges in managing precision during the signal processing for networking and for subsequent signal processing.

关键词： antenna arrays radar antennas radar receivers passive radar radar signal processing signal sampling field programmable gate arrays parallel algorithms fixed point arithmetic very high-speed multiantenna digital receiver demonstration very high-speed multiantenna digital receiver Development design fourth-generation receiver Manastash Ridge radar distributed passive radar system high-frequency spectrum ultra HF spectrum very HF spectrum VHF FM broadcast UHF DTV broadcasts direct sampling architecture high dynamic range high-speed digital signal processing field programmable gate array FPGA low-latency real-time operation parallel algorithms fixed point math

来源：评论

学校读者我要写书评

暂无评论

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案：

请选择收藏分类：

通借通还

建议与咨询 留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案： 新增检索档案 确定 取消

请选择收藏分类： 新增自定义分类 确定 取消

通借通还

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

请选择保存的检索档案：

请选择收藏分类：