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检索条件"主题词=Field-programmable gate array"
570 条 记 录,以下是401-410 订阅
A Cost-Effective Baugh-Wooley Approximate Multiplier for FPGA-based Machine Learning Computing  6
A Cost-Effective Baugh-Wooley Approximate Multiplier for FPG...
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6th International Conference on AI Circuits and Systems (AICAS)
作者: Vakili, Shervin Inst Natl Rech Sci Energie Mat Telecommun Res Ctr Montreal PQ Canada
Deep learning hardware accelerators commonly incorporate a substantial quantity of multiplier units. Yet, the considerable complexity of multiplier circuits renders them a bottleneck, contributing to increased costs a... 详细信息
来源: 评论
FPGA-based Development of Finite State-MPC for Three-Phase Grid-Connected VSI System  10
FPGA-based Development of Finite State-MPC for Three-Phase G...
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10th International Conference on Power Electronics and ECCE Asia (ICPE - ECCE Asia)
作者: Singh, Vijay Kumar Tripathi, Ravi Nath Hanamoto, Tsuyoshi Kyushu Inst Technol Grad Sch Life Sci & Syst Engn Fukuoka 8080196 Japan Kyushu Inst Technol Next Generat Power Elect Res Ctr Fukuoka 8080196 Japan
Power converters are used for grid integration of renewable sources that can achieve certain objectives through system control. Finite state - model predictive control (FS-MPC) is one of the techniques used for the gr... 详细信息
来源: 评论
Development of plasma control system for divertor configuration on QUEST
Development of plasma control system for divertor configurat...
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27th Symposium on Fusion Technology (SOFT)
作者: Hasegawa, M. Nakamura, K. Zushi, H. Hanada, K. Fujisawa, A. Matsuoka, K. Mitarai, O. Idei, H. Nagashima, Y. Tokunaga, K. Kawasaki, S. Nakashima, H. Higashijima, A. Kyushu Univ Appl Mech Res Inst Kasuga Fukuoka 816 Japan Tokai Univ Toro Ku Kumamoto Japan
A plasma control system to sustain divertor configurations is developed on QUEST (Q-shu university experiment with steady-state spherical tokamak). Magnetic fluxes are numerically integrated at 100 kHz using FPGA (Fie... 详细信息
来源: 评论
Model Predictive Control Driven Transformer Coupled Parallel Hybrid Si IGBT/SiC MOSFET Converter  39
Model Predictive Control Driven Transformer Coupled Parallel...
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Applied Power Electronics Conference and Exposition (APEC)
作者: Li, Ning Finney, Stephen Judge, Paul D. Univ Edinburgh Inst Energy Syst Edinburgh Midlothian Scotland
This paper investigates the design of a Parallel Hybrid Converter topology for DC/AC applications connected using a three-winding transformer. The original Parallel Hybrid Converter (PHC) topology consists of a Silico... 详细信息
来源: 评论
FPGA-based Reservoir Computing with Optimized Reservoir Node Architecture  23
FPGA-based Reservoir Computing with Optimized Reservoir Node...
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23rd International Symposium on Quality Electronic Design (ISQED)
作者: Lin, Chunxiao Liang, Yibin Yi, Yang Virginia Tech Bradley Dept Elect & Comp Engn Blacksburg VA USA
Updating the state of reservoir nodes is one of the essential operations of reservoir computing (RC), which highly affects the system's performance. In an echo state network (ESN), one of the primary types of RC, ... 详细信息
来源: 评论
Development of an IP-cores Libraries as Part of the Design Flow of Integrated Circuits on FPGA
Development of an IP-cores Libraries as Part of the Design F...
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IEEE Conference of Russian Young Researchers in Electrical and Electronic Engineering (ElConRus)
作者: Khvatov, Vasilii M. Zheleznikov, Daniil A. Russian Acad Sci IPPM RAS Inst Design Problems Microelect Moscow Russia
IP-core is a block with a complex function that can be re-used in integrated circuits design. There are two types of FPGA IP-cores: hard IP-core and soft IP-core. Hard IP-cores have an exact location and pre-routed in... 详细信息
来源: 评论
Radar Pulse on Pulse Identification Algorithm Hardware Acceleration Performance Analysis  11
Radar Pulse on Pulse Identification Algorithm Hardware Accel...
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IEEE 11th Annual Computing and Communication Workshop and Conference (CCWC)
作者: Juliano, Jordan Lin, Jaron Erdogan, Alex George, Kiran Calif State Univ Fullerton Comp Engn Fullerton CA 92634 USA
The performance in radar receiver signal processing is a critical factor in identifying radar pulses. The use of field-programmable gate arrays (FPGA) in hardware acceleration provides multiple advantages in radar sig... 详细信息
来源: 评论
The Review of Cellular Automata Algorithms for Placement and Routing Problems
The Review of Cellular Automata Algorithms for Placement and...
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IEEE Conference of Russian Young Researchers in Electrical and Electronic Engineering (ElConRus)
作者: Zapletina, Mariya A. Zhukov, Denis, V RAS CAD Dept Inst Design Problems Microelect Zelenograd Russia
The paper proposes a review of the modern research experience of the cellular automata algorithms, models and methods to solve the problem of searching the shortest paths and the placement task for the logic elements ... 详细信息
来源: 评论
Architecture of IoT-based Collaborative Laboratory for Reconfigurable SoC: Review and Development  2
Architecture of IoT-based Collaborative Laboratory for Recon...
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IEEE 2nd German Education Conference (GECon)
作者: Al Amin, Rashed Wiese, Veit Rahman, Mohammad Musfiqur Jacobs, Sven Jaschke, Steffen Obermaisser, Roman Univ Siegen Inst Embedded Syst Siegen Germany Univ Siegen Comp Sci Educ Siegen Germany
Reconfigurable System-on-Chip (SoC) is a computing architecture that allows users to program and reprogram the hardware to perform different tasks, making it highly flexible and adaptable. Due to its potential to sign... 详细信息
来源: 评论
FPGA Implementation of Second-Order Difference Plot for Epileptic Seizure Detection in EEG Signals  12
FPGA Implementation of Second-Order Difference Plot for Epil...
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12 IEEE Int C Elect Energy Env Communications Computer Control
作者: Singh, Ardra Prince, A. Amalin Birla Inst Technol & Sci Pilani Elect & Elect Engn Dept KK Birla Goa Campus Pilani Goa India
field-programmable gate arrays (FPGAs) are being extensively used for a wide range of digital applications due to their flexibility and reprogrammability. This paper presents a FPGA implementation of the second -order... 详细信息
来源: 评论