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检索条件"主题词=Field-programmable gate array"
571 条 记 录,以下是421-430 订阅
排序:
A Simple and Improved Digital Timing Method for Positron Emission Tomography
A Simple and Improved Digital Timing Method for Positron Emi...
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IEEE Nuclear Science Symposium Conference 2009
作者: Hu, W. Choi, Y. Jung, J. H. Kang, J. H. Min, B. J. Huh, Y. S. Shin, S. H. Lim, H. K. Chung, Y. H. Sungkyunkwan Univ Sch Med Samsung Med Ctr Dept Nucl Med Seoul 135710 South Korea Sungkyunkwan Univ Dept Nucl Med Samsung Med Ctr Sch Med Seoul 135710 South Korea
A simple and improved digital timing method has been developed for positron emission tomography (PET). The so-called initial rise interpolation method is based on an important characteristic of gamma signal: a properl... 详细信息
来源: 评论
LDPC Codes Derived from Quasi-cyclic Code Design Suitable for Optical Communications  20
LDPC Codes Derived from Quasi-cyclic Code Design Suitable fo...
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20th International Conference on Transparent Optical Networks (ICTON)
作者: Sun, Xiaole Djordjevic, Ivan B. Univ Arizona Dept Elect & Comp Engn 1230 E Speedway Blvd Tucson AZ 85721 USA
We propose a rate-adaptive forward error correction (FEC) scheme based on spatially-coupled (SC) LDPC codes derived from quasi-cyclic (QC) LDPC codes with its field-programmable gate array (FPGA) architecture. By FPGA... 详细信息
来源: 评论
FPGA Implementation Scheme of Mixed Logarithmic domain FFT-BP Decoding Algorithm Based on Non-binary LDPC codes  37
FPGA Implementation Scheme of Mixed Logarithmic domain FFT-B...
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37th Chinese Control Conference (CCC)
作者: Wang, Ziyong Meng, Jiahui Deng, Zhibin Zhang, Liang Gao, Jingpeng Wuhan Maritime Commun Res Inst Wuhan 430000 Hubei Peoples R China Harbin Engn Univ Coll Informat & Commun Engn Harbin 150001 Heilongjiang Peoples R China
In this paper, an improved decoding algorithm for Non-binary low density parity check (NB-LDPC) codes with low decoding complexity and suitable for field-programmable gate array (FPGA) implementation is proposed, whic... 详细信息
来源: 评论
A computational approach to real-time image processing for serial time-encoded amplified microscopy
A computational approach to real-time image processing for s...
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Conference on High-Speed Biomedical Imaging and Spectroscopy - Toward Big Data Instrumentation and Management
作者: Oikawa, Minoru Hiyama, Daisuke Hirayama, Ryuji Hasegawa, Satoki Endo, Yutaka Sugie, Takahisa Tsumura, Norimichi Kuroshima, Mai Maki, Masanori Okada, Genki Lei, Cheng Ozeki, Yasuyuki Goda, Keisuke Shimobaba, Tomoyoshi Chiba Univ Inage Ku Yayoi Cho Chiba 2638522 Japan Univ Tokyo Bunkyo Ku Tokyo 1130033 Japan
High-speed imaging is an indispensable technique, particularly for identifying or analyzing fast-moving objects. The serial time-encoded amplified microscopy (STEAM) technique was proposed to enable us to capture imag... 详细信息
来源: 评论
FPGA-oriented Two-phase Bundled-data Circular Self-timed Pipeline  12
FPGA-oriented Two-phase Bundled-data Circular Self-timed Pip...
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12th International Symposium on Computing and Networking
作者: Yoshikawa, Senri Sannomiya, Shuji Iwata, Makoto Nishikawa, Hiroaki Univ Tsukuba Grad Sch Sci & Technol Tsukuba Ibaraki Japan Univ Tsukuba Inst Syst & Informat Engn Tsukuba Ibaraki Japan Kochi Univ Technol Sch Informat Kami Kochi Japan Univ Tsukuba Tsukuba Ibaraki Japan
Self-timed pipeline (STP) is an attractive circuit architecture because its local data transfer naturally realizes pipeline-stage-level signal gating and thus leads to high power-performance efficiency. A circular STP... 详细信息
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Hardware Redaction via Designer-Directed Fine-Grained eFPGA Insertion
Hardware Redaction via Designer-Directed Fine-Grained eFPGA ...
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Design, Automation and Test in Europe Conference and Exhibition (DATE)
作者: Mohan, Prashanth Atli, Oguz Sweeney, Joseph Kibar, Onur Pileggi, Larry Mai, Ken Carnegie Mellon Univ Dept Elect & Comp Engn Pittsburgh PA 15213 USA
In recent years, IC reverse engineering and IC fabrication supply chain security have grown to become significant economic and security threats for designers, system integrators, and end customers. Many of the existin... 详细信息
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High-Speed FPGA-GPU Processing for 3D-OCT Imaging  3
High-Speed FPGA-GPU Processing for 3D-OCT Imaging
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3rd IEEE International Conference on Computer and Communications (ICCC)
作者: Jin, Kyung-Chan Lee, Kye-Sung Kim, Geun-Hee Korea Inst Ind Tech Smart Mfg Tech Grp Cheonan Si South Korea Korea Basic Sci Inst Ctr Anal Inst Dev Daegeon Si South Korea
Three dimensional (3D) imaging using optical coherence tomography (OCT) is equipped with a field-programmable gate array and graphics processing unit (FPGA-GPU) acquisition and processing architecture, thereby making ... 详细信息
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Enhancing Memory Capacity of Reservoir Computing with Delayed Input and Efficient Hardware Implementation with Shift Registers
Enhancing Memory Capacity of Reservoir Computing with Delaye...
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IEEE International Symposium on Circuits and Systems (ISCAS)
作者: Hirayae, Soshi Yoshioka, Kanta Yokota, Atsuki Kawashima, Ichiro Tanaka, Yuichiro Katori, Yuichi Nomura, Osamu Morie, Takashi Tamukoh, Hakaru Kyushu Inst Technol Sch Engn Kitakyushu Fukuoka Japan Kyushu Inst Technol Grad Sch Life Sci & Syst Engn Kitakyushu Fukuoka Japan Kyushu Inst Technol Res Ctr Neuromorph AI Hardware Kitakyushu Japan Future Univ Hakodate Sch Syst Informat Sci Hakodate Hokkaido Japan
To use reservoir computing (RC) for practical tasks, both a high memory capacity and nonlinearity are required;however, some RC models have the problem of a low memory capacity. We propose a delay mechanism for increa... 详细信息
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Reactive and Harmonic Compensation Using the Conservative Power Theory  10
Reactive and Harmonic Compensation Using the Conservative Po...
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10th International Conference on Ecological Vehicles and Renewable Energies (EVER)
作者: Haugan, Thomas S. Tedeschi, Elisabetta Norwegian Univ Sci & Technol NTNU Dept Elect Power Engn OS Bragstads Plass 2E N-7491 Trondheim Norway
This paper explores the use of the conservative power theory for active shunt compensation, and provides experimental validation of reactive compensation and harmonic filtering. It is aimed to provide a more in-depth ... 详细信息
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Design and Implementation of High Speed QSPI Memory Controller
Design and Implementation of High Speed QSPI Memory Controll...
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4th IEEE International Conference on Electronics Information and Emergency Communication (ICEIEC)
作者: Wang, Xiaohu Huang, Zhaoming Spansion Inc Syst & Software Engn Beijing Peoples R China
This paper describes a new high speed Quad Serial Peripheral Interface (QSPI) NOR flash memory controller, which can work in a mixed single-data-rate/double-data-rate (SDRIDDR) mode. The proposed controller can suppor... 详细信息
来源: 评论