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NASA Technical Reports Server (Ntrs) 20120009206: a Robust Strategy for Total Ionizing Dose Testing of field programmable gate arrays

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2016年

NASA Technical Reports Server (Ntrs) 20120009206: a Robust Strategy for Total Ionizing Dose Testing of field programmable gate arrays by NASA Technical Reports Server (Ntrs); NASA Technical Reports Server (Ntrs); publ... 详细信息

关键词： (ntrs) 20120009206: arrays berg, melanie field field-programmable gate arrays flip-flops friendlich, mark ion irradiation ionization ionizing ionizing radiation kim, hak label, kenneth lakeman, joseph nasa technical reports server (ntrs) pellish, jonathan radiation damage radiation dosage radiation effects wilcox, edward

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NASA Technical Reports Server (Ntrs) 20150009416: the Use of field programmable gate arrays (Fpga) in Small Satellite Communication Systems

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2016年

NASA Technical Reports Server (Ntrs) 20150009416: the Use of field programmable gate arrays (Fpga) in Small Satellite Communication Systems by NASA Technical Reports Server (Ntrs); NASA Technical Reports Server (Ntrs)... 详细信息

关键词： (fpga) (ntrs) 20150009416: aerospace systems arrays casas, joseph communication cryptography data systems decoding field-programmable gate arrays loops nasa technical reports server (ntrs) packet transmission satellite communication sims, william herbert telecommunication varnavas, kosta

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NASA Technical Reports Server (Ntrs) 20150009433: the Use of field programmable gate arrays (Fpga) in Small Satellite Communication Systems

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2016年

NASA Technical Reports Server (Ntrs) 20150009433: the Use of field programmable gate arrays (Fpga) in Small Satellite Communication Systems by NASA Technical Reports Server (Ntrs); NASA Technical Reports Server (Ntrs)... 详细信息

关键词： (fpga) (ntrs) 20150009433: algorithms arrays casas, joseph communication computer programs field-programmable gate arrays nasa technical reports server (ntrs) pulsars radio equipment satellite communication signal processing sims, william herbert superhigh frequencies systems engineering telecommunication transponders varnavas, kosta

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NASA Technical Reports Server (Ntrs) 20060028135: Development of a Low-Cost and High-Speed Single Event Effects Testers Based on Reconfigurable field programmable gate arrays (Fpga)

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2016年

NASA Technical Reports Server (Ntrs) 20060028135: Development of a Low-Cost and High-Speed Single Event Effects Testers Based on Reconfigurable field programmable gate arrays (Fpga) by NASA Technical Reports Server (N... 详细信息

关键词： (fpga) (ntrs) 20060028135: arrays based berg, m. block diagrams channels (data transmission) field-programmable gate arrays friendlich, m. high speed howard, j. w. irwin, t. kim, h. label, k. a. low cost microelectronics nasa technical reports server (ntrs) single event upsets stansberry, s. systems analysis test equipment

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NASA Technical Reports Server (Ntrs) 20060021469: Evolutionary Based Techniques for Fault Tolerant field programmable gate arrays

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2016年

NASA Technical Reports Server (Ntrs) 20060021469: Evolutionary Based Techniques for Fault Tolerant field programmable gate arrays by NASA Technical Reports Server (Ntrs); NASA Technical Reports Server (Ntrs); publishe... 详细信息

关键词： (ntrs) 20060021469: algorithms arrays based circuits decoders evolutionary field-programmable gate arrays larchev, gregory v. lohn, jason d. multipliers nasa technical reports server (ntrs) quadratures redundancy technology utilization

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Towards hydrogen-powered electric aircraft: Physics-informed machine learning based multi-domain modeling and real-time digital twin emulation on FPGA

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ENERGY 2025年 322卷

作者： Zhang, Songyang Dinavahi, Venkata Liang, Tian Univ Alberta Dept Elect & Comp Engn Edmonton AB T6G 2V4 Canada CSG Elect Power Res Inst Co Ltd Guangzhou 510663 Guangdong Peoples R China

In response to environmental concerns related to carbon and nitrogen emissions, hydrogen-powered aircraft (HPA) are poised for significant development over the coming decades, driven by advances in power electronics technology. However, HPA systems present complex multi-domain challenges encompassing electrical, hydraulic, mechanical, and chemical disciplines, necessitating efficient modeling and robust validation platforms. This paper introduces a physics-informed machine learning (PIML) approach for multi-domain HPA system modeling, enhanced by hardware accelerated parallel hardware emulation to construct a real-time digital twin. It delves into the physical analysis of various HPA subsystems, whose equations form the basis for both traditional numerical solution methods like Euler's and Runge-Kutta methods (RKM), as well as the physics-informed neural networks (PINN) components developed herein. By comparing physics-feature neural networks (PFNN) and PINN with conventional neural network strategies, this paper elucidates their advantages and limitations in practical applications. The final implementation on the Xilinx (R) UltraScale+TM VCU128 FPGA platform showcases the PIML method's high efficiency, accuracy, data independence, and adherence to established physical laws, demonstrating its potential for advancing real-time multi-domain HPA emulation.

关键词： Digital twin field-programmable gate arrays Hydrogen-powered aircraft Machine learning Multi-domain system Physics-informed neural networks Real-time systems

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The Data Acquisition System of WEST's New Thomson Scattering Diagnostics

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IEEE TRANSACTIONS ON NUCLEAR SCIENCE 2025年第3期72卷 575-583页

作者： Bouchand, Christophe Moudden, Yassir Delagnes, Eric Chaminade, Thomas Barbuti, Alain Carole, Mathieu Colledani, Gilles Fedorczak, Nicolas Magnino, Alexandre Moureau, Gilles Sabot, Roland Schiesko, Loic Vincent, Benoit CEA IRFM F-13108 St Paul Les Durance France Univ Paris Saclay CEA IRFU F-91191 Gif Sur Yvette France

WEST, the Tungsten Environment in Steady-state Tokamak at IRFM (France), is currently being equipped with two new plasma-monitoring systems based on Thomson scattering. Nearly 50 optical viewing lines will be installed to collect scattered light near the core plasma region and in the plasma pedestal. The collected light pulses are forwarded along optical fiber bundles to polychromators where they are optically filtered into five channels and converted to swift electrical pulses. A custom fast digitizer board adapted to the polychromators was designed to capture these signals. This Nectarine board provides six triggered fast channels to catch the scattered pulse shape at 1-3.2 GS/s, thanks to three Nectar chips. Six additional ADC channels provide a slower sampling rate for background monitoring. This contribution describes and discusses the performances of the real-time data acquisition and processing system (PS), especially the Nectarine board, designed specifically for WEST's new Thomson scattering diagnostics (TSDs).

关键词： Plasmas Data acquisition Scattering Electrons Optical scattering Measurement by laser beam Tokamak devices Real-time systems Free electron lasers Costs field-programmable gate arrays plasma control real-time systems ring sampler switched capacitor circuits system-on-chip (SoC) Thomson scattering Tokamak

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The Prism Bridge: Maximizing Inter-Chip AXI Throughput in the High-Speed Serial Era

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IEEE ACCESS 2023年 11卷 50867-50883页

作者： Drehmel, Robert Heiss, Hans-Ulrich Tech Univ Berlin Inst Telecommun Syst Fac Elect Engn & Comp Sci 4 D-10623 Berlin Germany

In this paper, we present the Prism Bridge, a soft IP core developed to bridge FPGA-MPSoC systems using high-speed serial links. Considering the current trend of ubiquitous serial transceivers with staggeringly increasing line rates, minimizing overhead and maximizing data throughput becomes paramount. Hence, our main design goal is to maximize bandwidth utilization for AXI data, which we realize through an advanced packetization mechanism. We give an overview of the Prism Bridge's design and analyze its half-duplex bandwidth utilization. Additionally, we discuss the results of the experiments we conducted to assess its real-world performance, including measurements of throughput and latency of various combinations of line rates, link-layer cores, and bridge cores. Using a serial link with a 16.375 Gbit/s line rate, the Prism Bridge with an advanced packetizing mechanism achieved an AXI write throughput of 1368.81 MiB/s and an AXI read throughput of 1376.61 MiB/s, an increase of 46.19% and 45.85%, respectively, compared with the de-facto industry-standard core. The advanced packetization mechanism had negligible impact on latency but required 69.14%-73.91% more LUTs and 33.62%-36.19% more flip-flops. We conclude that for most designs that support inter-chip AXI transactions and will not be limited to short transaction lengths, the higher data throughput of the Prism Bridge with an advanced packetization mechanism is worth its cost in additional logic resource utilization.

关键词： Clustering methods Magnetosphere Ion radiation effects Throughput Protocols Bandwidth field programmable gate arrays Computer architecture Cluster computing computer architecture field-programmable gate arrays high-speed serial inter-chip axi communication protocols

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Real-time architecture for channel estimation and equalization in broadband PLC

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MICROPROCESSORS AND MICROSYSTEMS 2019年 65卷 121-135页

作者： Nombela, Francisco Garcia, Enrique Mateos, Raid Hernandez, Alvaro Univ Alcala Dept Elect E-28805 Madrid Spain

Broadband Power Line Communications (PLC) is an attractive area for providing broadband access in facilities where mains are already deployed, such as factories, buildings, houses, etc. In such systems, the design of efficient algorithms for synchronization, channel estimation and equalization is of great importance for reliable communications. Although there is a large amount of research done in channel estimation and equalization for wireless communication systems, the PLC channel has particular features that prevent from directly applying the techniques often used in wireless systems. In this way, PLC channels commonly present frequency selective fading, impulsive noise and coloured noise. Furthermore, some previous algorithms have effectively dealt with undesired channel effects but they imply a high computational complexity and cost, thus limiting their practical applicability. This work proposes real-time FPGA-based (field-programmable gate Array) architecture, designed to implement channel estimation and equalization in broadband PLC. The approach is based on a Wavelet-OFDM (Orthogonal Frequency Division Multiplexing) modulation, also known as FBMC (Filter Bank Multi-Carrier), where cross-correlation techniques have been applied on the Zadoff-Chu sequences used as pilot signals or preambles. The architecture has been implemented in a Xilinx XC7K325T FPGA, and experimental tests in a lab environment successfully show that the proposal can effectively recover the transmitted signals. (C) 2019 Elsevier B.V. All rights reserved.

关键词： Power line communications Wavelet-OFDM Channel estimation and equalization field-programmable gate arrays

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System-on-chip field-programmable gate array design for onboard real-time hyperspectral unmixing

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JOURNAL OF APPLIED REMOTE SENSING 2016年第1期10卷

作者： Nascimento, Jose M. P. Vestias, Mario Inst Politecn Lisboa Inst Super Engn Lisboa Rua Conselheiro Emidio Navarro P-1959007 Lisbon Portugal Inst Telecomunicacoes Lisbon Portugal Inst Engn Sistemas & Comp Invest & Desenvolviment Lisbon Portugal

Hyperspectral instruments have been incorporated in satellite missions, providing large amounts of data of high spectral resolution of the Earth surface. This data can be used in remote sensing applications that often require a real-time or near-real-time response. To avoid delays between hyperspectral image acquisition and its interpretation, the last usually done on a ground station, onboard systems have emerged to process data, reducing the volume of information to transfer from the satellite to the ground station. For this purpose, compact reconfigurable hardware modules, such as field-programmable gate arrays (FPGAs), are widely used. This paper proposes an FPGA-based architecture for hyperspectral unmixing. This method based on the vertex component analysis (VCA) and it works without a dimensionality reduction preprocessing step. The architecture has been designed for a low-cost Xilinx Zynq board with a Zynq-7020 system-on-chip FPGA-based on the Artix-7 FPGA programmable logic and tested using real hyperspectral data. Experimental results indicate that the proposed implementation can achieve real-time processing, while maintaining the methods accuracy, which indicate the potential of the proposed platform to implement high-performance, low-cost embedded systems, opening perspectives for onboard hyperspectral image processing. (C) 2016 Society of Photo-Optical Instrumentation Engineers (SPIE)

关键词： hyperspectral unmixing vertex component analysis field-programmable gate arrays onboard processing real time

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