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Sulfur surface chemistry on the platinum gate of a silicon carbide based hydrogen sensor

JOURNAL OF APPLIED PHYSICS 2007年第6期102卷 064505.1-064505.9页

作者： Kahng, Yung Ho Tobin, R. G. Loloee, Reza Ghosh, Ruby N. Tufts Univ Dept Phys & Astron Medford MA 02155 USA Michigan State Univ Dept Phys & Astron E Lansing MI 48824 USA

We have investigated the effects of sulfur contamination on a Pt-gate silicon carbide based field-effect gas sensor, under ultrahigh vacuum conditions, at a temperature of 527 degrees C. Exposure to hydrogen sulfide, even in the presence of hydrogen or oxygen at partial pressures of 20-600 times greater than the H2S level, rapidly coated the gate with a monolayer of sulfur. Sulfur contamination reduced the magnitude of the sensor's response to alternating hydrogen and oxygen pulses by about 70%, as compared to the uncontaminated gate. There was no evidence of irreversible changes in device behavior due to sulfur deposition and removal. The adsorbed sulfur could not be removed by exposure to hydrogen at the pressures accessible. Oxygen was effective at removing the sulfur. The rate of sulfur oxidation was suppressed at high sulfur coverages, but not as strongly as on low-index single-crystal surfaces. These results are discussed in the context of prior experiments on Pt crystals and films.

关键词： HYDROGEN sulfide PLATINUM SILICON carbide gate array circuits SURFACE chemistry

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Modeling and simulation for the enhancement of electron storage in a stacked multilayer nanocrystallite silicon floating gate memory

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JOURNAL OF APPLIED PHYSICS 2007年第1期102卷 014501-1-014501-6页

作者： Yu, L. W. Chen, K. J. Ding, H. L. Xu, J. Liu, K. Li, W. Wang, X. Huang, X. F. Nanjing Univ Natl Lab Solid State Microstruct Nanjing 210093 Peoples R China Nanjing Univ Dept Phys Nanjing 210093 Peoples R China

In this article, we investigate the storage enhancement mechanism of stacked multilayer nanocrystallite silicon (nc-Si) structures in a master-equation-based equivalent circuit model. As a theoretical extension from our previous experimental works, we reveal the detail injection sequence of electrons into the multilayer nc-Si structure via a direct tunneling process, and how the retention property is enhanced by the stacked structures. Seeking a further improvement in the multilayer nc-Si-based nonvolatile memory structure, we compare two major approaches for that purpose, i.e. (1) by further increasing the number of stacked layers or (2) by adopting an asymmetric double-layer structure. It is shown that the latter is more promising for achieving better nonvolatile storage property and shows a more effective threshold shifting, while retaining the virtues of direct tunneling process like fast write/erase and low operation voltage. We suggest that these results provide important guides for practical design of memory devices based on multilayer nc-Si floating gate structures. (c) 2007 American Institute of Physics.

关键词： TUNNELING (Physics) ELECTRIC conductivity NANOCRYSTALS SILICON FERROELECTRIC storage cells gate array circuits

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High noon for FPGAs: Low-cost-versus-high-end showdown

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EDN 2007年第23期52卷 37-+页

作者： Santarini, Michael

Although the market for high-end, high-priced SRAM-based FPGAs has matured into a gentlemanly duel between FPGA veterans Xilinx Inc and Altera Corp, the emerging low-cost-FPGA market has turned into the FPGA industry's version of the Gunfight at the OK Corral Companies including Lattice Semiconductor and Actel Corp are fighting it out with each other as well as with Xilinx and Altera, increasingly adding advanced functions - traditionally the province of high-end, high-priced FPGAs - to their low-cost-FPGA families. In the very-high-end-FPGA market, customers mainly have a choice between either Xilinx's Virtex devices or Altera's Stratix family. In the low-cost-FPGA market, however, customers have many more choices and benefit from the stepped-up competition between the many vendors fighting it out for FPGA revenue. Today, customers can buy 1 million-gate FPGAs with high-speed I/O and processor or DSP capabilities for much less than USD100 in low volumes and for tens of dollars in high volumes.

关键词： Integrated circuits Field programmable gate arrays Competition gate array circuits Programmable logic devices

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Self-reconfigurable embedded systems on low-cost FPGAs

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IEEE MICRO 2007年第4期27卷 49-57页

作者： Gonzalez, Ivan Aguayo, Estanislao Lopez-Buedo, Sergio Univ Autonoma Madrid Dept Comp Engn E-28049 Madrid Spain George Washington Univ Washington DC 20052 USA CIEMAT Madrid Spain

Hardware acceleration significantly increases the performance of embedded systems built on programmable logic. Allowing an fpga-based microblaze processor to self-select the coprocessors it uses can help reduce area requirements and increase a system's versatility. With a simple hardware arrangement, requiring only a few external connections and no additional components, low-cost fpgas such as xilink's spartan-3 can become selfreconfigurable platforms.

关键词： EMBEDDED computer systems INTEGRATED circuits FIELD programmable gate arrays gate array circuits PROGRAMMABLE logic devices COPROCESSORS MICROPROCESSORS COMPUTER input-output equipment ALGORITHMS

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All-optical digital 3-input AND gate using sum- and difference-frequency generation in PPLN waveguide

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ELECTRONICS LETTERS 2007年第7期43卷 409-410页

作者： McGeehan, J. E. Giltrelli, M. Willner, A. E. Univ So Calif Dept Elect Engn Syst Los Angeles CA 90089 USA Univ Padua Dept Informat Engn I-35100 Padua Italy

Demonstrated is an all-optical hit-wise 3-input AND gate using a single periodically-poled-lithium-niobate (PPLN) waveguide as a nonlinear optical element. The module generates Output '1' bits only when all in... 详细信息

关键词： OPTICAL amplifiers OPTICAL spectroscopy LITHIUM niobate WAVEGUIDES OPTOELECTRONIC devices gate array circuits

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Configuration errors analysis in SRAM-based FPGAs: Software, tool and practical results

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MICROELECTRONICS RELIABILITY 2007年第9-11期47卷 1836-1840页

作者： Maingot, V. Ferron, J. B. Leveugle, R. Pouget, V. Douin, A. TIMA Lab F-38031 Grenoble France IMS Lab F-33402 Talence France

The reconfigurability of SRAM-based FPGAs has also some drawbacks, especially when used in systems requiring a high level of safety and/or dependability. Dealing with single-event effects is an important issue in these systems. This paper presents a software tool to analyze a bit-stream and the functional effects of errors in it. Results of analyzes are presented, based on experiments using a laser platform to inject faults in the circuit. (C) 2007 Elsevier Ltd. All rights reserved.

关键词： COMPUTER storage devices FIELD programmable gate arrays gate array circuits PROGRAMMABLE logic devices

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Efficient FPGA implementation of bit-stream multipliers

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ELECTRONICS LETTERS 2007年第9期43卷 496-497页

作者： Ng, C. W. Wong, N. Ng, T. S. Univ Hong Kong Dept Elect & Elect Engn Hong Kong Hong Kong Peoples R China

A four-input adder structure for the FPGA implementation of a sigma-delta bit-stream multiplier is proposed. Conventional bit-stream multiplier implementations involve two-input adder circuits. It is shown that the four-input adder structure is more resource-efficient (over 40% hardware savings) and faster (over 20% higher clock frequency) when implemented using state-of-the-art FPGA architecture featuring six-input look-up tables.

关键词： FIELD programmable gate arrays ELECTRONIC circuits ELECTRIC circuits gate array circuits PROGRAMMABLE logic devices

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Topological quantum gate entanglers for a multi-qubit state

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JOURNAL OF PHYSICS A-MATHEMATICAL AND THEORETICAL 2007年第32期40卷 9877-9882页

作者： Heydari, Hoshang Nihon Univ Inst Quantum Sci Chiyoda Ku Tokyo 1018308 Japan

We establish a relation between topological and quantum entanglement for a multi-qubit state by considering the unitary representations of the Artin braid group. We construct topological operators that can entangle a multi-qubit state. In particular we construct operators that create quantum entanglement for multi-qubit states based on the Segre ideal of complex multi-projective space. We also discuss in detail and construct these operators for two-qubit and three-qubit states.

关键词： gate array circuits ENERGY levels (Quantum mechanics) REPRESENTATIONS of algebras OPERATOR theory TOPOLOGICAL spaces

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Improved high-field reliability for a SiC metal-oxide-semiconductor device by the incorporation of nitrogen into its HfTiO gate dielectric

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JOURNAL OF APPLIED PHYSICS 2007年第5期102卷 054515.1-054515.5页

作者： Lin, L. M. Lai, P. T. Univ Hong Kong Dept Elect & Elect Engn Hong Kong Hong Kong Peoples R China

Materials with high dielectric constant (k) have been used in SiC-based metal-oxide-semiconductor (MOS) devices to reduce the electric field in the gate dielectric and thus suppress a high-field reliability problem. In this work, high-k gate dielectrics HfxTi1-xO2 and HfxTi1-xON are applied in SiC MOS devices and an ultrathin thermally grown SiO2 is used as an interlayer between SiC and the high-k materials to block electron injection from SiC into the low-barrier high-k materials. Incorporating nitrogen into the Hf-Ti oxide (by adding nitrogen gas during its sputtering) stacked with a SiO2 interlayer (HfxTi1-xO/SiO2) results in a better gate dielectric for the MOS capacitor, such as smaller frequency dispersion in the capacitance-voltage curve, less oxide charges, and better interface quality. Moreover, the nitrogen incorporation increases the dielectric constant of the oxide, but causes higher dielectric leakage, which can be suppressed by the SiO2 interlayer. High-field stress under constant electric field is performed on the stacked/nonstacked Hf-Ti oxides and oxynitrides, and it turns out that the two oxynitrides show a much smaller flatband shift and a less stress-induced leakage current compared with the two oxides. Based on these results, the HfxTi1-xON/SiO2 stack could be a promising high-k gate dielectric for SiC MOS devices with enhanced reliability. (c) 2007 American Institute of Physics.

关键词： METAL oxide semiconductors ELECTROMAGNETIC fields DIELECTRIC devices gate array circuits THIN films

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Elementary gates for cartoon computation

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JOURNAL OF PHYSICS A-MATHEMATICAL AND THEORETICAL 2007年第31期40卷 F753-F759页

作者： Czachor, Marek Gdansk Tech Univ Katedra Fis Teoretycznej & Informat Kwantowej PL-80952 Gdansk Poland

The basic one-bit gates (X, Y, Z, Hadamard, phase, p/8) as well as the controlled CNOT and Toffoli gates are reformulated in the language of geometric-algebra quantum-like computation. Thus, all the quantum algorithms... 详细信息

关键词： gate array circuits GEOMETRIC analysis QUANTUM theory ALGORITHMS MATHEMATICAL physics TENSOR products

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