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Majority logic gate for magnetic quantum-dot cellular automata

SCIENCE 2006年第5758期311卷 205-208页

作者： Imre, A Csaba, G Ji, L Orlov, A Bernstein, GH Porod, W Univ Notre Dame Dept Elect Engn Ctr Nano Sci & Technol Notre Dame IN 46556 USA Tech Univ Munich Inst Nanoelect D-80333 Munich Germany

We describe the operation of, and demonstrate logic functionality in, networks of physically coupled, nanometer-scale magnets designed for digital computation in magnetic quantum-dot cellular automata (MQCA) systems. MQCA offer low power dissipation and high integration density of functional elements and operate at room temperature. The basic MQCA logic gate, that is, the three-input majority logic gate, is demonstrated.

关键词： gate array circuits CELLULAR automata MAGNETISM QUANTUM theory NANOSTRUCTURED materials MAGNETS MAGNETIC materials INTEGRATED circuits SEQUENTIAL machine theory

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Pulling strings

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SCIENCE 2006年第5805期314卷 1552-1553页

作者： Fontana, Walter Harvard Univ Dept Syst Biol Boston MA 02115 USA

In the past decade, DNA or RNA sequences have been used to find solutions in combinatorial problems by self-assembly to encode complete decision trees for simple games like tic-tac-toe and to build programmable sensors of cellular states. Fontana discusses a toolkit of DNA-based devices which can be used for computational circuits.

关键词： DNA gate array circuits NUCLEOTIDE sequence SUBSTITUTION reactions NUCLEIC acid analysis INTEGRATED circuits GENES CHEMICAL reactions NUCLEOTIDE analysis

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Where have all the transistors gone?

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SCIENCE 2006年第5758期311卷 183-184页

作者： Cowburn, RP Univ London Imperial Coll Sci Technol & Med Blackett Phys Lab London SW7 2BW England

A universal logic gate has been constructed with magnetic nanostructures. Such devices could lead to a new generation of microelectronics.

关键词： gate array circuits MICROELECTRONICS DIGITAL electronics NANOSTRUCTURES TRANSISTORS ELECTRONS INTEGRATED circuits SPINTRONICS CELLULAR automata

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Extendable and dynamically reconfigurable multi-protocol firewall

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INTERNATIONAL JOURNAL OF SOFTWARE ENGINEERING AND KNOWLEDGE ENGINEERING 2005年第2期15卷 363-371页

作者： Ly, S Bigdeli, A Univ Auckland Dept Elect & Comp Engn Embedded Syst Res Grp Auckland 1 New Zealand

Security issues within a networking environment are critical, as attacks or intrusions can come from many different sources. Firewalls are an effective tool used for intrusion detection and provide protection against attacks on a system or network. In the past, protection barriers for a local network have been provided using software solutions. Emerging multi-gigabit networking technology and the high uptake of gigabit Ethernet has rendered these solutions inefficient as it cannot cope with the high data rate. In this paper, a new approach using reconfigurable hardware such as Field Programmable gate arrays is proposed to provide the flexibility and performance required for a gigabit firewall. The solution is extendable, has low cost and is capable of scanning multiple protocols. The design approach will allow it to be easily ported over to another family of chips with no or minor modification.

关键词： FIREWALLS (Computer security) COMPUTER network security COMPUTER security ETHERNET (Local area network system) FIELD programmable gate arrays gate array circuits PROGRAMMABLE logic devices

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Good one-shot is based on an LVDS receiver

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Electronic Design 2005年第28期53卷 59-60页

作者： Morong, William H.

An one-shot circuit which uses a low-voltage differential-signaling (LVDS) receiver to perform an otherwise difficult comparator function, is presented. For long pulse durations using slow transitions, an LVDS receiver helps make a good one-shot circuit for 3.3-V system. It is found that the actual prototyped circuit, which had an output pulse duration of 93 ns, with no variation over a 25°C to 50°C temperature range. A number of other configurations of this circuit are theoretically possible, but most LVDS receivers include a 'fail-safe' function that forms an implied AND gate between their inputs and outputs.

关键词： MULTIVIBRATORS SWITCHING systems (Telecommunication) RELAXATION oscillators ELECTRONIC circuit design INTEGRATED circuits ELECTRONICS COMPLEMENTARY metal oxide semiconductors gate array circuits PROTOTYPES

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Digital field programmable gate array-based lock-in amplifier for high-performance photon counting applications

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REVIEW OF SCIENTIFIC INSTRUMENTS 2005年第9期76卷 3112-1-3112-8页

作者： Restelli, A Abbiati, R Geraci, A Politecn Milan Dept Elect & Informat Technol I-20133 Milan Italy

In the past few years the availability of low-cost, high-performance digital configurable devices [digital signal processors (DSP) and field programmable gate arrays (FPGAs) above all] has extended the application of digital signal processing to a larger field of instrumentation. In particular, the phase-sensitive detection (PSD) technique, which is at the heart of lock-in amplifiers, substantially benefits from digital implementation, especially by the use of configurable devices, both in terms of architectural efficiency and achievable performance. In this paper we describe the design and realization of a digital lock-in amplifier devoted to high-performance photon counting applications based on a PSD section implemented in a FPGA device. Among the main features of the proposed digital instrument are reconfigurability, a wide range of operative parameters, very large functional performances, and extremely low cost. The prototype has been experimentally tested and the results fully comply with the goal design specifications. (c) 2005 American Institute of Physics.

关键词： FIELD programmable gate arrays PHOTON detectors PHOTONS gate array circuits SCIENTIFIC apparatus & instruments

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A high-speed optical mark reader hardware implementation at low cost using programmable logic

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REAL-TIME IMAGING 2005年第1期11卷 19-30页

作者： Hussmann, S Deng, PWP Univ Appl Sci Westkuste Dept Elect Engn & Informat Technol D-25746 Heide Germany Univ Auckland Sch Engn Dept Elect & Comp Engn Auckland 1 New Zealand

In today's fast-paced information-driven society, the need for accurate, timely, and cost-effective data collection is very critical. Optical mark reader (OMR) systems can be used to achieve these aspects. This paper describes the development of a low-cost and high-speed OMR system prototype for marking multiple-choice questions. The novelty of this approach is the implementation of the complete system into a single low-cost Field Programmable gate array (FPGA) to achieve the high processing speed. Effective mark detection and verification algorithms have been developed and implemented to achieve real-time performance at low computational cost. The OM R is capable of processing a high-resolution CCD linear sensor with 3456 pixels at 5000 frame/s at the effective maximum clock rate of the sensor of 20 MHz (4 x 5 MHz). The performance of the prototype system is tested for different marker colours and marking methods. At the end of the paper the proposed OMR system is compared with commercially available systems and the pro and cons are discussed. (c) 2005 Elsevier Ltd. All rights reserved.

关键词： FIELD programmable gate arrays COST effectiveness gate array circuits DIGITAL cameras

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A counterbased field programmable gate array implementation of the one-bit autocorrelation and cross-correlation functions

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REVIEW OF SCIENTIFIC INSTRUMENTS 2005年第9期76卷 094701-1-094701页

作者： Pouchet, M Seferiadis, G Huber, N Gough, MP Univ Sussex Ctr Space Sci Brighton BN1 9QT E Sussex England

In this article we describe a novel design of the fixed-length, one-bit autocorrelation function (ACF) using a Spartan XC2S300 field programmable gate array (FPGA). It has been implemented both asynchronously and synchronously following the same underlying architectural concept. Although some problems arose in the asynchronous case due to the nature of the design, these were overcome with a synchronous architecture. With this new design method there has been a ninefold reduction in terms of FPGA active area usage for the implementation of the algorithm compared to the more traditional approach. At the same time there has also been a fivefold increase in speed, reaching 250 MHz compared with the previous 47 MHz. (c) 2005 American Institute of Physics.

关键词： FIELD programmable gate arrays gate array circuits PROGRAMMABLE logic devices LOGIC devices SCIENTIFIC apparatus & instruments RESEARCH -- Equipment & supplies

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Impact of technology scaling on the 1/f noise of thin and thick gate oxide deep submicron NMOS transistors

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IEE PROCEEDINGS-circuits DEVICES AND SYSTEMS 2004年第5期151卷 415-421页

作者： Chew, KW Yeo, KS Chu, SF Chartered Semicond Mfg Ltd Singapore 738406 Singapore Nanyang Technol Univ Sch Elect & Elect Engn Singapore 639798 Singapore

This study discusses the composite effect of channel length and gate oxide thickness scaling, coupled with the effect of gate dielectric nitridation on the 1/f noise of minimum channel length NMOS transistors. These transistors have been taken from four advance CMOS technologies with dual gate oxide thickness. The result shows that the current noise spectral density S-Id of a thin gate oxide transistor increases by approximately 1.5 orders of magnitude when scaling from 350 ran to 130 nm. This increase is closely correlated to the changeover from thermal oxides to nitrided oxides from 250 nm and below. This work also investigates the effect of nitridation on thick gate oxide transistors and compares them to their architecturally equivalent thin gate oxide non-nitrided counterpart from 350 nm technology. The comparison reveals that nitridation has increased the S-Id of architecturally equivalent thick gate oxide transistors from 250 nm to 130 nm technologies by a maximum of 1.25 orders of magnitude. The experimental 1/f noise trends have been verified with simulations using the BSIM3v3 flicker noise model.

关键词： MICROELECTRONICS NOISE METAL oxide semiconductor field-effect transistors NITRIC oxide gate array circuits SEMICONDUCTORS

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Low-frequency noise in polymer thin-film transistors

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IEE PROCEEDINGS-circuits DEVICES AND SYSTEMS 2004年第5期151卷 466-472页

作者： Marinov, O Deen, MJ Yu, J Vamvounis, G Holdcroft, S Woods, W McMaster Univ Dept Elect & Comp Engn Hamilton ON L8S 4K1 Canada Simon Fraser Univ Dept Chem Vancouver BC V5A 1S6 Canada Simon Fraser Univ Sch Engn Sci Vancouver BC V5A 1S6 Canada

The low-frequency noise (LFN) properties of the polymer field effect transistors (PFETs) using polymer semiconducting material are investigated and discussed in terms of the charge carrier transport. Results obtained from several research groups are summarised. A general trend of proportionality between noise power density and the DC power applied to the PFET channel is observed in the data from publications. This trend implies that the mobility fluctuation in the PFET is the dominant noise source.

关键词： MICROELECTRONICS NOISE FIELD-effect transistors POLYMERS THIN film transistors gate array circuits

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