This paper presents an implementation of h.264decoder on a 16-core ***-core architecture emerges as a good solution to tackle with substantially increasing computation complexity in media applications.A dramatic spee...
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This paper presents an implementation of h.264decoder on a 16-core ***-core architecture emerges as a good solution to tackle with substantially increasing computation complexity in media applications.A dramatic speedup can be achieved utilizing task-level, thread-level and data-level *** the core number increases,the inter-corecommunications draws more *** integrate bothshared-memory and massage-passing inter-corecommunications in mapping h.264 ***,our approach achieves good energy *** realized h.264decoder with throughput of 30fps@720p consumes 506mW when the processor runs at 750Mhz with voltage supply of 1.2V.
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