Channel coding is an important building block in communication systems since it ensures the quality of service. Irregular Repeat-Accumulate (ira) codes belong to the class of Low-Density Parity-Check (LDPC) codes and ...
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(纸本)0780385047
Channel coding is an important building block in communication systems since it ensures the quality of service. Irregular Repeat-Accumulate (ira) codes belong to the class of Low-Density Parity-Check (LDPC) codes and can even outperform the recently introduced Turbo-codes of current communication standards. implementation complexity like area, achievable throughput of these channel coding schemes will have a major impact on the decision of standardization committees. In this paper we investigate implementation issues of iracodes and analyze the strong interdependency of code performance and architectural dependencies, like throughput and area. We present an architecture template which is capable to decodehardware optimized iracodes which can outperform Turbo-codes (TC). We demonstrate this new approach through instances synthesized in a 0.13 mum technology.
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