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GPU Parallelization of HEVC in-loop filters

INTERNATIONAL JOURNAL OF PARALLEL PROGRAMMING 2017年第6期45卷 1515-1535页

作者： Wang, Biao de Souza, Diego F. Alvarez-Mesa, Mauricio Chi, Chi Ching Juurlink, Ben Ilic, Aleksandar Roma, Nuno Sousa, Leonel Tech Univ Berlin AES Einsteinufer 17 D-10587 Berlin Germany Univ Lisbon IST INESC ID Rua Alves Redol 9 P-1000029 Lisbon Portugal

In the High Efficiency Video Coding (HEVC) standard, multiple decoding modules have been designed to take advantage of parallel processing. In particular, the HEVC in-loop filters (i.e., the deblocking filter and sample adaptive offset) were conceived to be exploited by parallel architectures. However, the type of the offered parallelism mostly suits the capabilities of multi-core CPUs, thus making a real challenge to efficiently exploit massively parallel architectures such as Graphic Processing Units (GPUs), mainly due to the existing data dependencies between the HEVC decoding procedures. In accordance, this paper presents a novel strategy to increase the amount of parallelism and the resulting performance of the HEVC in-loop filters on GPU devices. For this purpose, the proposed algorithm performs the HEVC filtering at frame-level and employs intrinsic GPU vector instructions. When compared to the state-of-the-art HEVC in-loop filter implementations, the proposed approach also reduces the amount of required memory transfers, thus further boosting the performance. Experimental results show that the proposed GPU in-loop filters deliver a significant improvement in decoding performance. For example, average frame rates of 76 frames per second (FPS) and 125 FPS for Ultra HD 4K are achieved on an embedded NVIDIA GPU for All Intra and Random Access configurations, respectively.

关键词： High Efficiency Video Coding (HEVC) Graphics Processor Unit (GPU) in-loop filters Parallelization Decoder

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VVC in-loop filters

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IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS FOR VIDEO TECHNOLOGY 2021年第10期31卷 3907-3925页

作者： Karczewicz, Marta Hu, Nan Taquet, Jonathan Chen, Ching-Yeh Misra, Kiran Andersson, Kenneth Yin, Peng Lu, Taoran Francois, Edouard Chen, Jie Qualcomm Inc San Diego CA 92121 USA Canon F-35510 Cesson Sevigne France Xiaomi Beijing 100085 Peoples R China MediaTek Multimedia Technol Dev Div Hsinchu 30078 Taiwan Sharp Labs Amer Vancouver WA 98683 USA Ericsson S-16483 Stockholm Sweden Dolby Labs Inc Imaging Appl Res Sunnyvale CA 94085 USA Dolby Labs Inc Adv Technol Grp Sunnyvale CA 94085 USA InterDigital F-35510 Cesson Sevigne France Alibaba Beijing 100102 Peoples R China

This paper presents an overview of the technologies for in-loop processing and filtering in the Versatile Video Coding (VVC) standard. These processes comprise luma mapping with chroma scaling, deblocking filter, sample adaptive offset, adaptive loop filter and cross-component adaptive loop filter. They are qualified as "in-loop" because they are applied inside the encoding and decoding loops, before storing the pictures in the decoded picture buffer. The filters are complementary and address different purposes. Luma mapping with chroma scaling aims at adaptively modifying the coded samples distribution for improved coding efficiency. The deblocking filter aims at reducing blocking discontinuities. Sample adaptive offset mostly aims at reducing artifacts resulting from the quantization of transform coefficients. Adaptive loop filter and cross-component adaptive loop filter are adaptive filters enabling to enhance the reconstructed signal, using for instance Wiener-filter encoding approaches. The paper provides an overview of the in-loop filtering process and a detailed description of the filtering algorithms. Objective compression efficiency results are provided for each filter, with indication of cumulative coding gains. Subjective benefits are illustrated. Implementation issues considered during the design of the VVC in-loop filters are also discussed.

关键词： Encoding Adaptive filters Maximum likelihood detection Nonlinear filters Filtering Shape Decoding Video coding in-loop filters adaptive loop filter cross-component adaptive loop filter deblocking luma mapping with chroma scaling Versatile video coding

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Derivation and Design of in-loop filters in Phase-Locked loop Systems

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IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT 2012年第4期61卷 930-940页

作者： Karimi-Ghartemani, Masoud Khajehoddin, Sayed Ali Jain, Praveen K. Bakhshai, Alireza Queens Univ Dept Elect & Comp Engn Kingston ON K7L 3N6 Canada SPARQ Syst Inc Kingston ON K7L 3N6 Canada

This paper addresses the concept of in-loop filters in phase-locked loop (PLL) systems. The in-loop filters are derived from an optimization perspective, and an analytical method to design the controlling parameters of a PLL with in-loop filters is also presented. Such filters can also be selected as conventional window functions in which case they can be tuned to reject certain frequency components similar to the discrete Fourier transform. In this paper, a rigorous method to introduce the concept of in-loop filters and window functions into PLL systems is presented. This method enables smoother estimation of the signal parameters such as phase angle, frequency, and amplitude in the presence of noise and harmonics. The in-loop filters can be adjusted to completely remove specific harmonics. The method is first developed for a single-phase enhanced PLL system and is then extended to three-phase PLLs including the well-known synchronous-reference-frame PLL. Simulation and experimental results are also included.

关键词： Discrete Fourier transform (DFT) enhanced phase-locked loop (PLL) (EPLL) in-loop filters Newton's method PLL windowing

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Comparative study of frame-compatible stereo 3D services and a novel method for spatial interleaving using HEVC

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JOURNAL OF VISUAL COMMUNICATION AND IMAGE REPRESENTATION 2015年 26卷 200-209页

作者： Guruvareddiar, Palanivel Joseph, Biju K. TATA ELXSI Ltd Bangalore 560048 Karnataka India

There are a number of ways to realize frame-compatible stereo 3D services, which includes the spatial and temporal interleaving based methods. We first present the detailed analysis of these methods with respect to compression efficiency, backward compatibility and the ability to re-use existing infrastructure. Simulations have been set up to benchmark the Rate-Distortion (R-D) performance of these options with the state-of-the-art Multiview Video Coding (MVC) and results show that temporal interleaving based method performs better when compared to spatial interleaving in both H.264/AVC as well as in HEVC compression schemes, with MVC still outperforms both the methods. In the case of the spatial interleaving method using HEVC, we propose to encapsulate the two views in different tiles with filters turned off across the tile boundary. Simulation results show that the proposed method, when compared to "no-tiles" case, improves decoder performance by approximately 50% with no reduction in R-D performance. (C) 2014 Elsevier Inc. All rights reserved.

关键词： H.264/AVC HEVC Stereoscopic 3D MVC SVC-TS Multiview video coding in-loop filters 3D video coding standards

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Joint Pixel and Frequency Feature Learning and Fusion via Channel-Wise Transformer for High-Efficiency Learned In-loop Filter in VVC

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IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS FOR VIDEO TECHNOLOGY 2024年第5期34卷 4070-4083页

作者： Kathariya, Birendra Li, Zhu Van der Auwera, Geert Univ Missouri Kansas City Dept Comp Sci & Elect Engn Kansas City MO 64110 USA Qualcomm Technol Inc San Diego CA 92121 USA

Block-based video codecs such as Versatile Video Coding (VVC)/H.266, High Efficiency Video Coding (HEVC)/H.265, Advanced Video Coding (AVC)/H.264 etc. inherently introduces compression artifacts. Although these codecs have in-loop filters to correct these distortions, they are not always effective due to the complexity of the noise. Recently, deep-learning approaches emerged as a promising solution for in-loop filtering. However, most of the previous approaches were designed solely for learning from images and neglected the high-frequency signals present in the reconstructed video frames. Furthermore, some previous methods employed a multi-level feature-extraction and feature-fusion strategy to enhance performance. However, they utilized complex feature-extractors while relying on naive feature-fusion methods. In this article, we propose a novel framework called TSF-Net, which jointly learns from both the pixel (spatial) and frequency-decomposed information and through powerful capability of a channel-wise transformer, it fuses both these information to improve performance. Our approach deviates from previous approaches by employing a simple feature-extractor coupled with an advanced transformer-based feature-fusion module. Simultaneously, TSF-Net introduces a few fundamental modifications in the multi-head self-attention module of the channel-wise transformer to make it computationally efficient. Our experimental results show that the proposed TSF-Net achieves a Bj & oslash;ntegaard Delta (BD) - bitrate saving of up to 10.258% for the luma (Y) component under all-intra (AI) profile outperforming the VVC baseline and other state-of-the-art methods. Moreover, the proposed TSF-Net with an efficient channel-wise transformer is twice as efficient as TSF-Net with a vanilla channel-wise transformer.

关键词： Transformers Information filters Feature extraction Streaming media Discrete cosine transforms Convolutional neural networks Image restoration in-loop filters versatile video coding convolutional neural network channel-wise transformer feature fusion

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Macro-pixel-wise CNN-based filtering for quality enhancement of light field images

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ELECTRONICS LETTERS 2020年第25期56卷 1413-1416页

作者： Huang, H. Schiopu, I. Munteanu, A. Vrije Univ Brussel Dept Elect & Informat Pl Laan 2 B-1050 Brussels Belgium

The Letter introduces a novel filtering method based on convolutional neural networks (CNNs) for quality enhancement of light field (LF) images captured by a plenoptic camera and compressed using high-efficiency video coding (HEVC). The method takes advantage of the macro-pixel (MP) structure specific to the LF images and proposes a novel MP-wise filtering approach based on a novel deep neural network architecture. The proposed CNN-based method achieves an outstanding performance when HEVC is employed without its in-loop filters. Experimental results show high luminance-peak signal-to-noise ratio (Y-PSNR) gains and average Y-BjOntegaard delta (BD)-rate savings of 25.6% over HEVC on a large data set.

关键词： filtering theory image enhancement cameras video coding convolutional neural nets macro-pixel-wise CNN-based quality enhancement light field images novel filtering method convolutional neural networks plenoptic camera high-efficiency video coding HEVC macro-pixel structure LF images novel MP-wise filtering approach deep neural network architecture CNN-based method in-loop filters

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Multi-stage Attention Convolutional Neural Networks for HEVC In-loop Filtering

Multi-stage Attention Convolutional Neural Networks for HEVC...

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2nd IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS)

作者： Lai, Peng-Ren Wang, Jia-Shung Natl Tsing Hua Univ Dept Comp Sci Hsinchu Taiwan

ISBN: (纸本)9781728149226

In High Efficiency Video Coding (HEVC), lossy compression techniques bring various visual artifacts such as blocking, ringing, and blurring, etc. Recently, to explore convolutional neural networks (CNN) potential of removing such artifacts, researchers presented several CNN models. In this paper, we proposed a Multi-stage Attention Convolutional Neural Network (MACNN) to replace in-loop filters or post-processing. Our proposed method has three characteristics of effective training and inferencing: employing a 3-stage design fashion with various loss criteria, adopting the revised Inception module, and utilizing Self-attention block. Such a design has several advantages. The 3-stage design clarifies the function of each stage, effectively alleviating the burden of the network;inception module along with self-attention block benefit our model having the ability to acquire global information with fewer layers. Hence, MACNN could reach the performance gain competitive to deeper models. The experimental results show that our MACNN achieves an average 6.5% BD-rate reduction compared to HEVC in all-intra configuration, beating state-of-the-art methods.

关键词： High Efficiency Video Coding (HEVC) in-loop filters convolutional neural networks Inception module Self-attention Block

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Hardware Design for the Separable Symmetric Normalized Wiener Filter of the AV1 Decoder 35

Hardware Design for the Separable Symmetric Normalized Wiene...

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35th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design (SBCCI)

作者： Palau, Roberta Penny, Wagner Goebel, Jones Zummach, Eduardo Correa, Guilherme Porto, Marcelo Agostini, Luciano Fed Univ Pelotas UFPEL Video Technol Res Grp ViTech Grp Architectures & Integrated Circuits GACI Grad Pelotas RS Brazil Sul Rio Grandense Fed Inst Pelotas Pelotas RS Brazil

ISBN: (数字)9781665481281

ISBN: (纸本)9781665481281

This paper presents the first dedicated hardware design in the literature for the Separable Symmetric Normalized Wiener Filter (SSNWF) targeting the decoder of the AOM Video 1 (AV1) video format. The SSNWF is one of the last filters into the decoding filtering loop, being part of the Switchable loop Restoration Filter (SLRF). The SLRF is the main novelty introduced by AV1 in the in-loop filtering process. It is used to attenuate the blurring artifacts, improving the subjective video quality and the coding efficiency. The developed hardware design presented in this paper targets the AV1 decoder and it can process Ultra-High Definition (UHD) videos with 3840x2160 pixels per frame at 60 frames per second (fps) when running at 207.03 MHz. The architecture was synthesized to standard cells using the 40 nm TSMC library, reaching an area of 37.78 Kgates and a power dissipation of 26.36 mW.

关键词： AV1 in-loop filters Separable Symmetric Normalized Wiener Filter Hardware Design Video Coding

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An UHD 4K@60fps Dual Self-Guided Filter Targeting the AV1 Decoder 35

An UHD 4K@60fps Dual Self-Guided Filter Targeting the AV1 De...

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35th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design (SBCCI)

作者： Palau, Roberta Goebel, Jones Zummach, Eduardo Viana, Ramiro Correa, Marcel Correa, Guilherme Porto, Marcelo Agostini, Luciano Fed Univ Pelotas UFPEL Grad Program Comp PPGC Grp Architectures & Integrated Circuits GACI Video Technol Res Grp ViTech Pelotas Brazil Sul Rio Grandense Fed Inst Pelotas Pelotas Brazil

ISBN: (数字)9781665481281

ISBN: (纸本)9781665481281

This paper presents the first dedicated hardware design in the literature for the Dual Self-Guided Filter (DSGF) from the AOM Video 1 (AV1) video format. The DSGF is one of the last filters in the encoding loop and is used to attenuate blurring artifacts and to improve the subjective video quality. The presented hardware design targets the AV1 decoder and it is able to process Ultra-High Definition (UHD) videos with 3840x2160 pixels per frame at 60 frames per second when running at 212.86 MHz. The architecture was synthesized to standard cells using the 40 nm TSMC library, using 177.58 kgates and with a power dissipation of 120.21mW.

关键词： AV1 in-loop filters Dual Self-Guided Filter Hardware Design Video Coding

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High-throughput sample adaptive offset hardware architecture for high-efficiency video coding

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JOURNAL OF ELECTRONIC IMAGING 2018年第2期27卷 023035-023035页

作者： Zhou, Wei Yan, Chang Zhang, Jingzhi Zhou, Xin Northwestern Polytech Univ Sch Elect & Informat Xian Shaanxi Peoples R China Northwestern Polytech Univ Sch Automat Xian Shaanxi Peoples R China

A high-throughput hardware architecture for a sample adaptive offset (SAO) filter in the high-efficiency video coding video coding standard is presented. First, an implementation-friendly and simplified bitrate estimation method of rate-distortion cost calculation is proposed to reduce the computational complexity in the mode decision of SAO. Then, a high-throughput VLSI architecture for SAO is presented based on the proposed bitrate estimation method. Furthermore, multiparallel VLSI architecture for in-loop filters, which integrates both deblocking filter and SAO filter, is proposed. Six parallel strategies are applied in the proposed in-loop filters architecture to improve the system throughput and filtering speed. Experimental results show that the proposed in-loop filters architecture can achieve up to 48% higher throughput in comparison with prior work. The proposed architecture can reach a high-operating clock frequency of 297 MHz with TSMC 65-nm library and meet the real-time requirement of the in-loop filters for 8 K x 4 K video format at 132 fps. (C) 2018 SPIE and /S&T

关键词： high-efficiency video coding in-loop filters deblocking filter sample adaptive offset VLSI

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