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On the connection between the phase transition of the covering test and the learning success rate in ILP

MACHINE LEARNING 2008年第2-3期70卷 135-150页

作者： Alphonse, Erick Osmani, Aomar Univ Paris 13 LIPN CNRS UMR 7030 Paris France

It is well-known that heuristic search in ILP is prone to plateau phenomena. An explanation can be given after the work of Giordana and Saitta: the ILP covering test is NP-complete and therefore exhibits a sharp phase transition in its coverage probability. As the heuristic value of a hypothesis depends on the number of covered examples, the regions "yes" and "no" represent plateaus that need to be crossed during search without an informative heuristic value. Several subsequent works have extensively studied this finding by running several learning algorithms on a large set of artificially generated problems and argued that the occurrence of this phase transition dooms every learning algorithm to fail to identify the target concept. We note however that only generate-and-test learning algorithms have been applied and that this conclusion has to be qualified in the case of data-driven learning algorithms. Mostly building on the pioneering work of Winston on near-miss examples, we show that, on the same set of problems, a top-down data-driven strategy can cross any plateau if near-misses are supplied in the training set, whereas they do not change the plateau profile and do not guide a generate-and-test strategy. We conclude that the location of the target concept with respect to the phase transition alone is not a reliable indication of the learning problem difficulty as previously thought.

关键词： inductive logic programming heuristic search plateau phenomena phase transition near-miss examples

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Learning qualitative relations in real world scenes

Learning qualitative relations in real world scenes

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4th International Conference on Information and Automation for Sustainability

作者： Ranasinghe, D. D. M. Karunananda, A. S. Ratnayake, U. Open Univ Fac N Sc Dept Math & Comp Sci Nugegoda Sri Lanka Open Univ Fac Engn Dept Elect & Comp Engn Nugegoda Sri Lanka Univ Moratuwa Fac Informat Technol Moratuwa Sri Lanka

ISBN: (纸本)9781424428991

Learning from visual scenes is an innate ability of human beings yet an unresolved and highly complex task for machines and is being addressed in the area of cognitive vision systems. Most of the present developments in cognitive vision systems adopt quantitative or model base approaches. Quantitative approaches involve tedious calculations and yield black box type of learning while in model base approaches the structure of the model has to he known before hand, which is not practical in all situations. Therefore, this research work primarily adopts a qualitative approach in learning from visual scenes and inductive logic programming is used to learn rules of a visual scene from a pool of example scenes. The prototype system developed is capable of learning accurate rules, which in turn used for learning new models and the system is capable of learning beyond initial specifications.

关键词： cognitive vision systems qualitative spatial reasoning temporal reasoning inductive logic programming

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On the connection between the phase transition of the covering test and the learning success rate in ILP

On the connection between the phase transition of the coveri...

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16th International Conference of inductive logic programming

作者： Alphonse, Erick Osmani, Aomar Univ Paris 13 LIPN CNRS UMR 7030 Paris France

关键词： inductive logic programming heuristic search plateau phenomena phase transition near-miss examples

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Compressing probabilistic Prolog programs

Compressing probabilistic Prolog programs

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16th International Conference of inductive logic programming

作者： De Raedt, L. Kersting, K. Kimmig, A. Revoredo, K. Toivonen, H. Katholieke Univ Leuven Dept Computerwetenschappen B-3001 Heverlee Belgium Univ Freiburg Inst Informat D-79100 Freiburg Germany Univ Helsinki Dept Comp Sci FIN-00014 Helsinki Finland

ProbLog is a recently introduced probabilistic extension of Prolog (De Raedt, et al. in Proceedings of the 20th international joint conference on artificial intelligence, pp. 2468-2473, 2007). A ProbLog program defines a distribution over logic programs by specifying for each clause the probability that it belongs to a randomly sampled program, and these probabilities are mutually independent. The semantics of ProbLog is then defined by the success probability of a query in a randomly sampled program. This paper introduces the theory compression task for ProbLog, which consists of selecting that subset of clauses of a given ProbLog program that maximizes the likelihood w.r.t. a set of positive and negative examples. Experiments in the context of discovering links in real biological networks demonstrate the practical applicability of the approach.

关键词： probabilistic logic inductive logic programming theory revision compression network mining biological applications statistical relational learning

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Compact representation of knowledge bases in inductive logic programming

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MACHINE LEARNING 2004年第3期57卷 305-333页

作者： Struyf, J Ramon, J Bruynooghe, M Verbaeten, S Blockeel, H Katholieke Univ Leuven Dept Comp Sci B-3001 Louvain Belgium

In many applications of inductive logic programming (ILP), learning occurs from a knowledge base that contains a large number of examples. Storing such a knowledge base may consume a lot of memory. Often, there is a substantial overlap of information between different examples. To reduce memory consumption, we propose a method to represent a knowledge base more compactly. We achieve this by introducing a meta-theory able to build new theories out of other ( smaller) theories. In this way, the information associated with an example can be built from the information associated with one or more other examples and redundant storage of shared information is avoided. We also discuss algorithms to construct the information associated with example theories and report on a number of experiments evaluating our method in different problem domains.

关键词： inductive logic programming efficiency scalability knowledge bases compact representation

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Learning semantic lexicons from a part-of-speech and semantically tagged corpus using inductive logic programming

Learning semantic lexicons from a part-of-speech and semanti...

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10th International Conference on inductive logic programming (ILP2000)

作者： Claveau, V Sébillot, P Fabre, U Bouillon, P Inst Rech Informat & Syst Aleatoires F-35042 Rennes France Univ Toulouse 2 ERSS F-31058 Toulouse France Univ Geneva TIM ISSCO ETI CH-1205 Geneva Switzerland

This paper describes an inductive logic programming learning method designed to acquire from a corpus specific Noun-Verb (N-V) pairs-relevant in information retrieval applications to perform index expansion-in order to build up semantic lexicons based on Pustejovsky's generative lexicon (GL) principles (Pustejovsky, 1995). In one of the components of this lexical model, called the qualia structure, words are described in terms of semantic roles. For example, the telic role indicates the purpose or function of an item (cut for knife), the agentive role its creation mode (build for house), etc. The qualia structure of a noun is mainly made up of verbal associations, encoding relational information. The learning method enables us to automatically extract, from a morpho-syntactically and semantically tagged corpus, N-V pairs whose elements are linked by one of the semantic relations defined in the qualia structure in GL. It also infers rules explaining what in the surrounding context distinguishes such pairs from others also found in sentences of the corpus but which are not relevant. Stress is put here on the learning efficiency that is required to be able to deal with all the available contextual information, and to produce linguistically meaningful rules.

关键词： corpus-based acquisition lexicon learning generative lexicon inductive logic programming subsumption under object identity private properties

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Finding the Worst Voltage Violation in Multi-Domain Clock Gated Power Network 08

Finding the Worst Voltage Violation in Multi-Domain Clock Ga...

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2008 Design, Automation and Test in Europe (DATE 2008), vol.3

作者： Wanping Zhang Yi Zhu Wenjian Yu Ling Zhang Rui Shi He Peng Zhi Zhu Lew Chua-Eoan Rajeev Murgai Toshiyuki Shibuya Nuriyoki Ito Chung-Kuan Cheng Qualcomm Inc. San Diego CA and UC San Diego La Jolla CA UC San Diego La Jolla CA UC San Diego La Jolla CA and Tsinghua University Beijing China Qualcomm Inc. San Diego CA Fujitsu Laboratories of America Inc. Sunnyvale CA Fujitsu Laboratories LTD Kawasaki Japan Fujitsu Limited Kawasaki Japan

ISBN: (纸本)9783981080131

This paper proposes an efficient method to find the worst case of voltage violation by multi-domain clock gating in an on-chip power network. We first present a voltage response in an arbitrary multi-domain clock gating pattern, using a superposition technique. Then, an integer linear programming (ILP) formulation is proposed to identify the worst-case gating pattern and the maximum variation area. The ILP based method is significantly faster than a conventional method based on enumeration. The experimental results are also compared with a case where peak voltage variation is induced, which shows the latter technique largely underestimated the overall variation effect.

关键词： Power grids Timing devices Superposition technique VOLTAGE inductive logic programming GATING voltage variation

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Optimizing Near-ML MIMO Detector for SDR Baseband on Parallel Programmable Architectures 08

Optimizing Near-ML MIMO Detector for SDR Baseband on Paralle...

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2008 Design, Automation and Test in Europe (DATE 2008), vol.1

作者： Min Li Bruno Bougard Weiyu Xu David Novo Liesbet Van Der Perre Francky Catthoor IMEC Leuven Belgium Caltech CA

ISBN: (纸本)9783981080131

ML and near-ML MIMO detectors have attracted a lot of interest in recent years. However, almost all the reported implementations are delivered in ASICs or FPGAs. Our contribution is optimizing the near-ML MIMO detector for parallel programmable architectures, such as those with ILP and DLP features. In the proposed SSFE (Selective Spanning with Fast Enumeration), architecture-friendliness is explicitly introduced from the very beginning of the design flow. Importantly, high level algorithmic transformations make the dataflow pattern and structure fit architecture-characteristics very well. We enable abundant vector-parallelism with highly regular and deterministic dataflow in the SSFE;memory rearrangements, shuffling and non-predictable dynamism are all elaborately excluded. Hence, the SSFE can be easily parallelized and efficiently mapped onto ILP and DLP architectures. Furthermore, to fine-tune the SSFE on parallel architectures, extensive pre-compiler transformations are applied with the help of the application-level information. These optimize not only computation-operations but also address-generations and memory-accesses. Experiments show that the SSFE brings very efficient resource-utilizations on real-life VLIW architectures. Specifically, with the SSFE the percentage of NOPs instructions on VLIW is below 1%, even better than that achieved by the software-pipelined FFT. To the best of our knowledge, this is the first reported work about comprehensive optimizations of near-ML MIMO detectors for parallel programmable architectures.

关键词： inductive logic programming TXNL4B gene digital light processor(DLP) multiple input multiple output systems ARCHITECTURE Very long instruction word PROGRAMMABLE detector Design flow Computer programming Languages data flow Baseband SDPR gene Parallel Lines

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Task Scheduling with Configuration Prefetching and Anti-Fragmentation techniques on Dynamically Reconfigurable Systems 08

Task Scheduling with Configuration Prefetching and Anti-Frag...

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2008 Design, Automation and Test in Europe (DATE 2008), vol.3

作者： Francesco Redaelli Marco D. Santambrogio Donatella Sciuto Politecnico di Milano Milano

ISBN: (纸本)9783981080131

Aim of this paper is to define a scheduling of the task graph of an application that minimizes its total execution time on a partially dynamically reconfigurable FPGA. The scheduler has to take into account the reconfiguration overhead of each task, the area constraint of the target FPGA, the precedences between the tasks, configuration prefetching and module reuse. We introduce an ILP formulation to solve the task scheduling problem in the reconfigurable architecture scenario. This formulation has been used to identify interesting features for a possible heuristic scheduler. The results of the ILP solution show how a reconfiguration-aware scheduler exploiting all the reconfiguration features can outperform one with partial knowledge.

关键词： TASK SCHEDULING task graphs prefetching execution time scheduler program Reconfigurable architectures configurability inductive logic programming Reconfiguration Field programmable gate arrays

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N-Model Tests for VLSI Circuits

N-Model Tests for VLSI Circuits

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40th Southeastern Symposium on System Theory (SSST 2008)

作者： Nitin Yogi Vishwani D. Agrawal Department of Electrical and Computer Engineering Aubum University Auburn AL USA

ISBN: (纸本)9781424418060

We define N-model tests that target detection of faults belonging to N specified fault models. We provide a method for deriving minimal tests using integer linear programming (ILP) without reducing the individual fault model coverage. Any test sequences, deterministic, random, functional, N-detect, etc., can be minimized for the given set of fault models. Stuck-at, transition, and pseudo stuck-at I{sub}(DDQ) faults are used as illustrations. We generate tests using Mentor Graphics FastScan ATPG tool employing a single fault model at a time. A minimized test set for the three fault models is then obtained by solving the proposed combined ILP problem. For s5378 benchmark circuit we achieved about 50% reduction in the number of vectors and 10% reduction in the I{sub}(DDQ) current measurements compared to the originally generated tests. We also propose a reduced complexity ILP approximation.

关键词： Very large scale integration faults inductive logic programming SINGLE FAILURE Object detection ILLUSTRATIONS reduction index Stick Dosage Form

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