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23rd Euromicro Conference on Real-Time Systems (ECRTS)

作者： Falk, Heiko Schmitz, Norman Schmoll, Florian Tech Univ Dortmund D-44221 Dortmund Germany

ISBN: (纸本)9780769544427

Current compilers lack precise timing models guiding their built-in optimizations. Hence, compilers apply ad-hoc heuristics during optimization to improve code quality. One of the most important optimizations is register allocation. Many compilers heuristically decide when and where to spill a register to memory, without having a clear understanding of the impact of such spill code on a program's runtime. This paper presents an integer-linear programming (ILP) based register allocator that uses precise worst-case execution time (WCET) models. Using this WCET timing data, the compiler avoids spill code generation along the critical path defining a program's WCET. To the best of our knowledge, this paper is the first one to present a WCET-aware ILP-based register allocator. Our results underline the effectiveness of the proposed techniques. For a total of 55 realistic benchmarks, we reduced WCETs by 20.2% on average and ACETs by 14%, compared to a standard graph coloring allocator. Furthermore, our ILP-based register allocator outperforms a WCET-aware graph coloring allocator by more than a factor of two for the considered benchmarks, while requiring less runtime.

关键词： WCET Register Allocation integer-linear programming Pipeline

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OPTIMAL THERMAL UNIT SCHEDULING USING IMPROVED DYNAMIC-programming ALGORITHM

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IEE PROCEEDINGS-C GENERATION TRANSMISSION AND DISTRIBUTION 1986年第1期133卷 1-5页

作者： BOND, SD FOX, B Department of Electrical and Electronic Engineering Queen's University of Belfast Belfast UK

The economic scheduling of power generation is considered, and an improved algorithm based on a combination of mixed integer-linear and dynamic programming presented. Mixed integer-linear programming is used to determine feasible combinations of units at each scheduling point, while a novel dynamic programming approach identifies promising scheduling routes in the time domain. The algorithm obtains the same solutions as mixed integer-linear programming, but with significant savings in the solution times required and the amount of computer memory used.

关键词： optimisation economic scheduling integer-linear programming economics load forecasting optical thermal unit scheduling Optimisation techniques Optimisation electric power generation power system analysis computing Power engineering computing power generation Power system planning and layout Generating stations and plants dynamic programming

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Valid integer polytope (VIP) penalties for branch-and-bound enumeration

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OPERATIONS RESEARCH LETTERS 2000年第3期26卷 117-126页

作者： Brown, GG Dell, RF Olson, MP USN Dept Operat Res Postgrad Sch Monterey CA 93943 USA INSIGHT Inc Sudley N Business Ctr Manassas VA 20109 USA

We introduce new penalties, called valid integer polytope (VIP) penalties, that tighten the bound of an integer-linear program during branch-acid-bound enumeration. Early commercial codes for branch and bound commonly employed penalties developed from the dual simplicial lower bound on the cost of restricting fractional integer variables to proximate integral values. VIP penalties extend and tighten these for ubiquitous k-pack, k-partition, and K-cover constraints. In real-world problems, VIP penalties occasionally tighten the bound by more than an order of magnitude, but they usually offer small bound improvement. Their ease of implementation, speed of execution, and occasional, overwhelming success make them an attractive addition during branch-and-bound enumeration. (C) 2000 Elsevier Science B.V. All rights reserved.

关键词： integer-linear programming branch and bound penalties

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Optimisation of rural roads planning based on multi-modal travel: a multi-service accessibility study in Nepal's remote Karnali Province

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TRANSPORTATION 2024年第2期51卷 567-613页

作者： Heyns, Andries M. Banick, Robert Hanken Sch Econ Humanitarian Logist & Supply Chain Res Inst Helsinki Finland Univ Alabama Dept Geog Lab Locat Sci Tuscaloosa AL 35487 USA World Bank Poverty & Equ Global Practice 1818 H St NW Washington DC 20433 USA

The traditional aim in transportation planning is to maximise gains associated with vehicular travel distances or times, indirectly prioritising populations that live near existing or proposed roads-remote populations that first require hours of walking to reach roads are overlooked. In this paper, rural roads optimisation is performed using a new model that estimates proposed roads' accessibility gains, considering reductions in vehicular travel time and reductions in walking time required by remote populations to reach them. This ensures that even the most remote populations that may benefit from new roads are included in their evaluation. When presented with a large number of proposed roads and the requirement of determining a plan within a suitable budget, it is often infeasible to construct all proposed roads. In such instances, subsets of well-performing road-combinations that are evaluated with respect to multiple objectives need to be identified for analysis and comparison-for which multi-objective optimisation approaches can be employed. Traditional optimisation approaches return a small number of road-combination plans only, limited to user-specified budget levels and objective weight sets. This paper presents an innovative heuristic solution approach that overcomes such limitations by returning thousands of well-performing solutions scattered across a budget span, and not limited in number to user-specified objective weight sets at fixed budget levels. The heuristic is employed along with a more traditional weighted-sum integer-linear programming approach to determine high-quality road-combination plans selected from 92 roads recently proposed for construction in Nepal's remote Karnali province. Using these two approaches with inputs from the new multi-modal accessibility model, it is illustrated how rural roads planning can be performed to the benefit of rural populations regardless of their proximity to roads. New planning and analysis benefits of the h

关键词： Accessibility Genetic algorithm integer-linear programming Optimisation Rural development

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A dynamic evacuation model for pedestrian-vehicle mixed-flow networks

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TRANSPORTATION RESEARCH PART C-EMERGING TECHNOLOGIES 2014年第0期40卷 75-92页

作者： Zhang, Xin Chang, Gang-len Univ Maryland Dept Civil & Environm Engn College Pk MD 20742 USA

In urban emergency evacuation, a potentially large number of evacuees may depend either on transit or other modes, or need to walk a long distance, to access their passenger cars. In the process of approaching the designated pick-up points or parking areas for evacuation, the massive number of pedestrians may cause tremendous burden to vehicles in the roadway network. Responsible agencies often need to contend with congestion incurred by massive vehicles emanating from parking garages, evacuation buses generated from bus stops, and the conflicts between evacuees and vehicles at intersections. Hence, an effective plan for such evacuation needs to concurrently address both the multi-modal traffic route assignment and the optimization of network signal controls for mixed traffic flows. This paper presents an integrated model to produce the optimal distribution of vehicle and pedestrian flows, and the responsive network signal plan for massive mixed pedestrian-vehicle flows within the evacuation zone. The proposed model features its effectiveness in accounting for multiple types of evacuation vehicles, the interdependent relations between pedestrian and vehicle flows via some conversion locations, and the inevitable conflicts between intersection turning vehicle and pedestrian flows. An illustrating example concerning an evacuation around the M&T stadium area has been presented, and the results indicate the promising properties of our proposed model, especially on reflecting the complex interactions between vehicle and pedestrian flows and the favorable use of high-occupancy vehicles for evacuation operations. (C) 2014 Elsevier Ltd. All rights reserved.

关键词： Mixed flow Signal optimization Evacuation integer-linear programming Pedestrian

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Quantification and compensation of the impact of faults in system throughput

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PROCEEDINGS OF THE INSTITUTION OF MECHANICAL ENGINEERS PART O-JOURNAL OF RISK AND RELIABILITY 2013年第6期227卷 614-628页

作者： Rodriguez, Ricardo J. Julvez, Jorge Merseguer, Jose Univ Politecn Madrid Fac Informat Madrid Spain Univ Zaragoza Dpto Informat & Ingn Sistemas Zaragoza Spain

Performability relates the performance (throughput) and reliability of software systems whose normal behaviour may degrade owing to the existence of faults. These systems, naturally modelled as discrete event systems using shared resources, can incorporate fault-tolerant techniques to mitigate such a degradation. In this article, compositional fault-tolerant models based on Petri nets, which make its sensitive performability analysis easier, are proposed. Besides, two methods to compensate existence of faults are provided: an iterative algorithm to compute the number of extra resources needed, and an integer-linear programming problem that minimises the cost of incrementing resources and/or decrementing fault-tolerant activities. The applicability of the developed methods is shown on a Petri net that models a secure database system.

关键词： Performability fault-tolerant techniques Petri nets integer-linear programming

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A nature-inspired firefly algorithm based approach for nanoscale leakage optimal RTL structure

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INTEGRATION-THE VLSI JOURNAL 2015年 51卷 46-60页

作者： Kougianos, Elias Mohanty, Saraju P. Univ N Texas NanoSyst Design Lab NSDL Denton TX 76207 USA Univ N Texas Dept Elect Engn Technol Denton TX 76207 USA Univ N Texas Dept Comp Sci & Engn Denton TX 76207 USA

Optimization of leakage power is essential for nanoscale CMOS (nano-CMOS) technology based integrated circuits for numerous reasons, including improving battery life of the system in which they are used as well as enhancing reliability. Leakage optimization at an early stage of the design cycle such as the register-transfer level (RTL) or architectural level provides more degrees of freedom to design engineers and ensures that the design is optimized at higher levels before proceeding to the next and more detailed phases of the design cycle. In this paper, an RTL optimization approach is presented that targets leakage-power optimization while performing simultaneous scheduling, allocation and binding. The optimization approach uses a nature-inspired firefly algorithm so that large digital integrated circuits can be effectively handled without convergence issues. The firefly algorithm optimizes the cost of leakage delay product (LDP) under various resource constraints. As a specific example, gate-oxide leakage is optimized using a 45 nm CMOS dual-oxide based pre-characterized datapath library. Experimental results over various architectural level benchmark integrated circuits show that average leakage optimization of 90% can be obtained. For a comparative perspective, an integer linear programming (ILP) based algorithm is also presented and it is observed that the firefly algorithm is as accurate as ILP while converging much faster. To the best of the authors' knowledge, this is the first ever paper that applies firefly based algorithms for RTL optimization. (C) 2015 Elsevier B.V. All rights reserved.

关键词： Firefly algorithm Nano-CMOS Leakage power Gate leakage Low power synthesis Scheduling Binding RTL optimization integer-linear programming

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Efficient Asset Allocation to Dynamic Requests for Support

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IEEE CONTROL SYSTEMS LETTERS 2024年 8卷 2577-2582页

作者： Elliott, D. Sawyer Finn, Connor Hicks, Greg Johns Hopkins Univ Appl Phys Lab Air & Missile Def Sect Laurel MD 20723 USA

This letter details two novel algorithms for computing asset allocations given dynamic requests for support. Using spatial and temporal discretization, the first algorithm casts the allocation problem as a lexicographic integer-linear program (ILP) that is efficiently solved using an ILP solver. Improving computational efficiency, the second algorithm replaces the ILP solver with a novel dual-tactic linear program solver. Provided proofs, complexity analyses, and numerical analyses demonstrate the computational efficiency and convergence of both algorithms to performant solutions. Discussion of application to broad domains such as defense, conservation, and resource management for businesses is provided.

关键词： Resource management Heuristic algorithms Optimization Dynamic scheduling Approximation algorithms Surveillance Physics Space missions Robots Research and development Resource allocation asset allocation linear programming optimization integer-linear programming

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Design-Time Memory Subsystem Optimization for Low-Power Multi-Core Embedded Systems 13

Design-Time Memory Subsystem Optimization for Low-Power Mult...

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IEEE 13th International Symposium on Embedded Multicore/Many-Core Systems-on-Chip (MCSoC)

作者： Strobel, Manuel Radetzki, Martin Univ Stuttgart Chair Embedded Syst Stuttgart Germany

ISBN: (纸本)9781728148823

Embedded multi-core systems are increasingly in use. As established single-core design methodologies are often not applicable out of the box, novel design-time optimization methods are required in order to manage real-time characteristics, predictability, or tight constraints with respect to energy consumption or system performance. With focus on the memory subsystem in a multi-core embedded system, this paper proposes an optimization workflow for the application-specific optimal binding of code and data to memory instances, efficient handling and scheduling of available memory low-power modes, and the automated and transparent integration of these optimization results on the software level. Presented optimization algorithms are realized as integer linear programs;code modification and generation are implemented on the basis of LLVM. Experimental results for an ARM-based quad-core platform with SRAM memory subsystem, consisting of core-local scratchpad memories and global shared memory, prove the efficiency of our method in terms of energy consumption when compared to a system using direct-mapped caches, but also in comparison with a state-of-the-art scratchpad mapping heuristic.

关键词： Design-Time Memory Optimization Low-Power Embedded System Design Multi-Core integer-linear programming System Design Automation

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Efficient Trace Signal Selection using Augmentation and ILP Techniques

Efficient Trace Signal Selection using Augmentation and ILP ...

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15th International Symposium on Quality Electronic Design (ISQED)

作者： Rahmani, Kamran Mishra, Prabhat Ray, Sandip Univ Florida Dept Comp & Informat Sci & Engn Gainesville FL 32611 USA Intel Corp Strategic CAD Labs Santa Clara CA USA

ISBN: (纸本)9781479939466

A key problem in post-silicon validation is to identify a small set of traceable signals that are effective for debug during silicon execution. Most signal selection techniques rely on a metric based on circuit structure. Simulation-based signal selection is promising but have major drawbacks in computation overhead and restoration quality. In this paper, we propose an efficient simulation-based signal selection technique to address these bottlenecks. Our approach uses (1) bounded mock simulations to determine state restoration effectiveness, and (2) an ILP-based algorithm for refining selected signals over different simulation runs. Experimental results demonstrate that our algorithm can provide significantly better restoration ratio (up to 515%, 51% on average) compared to the state-of-the-art techniques.

关键词： circuit optimisation elemental semiconductors integer programming integrated logic circuits linear programming signal restoration silicon ILP techniques ILP-based algorithm Si augmentation techniques bounded mock simulations circuit structure integer-linear programming integrated circuit post-silicon validation signal restoration silicon execution simulation-based signal selection technique state restoration effectiveness trace signal selection Computational modeling Integrated circuit modeling Logic gates Measurement Observability Silicon Vectors

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