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检索条件"主题词=Interface Algorithms"
5 条 记 录,以下是1-10 订阅
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Overview of interface algorithms, interface Signals, Communication and Delay in Real-Time Co-Simulation of Distributed Power Systems
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IEEE ACCESS 2023年 11卷 103925-103955页
作者: Buraimoh, Elutunji Ozkan, Gokhan Timilsina, Laxman Chamarthi, Phani Kumar Papari, Behnaz Edrington, Christopher S. Clemson Univ Holcombe Dept Elect & Comp Engn Real Time COntrol & Optimizat Lab RT COOL Clemson SC 29634 USA Clemson Univ Domin Energy Innovat Ctr N Charleston SC 29405 USA Clemson Univ Dept Automot Engn Greenville SC 29607 USA
In recent years, there has been growing research interest in the virtual integration of hardware and software assets across different geographical locations. However, achieving joint real-time simulation in virtually ... 详细信息
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Assessment of interface algorithms for Real-Time Co-Simulation  8
Assessment of Interface Algorithms for Real-Time Co-Simulati...
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8th Southern Power Electronics Conference and the 17th Brazilian Power Electronics Conference, SPEC / COBEP 2023
作者: Glória, Rodrigo Vasconcelos De Souza Antero, Gabriel Do Amaral, João Marcelo Teixeira Da Silva Dias, Robson Francisco Federal University of Rio de Janeiro Electrical Department of Engineering Rio de Janeiro Brazil Electrical Engineering Program Coppe/UFRJ Rio de Janeiro Brazil
One noteworthy solution in the context of more accurate representation of power systems is the use of distributed simulation, such as co-simulation using realtime simulators. Therefore, the electrical connection betwe... 详细信息
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Virtual Shifting Impedance Method for Extended Range High-Fidelity PHIL Testing
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IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS 2024年 第3期71卷 2903-2913页
作者: Paspatis, Alexandros Kontou, Alkistis Feng, Zhiwang Syed, Mazheruddin Lauss, Georg Burt, Graeme Kotsampopoulos, Panos Hatziargyriou, Nikos Natl Tech Univ Athens Sch Elect & Comp Engn Zografos 15780 Greece Univ Strathclyde Dept Elect & Elect Engn Glasgow G1 1RD Lanark Scotland WSP Glasgow G1 3BX Lanark Scotland AIT EES A-1210 Graz Austria Natl Tech Univ Athens Athens 15780 Greece
A novel power hardware-in-the-loop interface algorithm, the virtual shifting impedance, is developed, validated, and demonstrated in this article. Building on existing interface algorithms, this method involves shifti... 详细信息
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Studies in Power Hardware in the Loop (PHIL) Simulation Using Real-Time Digital Simulator (RTDS)
Studies in Power Hardware in the Loop (PHIL) Simulation Usin...
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IEEE International Conference on Power Electronics, Drives and Energy Systems (PEDES)
作者: Dargahi, Mahdi Ghosh, Arindam Ledwich, Gerard Zare, Firuz Queensland Univ Technol Brisbane Qld 4001 Australia
In power hardware in the loop (PHIL) simulations, a real-time simulated power system is interfaced to a piece of hardware, usually called hardware under test (HuT). A PHIL test can be realized using several simulation... 详细信息
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Interfacing Issues in Real-Time Digital Simulators IEEE Task Force on Interfacing Techniques for Simulation Tools
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IEEE TRANSACTIONS ON POWER DELIVERY 2011年 第2期26卷 1221-1230页
作者: Ren, W. Sloderbeck, M. Steurer, M. Dinavahi, V. Noda, T. Filizadeh, S. Chevrefils, A. R. Matar, M. Iravani, R. Dufour, C. Belanger, J. Faruque, M. O. Strunz, K. Martinez, J. A. Univ Alberta Dept Elect & Comp Engn Edmonton AB T6G 2V4 Canada
This paper deals with the current state-of-the-art in interfacing issues related to real-time digital simulators employed in the simulation of power systems and power-electronic systems. This paper provides an overvie... 详细信息
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