检索结果-内蒙古大学图书馆

CMOS linear-in-db VGA with DC offset cancellation for direct-conversion receivers

Journal of Semiconductors 2011年第10期32卷 126-132页

作者：雷倩倩陈治明石寅楚晓杰龚正 Department of Electronic Engineering Xi'an University of Technology Suzhou-CAS Semiconductors Integrated Technology Research Center

A low-power high-linearity linear-in-db variable gain amplifier（VGA） with novel DC offset calibration loop for direct-conversion receiver（DCR） is *** proposed VGA uses the differential-ramp based technique,a digitally programmable gain amplifier（PGA） can be converted to an analog controlled db-linear VGA. An operational amplifier（OPAMP） utilizing an improved Miller compensation approach is adopted in this VGA *** proposed VGA shows a 57 db linear *** DC offset cancellation（DCOC） loop is based on a continuous-time feedback that includes the Miller effect and a linear range operation MOS transistor to realize high-value capacitors and resistors to solve the DC offset problem,*** proposed approach requires no external components and demonstrates excellent DCOC capability in *** using SMIC 0.13μm CMOS technology,this VGA dissipates 4.5 mW from a 1.2 V supply voltage while occupying 0.58 mm^2 of chip area including *** addition,the DCOC circuit shows 500 Hz high pass cutoff frequency（HPCF） and the measured residual DC offset at the output of VGA is less than 2 mV.

关键词： linear-in-db VGA DC offset cancellation

来源：评论

学校读者我要写书评

暂无评论

A novel low-noise linear-in-db intermediate frequency variable-gain amplifier for DRM/DAB tuners

引用

Journal of Semiconductors 2009年第3期30卷 92-96页

作者：王科平王志功周建政雷雪梅周明珠 Institute of RF-& OE-ICs Southeast University

A broadband CMOS intermediate frequency （IF） variable-gain amplifier （VGA） for DRM/DAB tuners is presented. The VGA comprises two cascaded stages： one is for noise-canceling and another is for signal-summing. The chip is fabricated in a standard 0.18μm 1P6M RF CMOS process of SMIC. Measured results show a good linear-in-db gain characteristic in 28 db dynamic gain range of-10 to 18 db. It can operate in the frequency range of 30-700 MHz and consumes 27 mW at 1.8 V supply with the on-chip test buffer. The minimum noise figure is only 3.1 db at maximum gain and the input-referred 1 db gain compression point at the minimum gain is -3.9 dbm.

关键词： VGA noise-canceling linear-in-db CMOS

来源：评论

学校读者我要写书评

暂无评论

Zero-Bias 50-db Dynamic Range linear-in-db V-Band Power Detector Based on CVD Graphene Diode on Glass

引用

IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES 2018年第4期66卷 2018-2024页

作者： Saeed, Mohamed Hamed, Ahmed Wang, Zhenxing Shaygan, Mehrdad Neumaier, Daniel Negra, Renato Rhein Westfal TH Aachen High Frequency Elect D-52062 Aachen Germany AMO GmbH D-52074 Aachen Germany

In this paper, we report the design, fabrication, and demonstration of a compact, V-band, zero-bias, and linear-in-db power detector based on our in-house metal-insulator-graphene diode fabricated on a glass substrate. The presented circuit is optimized for the frequency band of 40-75 GHz. The measured prototype shows a repeatable measured dynamic range of at least 50 db with down to -50 dbm sensitivity on 500-mu m-thick quartz substrate. It also shows input return loss better than -9.5 db over the entire design bandwidth. The measured tangential responsivity for the fabricated circuit on glass is 168 V/W at 2.5 GHz and 15 V/W at 60 GHz. The obtained results together with the robust device fabrication based on chemical vapor deposition graphene promote the proposed scheme and device for repeatable, statistically stable millimeter-wave, and submillimeter-wave applications.

关键词： Chemical vapor deposition (CVD) diode graphene linear-in-db power detector

来源：评论

学校读者我要写书评

暂无评论

A Zero-Pole Reposition Based, 0.95-mW, 68-db, linear-in-db, Constant-Bandwidth Variable Gain Amplifier

引用

CIRCUITS SYSTEMS AND SIGNAL PROCESSING 2014年第5期33卷 1353-1368页

作者： Baghtash, Hassan Faraji Ayatollahi, Ahmad Iran Univ Sci & Technol Dept Elect & Elect Engn Tehran *** Iran

A variable-gain amplifier with very low power consumption and wide tuning range is presented. The operational principle of this unique structure is discussed, its most important formulas are derived and its outstanding performance is verified by simulation in TSMC 0.18-mu m N-well CMOS fabrication process. Owing to the novel zero-pole repositioning technique, the proposed circuit demonstrates very high frequency bandwidth of 79 MHz while drawing only 0.52 mA from 1.8 V power supply. The interesting results such as a very small core area of about 0.0025 mm(2) as well as a wide linear-in-db and constant-bandwidth tuning range of 68.2 db along with a very low power consumption of 0.95 mW are achieved utilizing standard CMOS technology. The stability of the proposed VGA is verified through transient sinusoidal response analysis. Full process, voltage and temperature (PVT) variation analysis of the circuit is also investigated through Monte Carlo and corner case analysis in order to approve the robustness of the structure. Monte Carlo simulations show standard deviation values of 4.6 db and 78.3 MHz in gain and gain-bandwidth product, respectively. These results show that our zero-pole repositioning method would lend itself well for use in low-power and high-frequency applications, especially in high-speed automatic gain control amplifiers.

关键词： Zero-pole repositioning Constant bandwidth High speed linear-in-db Low power Variable gain amplifier

来源：评论

学校读者我要写书评

暂无评论

A low power 48-db/stage linear-in-db variable gain amplifier for direct-conversion receivers

引用

MICROELECTRONICS JOURNAL 2012年第4期43卷 274-279页

作者： Yang, Shang-Hsien Wang, Chua-Chin Natl Sun Yat Sen Univ Dept Elect Engn Kaohsiung 80424 Taiwan

In this paper, a low power Variable Gain Amplifier (VGA) circuit with an approximation to exponential gain characteristic is presented. It is achieved using current mirrors to generate appropriate current signals to bias the input stage of the VGA circuit working in triode region, and the output stage working in saturation region, respectively. The VGA circuit presented herein comes with a 549 mu W maximum power consumption given a 1.8 V supply. Most important of all, it has a linear-in-db 48-db dynamic gain range per stage. The effect of the input trasconductance and the output resistance on the linearity of gain control is also discussed. This circuit is fabricated using a 0.18 mu m standard CMOS process with a core area of 0.0045 mm(2). (C) 2012 Elsevier Ltd. All rights reserved.

关键词： VGA AGC Pseudo exponential gain characteristic linear-in-db

来源：评论

学校读者我要写书评

暂无评论

High-dynamic-range programmable gain amplifier with linear-in-db and DAC gain control

引用

ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING 2018年第1期94卷 83-96页

作者： Cheng, Xu Zhang, Liang Deng, Xianjin MTRC Chengdu Sichuan Peoples R China

This paper presents a high dynamic range programmable gain amplifier (PGA) with linear-in-db and digital to analog converter (DAC) gain control using a BiCMOS process. The proposed PGA is composed of a folded Gilbert variable gain amplifier cell, a DC offset cancellation circuitry, two inductorless fixed gain amplifiers with bandwidth extension, a symmetrical exponential voltage generator, a novel buffer amplifier with active inductive peaking for testing purposes and a 10 bit R-2R DAC. The linear-in-db and DAC gain control scheme facilitate the analog baseband gain tuning accuracy and stability, which also provides an efficient way for digital baseband automatic gain control. The PGA chip is fabricated using 0.13 mu m SiGe BiCMOS technology. With a power consumption of 80 mA@1.2 V supply voltage, the fabricated circuit exhibits a tunable gain range of - 30-27 db (DAC linear gain step guaranteed), a 3 db bandwidth of around 3.5 GHz and a gain resolution of better than 0.07 db.

关键词： PGA linear-in-db DAC DCOC Symmetrical exponential voltage generator

来源：评论

学校读者我要写书评

暂无评论

A GaAs monolithic linear-in-db wide-dynamic-range variable-gain amplifier with matching compensation for 1.95-GHz applications

引用

MICROWAVE AND OPTICAL TECHNOLOGY LETTERS 2005年第3期44卷 251-257页

作者： Detratti, M Pascual, JP de la Fuente, ML Cabo, J García, JL Univ Cantabria Dept Commun Engn ETSIIT E-39005 Santander Spain Alcatel Espacio Madrid Spain

This paper describes a method to design a compact linear-in-db variable-gain amplifier (VGA) with good input/output matching in a wide gain-control range. The method is theoretically supported and has been validated with the design of a 1.95-GHz GaAs fully monolithic VGA. Measured maximum gain is 18.8 db with associated noise figure of 6.3 db and 40-db dynamic range with lower than +/-1.5-db deviation from linearity, under a low control voltage from -0.4 V to -1.5 V. Good linearity with an output 1-db compression of 12 dbm at maximum gain and associated 3(rd)-order intercept point better than 22 dbm are also shown. The adjacent channel power ratio (ACPR) was measured at the 1.95-GHz WCDMA band, showing values better than -48 dbc at 885-KHz offset and -70 dbc at 1.98-Mhz offset over the whole control range. The chip size is 2 x 1.0 mm(2) and consumes only 34 mA from a supply voltage of 3.5 V. (C) 2005 Wiley Periodicals, Inc.

关键词： variable gain amplifier (VGA) MMIC linear-in-db matching WCDMA

来源：评论

学校读者我要写书评

暂无评论

A 0.74 mW, linear-in-db, constant bandwidth, variable gain amplifier based on zero-pole repositioning technique

引用

ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING 2015年第2期84卷 303-313页

作者： Baghtash, Hassan Faraji Islamic Azad Univ Sci & Res Branch Dept Elect & Comp Engn Tehran *** Iran

A zero-pole repositioning based variable gain amplifier is presented in this paper. The operational principle of this unique structure is discussed, its most important formulas are derived and its outstanding performance is verified by simulation in TSMC 0.18 A mu m standard CMOS technology. Owing to the cutting-edge structure, the proposed circuit demonstrates a very low power consumption of 0.74 mW and a wide tuning range of 83 db. The proposed structure benefits from linear-in-db and constant bandwidth specifications. The linear-in-db gain range of structure is about 70 db. The structure draws about 413 A mu A from 1.8 V power supply and regarding this low power consumption, it shows a lower and upper 3-db cutoff frequencies of 8 Hz and 8.1 MHz, respectively. Process and temperature variation analysis of the circuit is also investigated through Monte Carlo and corner case analysis in order to verify the well-robustness of the structure. The transient sinusoidal response analysis is also done to verify the proposed VGA's stability.

关键词： Constant bandwidth Zero-pole repositioning linear-in-db Low power Variable gain amplifier

来源：评论

学校读者我要写书评

暂无评论

A wideband CMOS variable gain amplifier with a novel linear-in-db gain control structure

A wideband CMOS variable gain amplifier with a novel linear-...

引用

IEEE International Workshop on Radio-Frequency Integration Technology

作者： Li, Zhiqun Guo, Feng Chen, Dongdong Li, Haisong Wang, Higong SE Univ Inst RF &OE ICs Nanjing 210096 Peoples R China

ISBN: (纸本)9781424413072

In this paper, a novel structure of linear-in-db gain control is introduced. Based on this structure, a wideband variable gain amplifier has been designed and implemented in TSMC 0.18-mu m RF CMOS process. On-chip measured results show a good linear-in-db gain control characteristic with 12.8 db dynamic gain range of -3.3 similar to 9.5 db. It can operate in the frequency range of 4302330 MHz and consumes 16.2 mW at 1.8 V supply. The noise figure is 6.2 db at maximum gain and the input P-1db at minimum gain is -9 dbm.

关键词： VGA wideband linear-in-db CMOS

来源：评论

学校读者我要写书评

暂无评论

A CMOS Wide-Bandwidth High-Power linear-in-db Variable Attenuator Using Body Voltage Distribution Method

A CMOS Wide-Bandwidth High-Power Linear-in-dB Variable Atten...

引用

2010 IEEE Radio Frequency Integrated Circuits Symposium

作者： Huang, Yan-Yu Woo, Wangmyong Lee, Chang-Ho Laskar, Joy Georgia Inst Technol Georgia Elect Design Ctr Atlanta GA 30308 USA Samsung Design Ctr Atlanta GA 30308 USA

ISBN: (纸本)9781424462414

A wide bandwidth, highly linear variable attenuator designed in 0.18 mu m triple-well CMOS process is presented. This attenuator is based on three cascade pi-networks with body voltage distribution scheme to minimize the effects of the input power levels. Measurements show it achieves minimum 1-db gain compression of 7.5 dbm. The mid-band insertion loss is 1.6 db and the maximum attenuation is 34.8 db. This attenuator has a linear-in-db controllability from 400 MHz to 3.7 GHz with input return loss better than 9 db. To our knowledge, this is the highest linear CMOS variable attenuator with a wide bandwidth of 3.3 GHz.

关键词： attenuator body voltage swing distribution body-floating technique CMOS linear-in-db

来源：评论

学校读者我要写书评

暂无评论

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案：

请选择收藏分类：

通借通还

建议与咨询 留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案： 新增检索档案 确定 取消

请选择收藏分类： 新增自定义分类 确定 取消

通借通还

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

请选择保存的检索档案：

请选择收藏分类：