The iterative decoding in turbo code has very high decoding complexity. This paper adopts the improved log-map algorithm for decoding of Space-Time Turbo Trellis Code (ST-Turbo TC) in the slow Rayleigh fading channels...
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The iterative decoding in turbo code has very high decoding complexity. This paper adopts the improved log-map algorithm for decoding of Space-Time Turbo Trellis Code (ST-Turbo TC) in the slow Rayleigh fading channels. Using the MacLaurin formulae, the proposed algorithm expands the logarithmic function of the log-map. It makes the computation much easier and the operation of the hardware system much faster. Simulation results show that the proposed algorithm performs very closely to the log-map algorithm for decoding of ST-Turbo TC in slow Rayleigh fading channels.
In this paper, a reduced complexity log-map algorithm based on a non-recursive approximation of the max* operator is presented and studied for turbo trellis-coded modulation (TTCM) systems. In the algorithm, denoted a...
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In this paper, a reduced complexity log-map algorithm based on a non-recursive approximation of the max* operator is presented and studied for turbo trellis-coded modulation (TTCM) systems. In the algorithm, denoted as AvN log-map, the max* operation is generalized and performed on n >= 2 arguments. The approximation is derived from the Jensen inequality. The non-recursive form of the max* calculations allows to achieve significant reduction in the decoding effort in comparison to the conventional log-map algorithm. Bit-error rate performance simulation results for serial and parallel TTCM schemes in the additive white Gaussian noise and uncorrelated Rayleigh fading channels show that the AvN log-map algorithm performs close to the log-map. Performance and complexity comparisons of the AvN log-map algorithm against the log-map and several relevant reduced complexity turbo decoding algorithms proposed in the literature reveal, that it offers favorable low computational effort for the price of small performance degradation.
Due to the high complexity of the log-map algorithm, many modifications and simplifications were proposed to simplify the VLSI implementation of turbo decoding. A new way to reduce the complexity of the log-map algori...
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ISBN:
(纸本)9780769538167
Due to the high complexity of the log-map algorithm, many modifications and simplifications were proposed to simplify the VLSI implementation of turbo decoding. A new way to reduce the complexity of the log-map algorithm is presented. It takes place of log and exp operation with look-up table without considering the channel state information, which make the decoding process more easily and faster. In some communication system, it is hard or impossible to estimate the channel state information. It allows for efficient ASIC implementation and almost has the same performance as the log-map algorithm. The simulation results show that the presented algorithm has a good performance in all circumstance.
In this paper, we propose a simplified log-map algorithm that is equivalent to the log-map algorithm in terms of the bit-error-rate (BER) performance, but without its implementation difficulties. The proposed algorith...
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ISBN:
(纸本)9781424497898
In this paper, we propose a simplified log-map algorithm that is equivalent to the log-map algorithm in terms of the bit-error-rate (BER) performance, but without its implementation difficulties. The proposed algorithm is based on a linear approximation of the correction function in the log-map algorithm over different signal-to-noise ratio (SNR) regions. This approximation is simple to implement by avoiding the number of complicated operations. Simulation results demonstrate that this simplified algorithm can achieve the same BER performance as the log-map algorithm.
As turbo decoding is a highly memory-intensive algorithm consuming large power, a major issue to be solved in practical implementation is to reduce power consumption. This paper presents an efficient reverse calculati...
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As turbo decoding is a highly memory-intensive algorithm consuming large power, a major issue to be solved in practical implementation is to reduce power consumption. This paper presents an efficient reverse calculation method to lower the power consumption by reducing the number of memory accesses required in turbo decoding. The reverse calculation method is proposed for the Max-log-map algorithm, and it is combined with a scaling technique to achieve a new decoding algorithm, called hybrid log-map, that results in a similar BER performance to the log-map algorithm. For the W-CDMA standard, experimental results show that 80% of memory accesses are reduced through the proposed reverse calculation method. A hybrid log-map turbo decoder based on the proposed reverse calculation reduces power consumption and memory size by 34.4% and 39.2%, respectively.
Bit-interleaved turbo-coded modulation is more sensitive to signal-to-noise ratio (SNR) overestimation than turbo code with BPSK. An explanation is given from the effect of SNR mismatch on bit-metric generation, which...
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Bit-interleaved turbo-coded modulation is more sensitive to signal-to-noise ratio (SNR) overestimation than turbo code with BPSK. An explanation is given from the effect of SNR mismatch on bit-metric generation, which consequently affects the log-map turbo-decoding algorithm.
In this paper secure channel coding schemes based on Turbo Codes are suggested and implemented. The design of encoder using Recursive Systematic Code (RSC) with puncturing techniques is presented. Component decoders a...
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ISBN:
(纸本)9783037853191
In this paper secure channel coding schemes based on Turbo Codes are suggested and implemented. The design of encoder using Recursive Systematic Code (RSC) with puncturing techniques is presented. Component decoders are implemented by log-Maximum-a-Posteriori (log-map) algorithm and thereafter implementation of overall turbo decoder is illustrated in detail. Finally we have investigated low power design technique of the turbo decoder design with variable iteration techniques.
Low-density parity-check (LDPC) codes on par with convolutional turbo codes (CTC) are two of the most powerful error correction codes known to perform very close to the Shannon limit. However, their different code str...
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ISBN:
(纸本)9781424429233
Low-density parity-check (LDPC) codes on par with convolutional turbo codes (CTC) are two of the most powerful error correction codes known to perform very close to the Shannon limit. However, their different code structures usually lead to different hardware implementations. In this paper, we propose a unified decoder architecture that is capable of decoding both LDPC and turbo codes with a limited hardware overhead. We employ maximum a posteriori (map) algorithm as a bridge between LDPC and turbo codes. We represent LDPC codes as parallel concatenated single parity check (PCSPC) codes and propose a group sub-trellis (GST) decoding algorithm for the efficient decoding of PCSPC codes. This algorithm achieves about 2X improvement in the convergence speed and is more numerically robust than the classical "tanh" algorithm. What is more interesting is that we can generalize a unified trellis decoding algorithm for LDPC and turbo codes based on their trellis structures. We propose a reconfigurable computation kernel for log-map decoding of LDPC and turbo codes at a cost of similar to 15% hardware overhead. Small lookup tables (LUTs) with 9 entries of 2-bit data are designed to implement the log-map algorithm. Fixed point (6:2) simulation results show that there is negligible or nearly no performance loss by using this LUT approximation compared to the ideal case. The proposed architecture results in scalable and flexible datapath units enabling parallel decoding of LDPC/turbo codes.
In the paper, a modified log-map algorithm based on a novel approximation of the max* operator derived from the Jensen inequality is proposed. In this approach, the max* operation is performed on n >= 2 arguments, ...
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ISBN:
(纸本)9781424480166
In the paper, a modified log-map algorithm based on a novel approximation of the max* operator derived from the Jensen inequality is proposed. In this approach, the max* operation is performed on n >= 2 arguments, thus the recursive calculations are avoided and significant reduction in the number of operations performed per decoding step, as compared with the conventional log-map, is achieved. Simulation results of BER performance for both turbo codes and turbo trellis-coded modulation (TTCM) employing the new algorithm are given, showing the near-optimal performance of the proposed algorithm.
Turbo codes represent a very powerful channel coding technique for next generation of mobile communications. In our days, the research is focus on the development and implementation of turbo coding-decoding algorithms...
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ISBN:
(纸本)0769522831
Turbo codes represent a very powerful channel coding technique for next generation of mobile communications. In our days, the research is focus on the development and implementation of turbo coding-decoding algorithms in high-speed programmable platforms (DSP's and FPGA's) for a better performance in terms of error correction, power consumption and speed AMP (Maximum A-posteriori probability) algorithm represents the best performance choice for turbo decoding block. The main objective of implementation is to design structures for turbo decoding near to the theoretical performances using sub-optimal architectures. In this work we present a hardware implementation of the log-domain version of the AMP algorithm (log-AMP). This version of the algorithm gives an excellent approach to the Shannon limits and allows the description of simple blocks based on arithmetic operators, like MAX* operator.
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