Many popular ontology languages are based on (subsets of) first-order predicate logic, where classes are modeled as unary predicates and properties as binary predicates. Specifically, the ontology language OWL DL is b...
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Many popular ontology languages are based on (subsets of) first-order predicate logic, where classes are modeled as unary predicates and properties as binary predicates. Specifically, the ontology language OWL DL is based on the Description logic SHOIQ. F-logic is an ontology language which is also based on first-order logic, but classes and properties are modeled as terms, rather than predicates. In this paper we define a translation from predicate-based ontologies to F-logic ontologies and show that this translation preserves entailments for large classes of ontologies, including most of OWL DL. We define the class of equality-safe (epsiv-safe) formulas, show that the Description logic SHIQ is epsiv-safe, and show that the translation preserves validity of epsiv-safe formulas. Finally, we use these results to close the open problems of layering F-logic programming on top of Description logic Programs and language layering in WSML
When reengineering legacy systems, it is crucial to assess if the legacy behavior has been preserved or how it changed due to the reengineering effort. Ideally if a legacy system is covered by tests, running the tests...
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When reengineering legacy systems, it is crucial to assess if the legacy behavior has been preserved or how it changed due to the reengineering effort. Ideally if a legacy system is covered by tests, running the tests on the new version can identify potential differences or discrepancies. However, writing tests for an unknown and large system is difficult due to the lack of internal knowledge. It is especially difficult to bring the system to an appropriate state. Our solution is based on the acknowledgment that one of the few trustable piece of information available when approaching a legacy system is the running system itself. Our approach reifies the execution traces and uses logic programming to express tests on them. Thereby it eliminates the need to programatically bring the system in a particular state, and handles the test-writer a high-level abstraction mechanism to query the trace. The resulting system, called Testlog, was used on several real-world case studies to validate our claims
Software product lines (PLs) are large, complex systems, demanding high maintainability and enhanced flexibility. Nonetheless, in the state of the art PL methods, features are scattered and tangled throughout the syst...
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Software product lines (PLs) are large, complex systems, demanding high maintainability and enhanced flexibility. Nonetheless, in the state of the art PL methods, features are scattered and tangled throughout the system components, leading to poor maintainability. Additionally, the majority of PL methods support manual product composition, while the implementation of feature-level variability in PL products influences the system's conceptual integrity. Generative programming techniques do enhance flexibility, but on the cost of maintainability. The feature-architecture mapping (FArM) method provides a stronger mapping between features and the architecture. It is based on a series of transformations on the initial PL feature model. During these transformations, architectural components are derived, encapsulating the business logic of each transformed feature and having interfaces reflecting the feature interactions. The flexibility of FArM architectures is supported through the explicit integration of plug-in mechanisms. The methodology is evaluated in the context of a wireless handheld device PL
This paper presents a new approach to modelling and verification of function block applications of the IEC 61499 standard. The approach uses the language of logic programming Prolog to represent a model of function bl...
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This paper presents a new approach to modelling and verification of function block applications of the IEC 61499 standard. The approach uses the language of logic programming Prolog to represent a model of function block network and to verify its properties. The class of properties that can be checked is extended to more substantial queries providing in return not only "yes" or "no", but also the parameters explaining the reasons. The models essentially use the topological properties of the function block network and allow data of arbitrary types (not only Boolean) be used in the queries.
Developments in power plant control are increasing steadily in recent years by seeking new techniques other than conventional PID controls. This panel introduces intelligent techniques to power plant control, which de...
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Developments in power plant control are increasing steadily in recent years by seeking new techniques other than conventional PID controls. This panel introduces intelligent techniques to power plant control, which deal with complex dynamic systems having significant uncertainties. As for intelligent techniques, neural network (NN), fuzzy logic (FL), evolutionary programming (EP), genetic algorithm (GA), particle swarm optimization (PSO) and multi-agent system (MAS) are presented for the power plant control. Intelligent techniques provide control methodologies that improve the performance of the plant in a wide-range of operation. Moreover, intelligent techniques are shown to overcome the unpredictable dynamics, computational complexity and problems associated with large-scale distributed complex power plants
We present an integer linear programming (ILP) formulation and a heuristic scheduling approach for high-level synthesis to synthesize two-level pipeline datapaths using four-phase adiabatic logic. Adiabatic CMOS logic...
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We present an integer linear programming (ILP) formulation and a heuristic scheduling approach for high-level synthesis to synthesize two-level pipeline datapaths using four-phase adiabatic logic. Adiabatic CMOS logic that relies on charge recovery is attractive to achieve low energy dissipation. It complements voltage-scaling approaches, while its inherent pipeline structure makes it most suitable for signal processing applications. However, the differences between adiabatic and static logic, such as the phase clock controlled evaluation of each logic stage influences the automated design tools, making existing scheduling algorithms unsuitable for adiabatic circuits. We also present a VHDL description technique to perform functional simulation of the synthesized adiabatic datapath together with the static part of a digital system, and provide experiments to show the viability of our approach.
In this paper we address a novel issue for deductive databases with huge data repositories, namely the problem of evaluating ranked top-k queries. The problem occurs whenever we allow queries such as "find cheap ...
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In this paper we address a novel issue for deductive databases with huge data repositories, namely the problem of evaluating ranked top-k queries. The problem occurs whenever we allow queries such as "find cheap hotels close to the conference location" in which fuzzy predicates like cheap and close occur. We show how to compute efficiently the top-k answers of conjunctive queries with fuzzy predicates.
The formal analysis described here detects two so far undetected real deadlock situations per thousand C source files or million lines of code in the open source Linux operating system kernel, and three undetected acc...
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The formal analysis described here detects two so far undetected real deadlock situations per thousand C source files or million lines of code in the open source Linux operating system kernel, and three undetected accesses to freed memory, at a few seconds per file. That is notable because the code has been continuously under scrutiny from thousands of developers' pairs of eyes. In distinction to mo del-checking techniques, which also use symbolic logic, the analysis uses a "3-phase" compositional Hoare-style programminglogic combined with abstract interpretation. The result is a customisable post-hoc semantic analysis of C code that is capable of several different analyses at once
Synchronous finite state machines are very important for digital sequential designs. They allow the synchronisation of the hardware system components so that these may cooperate adequately in the fulfillment of the ma...
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ISBN:
(纸本)1424402719;1424402727
Synchronous finite state machines are very important for digital sequential designs. They allow the synchronisation of the hardware system components so that these may cooperate adequately in the fulfillment of the main objective of the design. In this paper, assuming that the state assignment problem has been solved and so a specific state coding is provided, we propose to me the evolutionary methodology to yield optimal evolvable hardware that implements the state machine control component. The evolved hardware requires a minimal hardware area and introduces a minimal propagation delay of the machine output signals
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